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author | Adrian Schmutzler <freifunk@adrianschmutzler.de> | 2020-02-08 21:58:55 +0100 |
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committer | Adrian Schmutzler <freifunk@adrianschmutzler.de> | 2020-02-14 14:10:51 +0100 |
commit | 7d7aa2fd924c27829ec25f825481554dd81bce97 (patch) | |
tree | 658b87b89331670266163e522ea5fb52535633cb /target/linux/bcm27xx/patches-4.19/950-0343-ASoC-tlv320aic32x4-Properly-Set-Processing-Blocks.patch | |
parent | e7bfda2c243e66a75ff966ba04c28b1590b5d24c (diff) | |
download | upstream-7d7aa2fd924c27829ec25f825481554dd81bce97.tar.gz upstream-7d7aa2fd924c27829ec25f825481554dd81bce97.tar.bz2 upstream-7d7aa2fd924c27829ec25f825481554dd81bce97.zip |
brcm2708: rename target to bcm27xx
This change makes the names of Broadcom targets consistent by using
the common notation based on SoC/CPU ID (which is used internally
anyway), bcmXXXX instead of brcmXXXX.
This is even used for target TITLE in make menuconfig already,
only the short target name used brcm so far.
Despite, since subtargets range from bcm2708 to bcm2711, it seems
appropriate to use bcm27xx instead of bcm2708 (again, as already done
for BOARDNAME).
This also renames the packages brcm2708-userland and brcm2708-gpu-fw.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Acked-by: Álvaro Fernández Rojas <noltari@gmail.com>
Diffstat (limited to 'target/linux/bcm27xx/patches-4.19/950-0343-ASoC-tlv320aic32x4-Properly-Set-Processing-Blocks.patch')
-rw-r--r-- | target/linux/bcm27xx/patches-4.19/950-0343-ASoC-tlv320aic32x4-Properly-Set-Processing-Blocks.patch | 111 |
1 files changed, 111 insertions, 0 deletions
diff --git a/target/linux/bcm27xx/patches-4.19/950-0343-ASoC-tlv320aic32x4-Properly-Set-Processing-Blocks.patch b/target/linux/bcm27xx/patches-4.19/950-0343-ASoC-tlv320aic32x4-Properly-Set-Processing-Blocks.patch new file mode 100644 index 0000000000..cae096bd95 --- /dev/null +++ b/target/linux/bcm27xx/patches-4.19/950-0343-ASoC-tlv320aic32x4-Properly-Set-Processing-Blocks.patch @@ -0,0 +1,111 @@ +From 6cc882cf38b62fce2a07640413b05b43b420c77a Mon Sep 17 00:00:00 2001 +From: Annaliese McDermond <nh6z@nh6z.net> +Date: Wed, 20 Mar 2019 19:38:44 -0700 +Subject: [PATCH] ASoC: tlv320aic32x4: Properly Set Processing Blocks + +commit c95e3a4b96293403a427b5185e60fad28af51fdd upstream. + +Different processing blocks are required for different sampling +rates and power parameters. Set the processing blocks based +on this information. + +Signed-off-by: Annaliese McDermond <nh6z@nh6z.net> +Signed-off-by: Mark Brown <broonie@kernel.org> +--- + sound/soc/codecs/tlv320aic32x4.c | 56 ++++++++++++++++++++------------ + 1 file changed, 36 insertions(+), 20 deletions(-) + +--- a/sound/soc/codecs/tlv320aic32x4.c ++++ b/sound/soc/codecs/tlv320aic32x4.c +@@ -59,6 +59,8 @@ struct aic32x4_rate_divs { + u8 nadc; + u8 madc; + u8 blck_N; ++ u8 r_block; ++ u8 p_block; + }; + + struct aic32x4_priv { +@@ -307,34 +309,34 @@ static const struct snd_kcontrol_new aic + + static const struct aic32x4_rate_divs aic32x4_divs[] = { + /* 8k rate */ +- {12000000, 8000, 1, 7, 6800, 768, 5, 3, 128, 5, 18, 24}, +- {24000000, 8000, 2, 7, 6800, 768, 15, 1, 64, 45, 4, 24}, +- {25000000, 8000, 2, 7, 3728, 768, 15, 1, 64, 45, 4, 24}, ++ {12000000, 8000, 1, 7, 6800, 768, 5, 3, 128, 5, 18, 24, 1, 1}, ++ {24000000, 8000, 2, 7, 6800, 768, 15, 1, 64, 45, 4, 24, 1, 1}, ++ {25000000, 8000, 2, 7, 3728, 768, 15, 1, 64, 45, 4, 24, 1, 1}, + /* 11.025k rate */ +- {12000000, 11025, 1, 7, 5264, 512, 8, 2, 128, 8, 8, 16}, +- {24000000, 11025, 2, 7, 5264, 512, 16, 1, 64, 32, 4, 16}, ++ {12000000, 11025, 1, 7, 5264, 512, 8, 2, 128, 8, 8, 16, 1, 1}, ++ {24000000, 11025, 2, 7, 5264, 512, 16, 1, 64, 32, 4, 16, 1, 1}, + /* 16k rate */ +- {12000000, 16000, 1, 7, 6800, 384, 5, 3, 128, 5, 9, 12}, +- {24000000, 16000, 2, 7, 6800, 384, 15, 1, 64, 18, 5, 12}, +- {25000000, 16000, 2, 7, 3728, 384, 15, 1, 64, 18, 5, 12}, ++ {12000000, 16000, 1, 7, 6800, 384, 5, 3, 128, 5, 9, 12, 1, 1}, ++ {24000000, 16000, 2, 7, 6800, 384, 15, 1, 64, 18, 5, 12, 1, 1}, ++ {25000000, 16000, 2, 7, 3728, 384, 15, 1, 64, 18, 5, 12, 1, 1}, + /* 22.05k rate */ +- {12000000, 22050, 1, 7, 5264, 256, 4, 4, 128, 4, 8, 8}, +- {24000000, 22050, 2, 7, 5264, 256, 16, 1, 64, 16, 4, 8}, +- {25000000, 22050, 2, 7, 2253, 256, 16, 1, 64, 16, 4, 8}, ++ {12000000, 22050, 1, 7, 5264, 256, 4, 4, 128, 4, 8, 8, 1, 1}, ++ {24000000, 22050, 2, 7, 5264, 256, 16, 1, 64, 16, 4, 8, 1, 1}, ++ {25000000, 22050, 2, 7, 2253, 256, 16, 1, 64, 16, 4, 8, 1, 1}, + /* 32k rate */ +- {12000000, 32000, 1, 7, 1680, 192, 2, 7, 64, 2, 21, 6}, +- {24000000, 32000, 2, 7, 1680, 192, 7, 2, 64, 7, 6, 6}, ++ {12000000, 32000, 1, 7, 1680, 192, 2, 7, 64, 2, 21, 6, 1, 1}, ++ {24000000, 32000, 2, 7, 1680, 192, 7, 2, 64, 7, 6, 6, 1, 1}, + /* 44.1k rate */ +- {12000000, 44100, 1, 7, 5264, 128, 2, 8, 128, 2, 8, 4}, +- {24000000, 44100, 2, 7, 5264, 128, 8, 2, 64, 8, 4, 4}, +- {25000000, 44100, 2, 7, 2253, 128, 8, 2, 64, 8, 4, 4}, ++ {12000000, 44100, 1, 7, 5264, 128, 2, 8, 128, 2, 8, 4, 1, 1}, ++ {24000000, 44100, 2, 7, 5264, 128, 8, 2, 64, 8, 4, 4, 1, 1}, ++ {25000000, 44100, 2, 7, 2253, 128, 8, 2, 64, 8, 4, 4, 1, 1}, + /* 48k rate */ +- {12000000, 48000, 1, 8, 1920, 128, 2, 8, 128, 2, 8, 4}, +- {24000000, 48000, 2, 8, 1920, 128, 8, 2, 64, 8, 4, 4}, +- {25000000, 48000, 2, 7, 8643, 128, 8, 2, 64, 8, 4, 4}, ++ {12000000, 48000, 1, 8, 1920, 128, 2, 8, 128, 2, 8, 4, 1, 1}, ++ {24000000, 48000, 2, 8, 1920, 128, 8, 2, 64, 8, 4, 4, 1, 1}, ++ {25000000, 48000, 2, 7, 8643, 128, 8, 2, 64, 8, 4, 4, 1, 1}, + + /* 96k rate */ +- {25000000, 96000, 2, 7, 8643, 64, 4, 4, 64, 4, 4, 1}, ++ {25000000, 96000, 2, 7, 8643, 64, 4, 4, 64, 4, 4, 1, 1, 9}, + }; + + static const struct snd_kcontrol_new hpl_output_mixer_controls[] = { +@@ -698,6 +700,18 @@ static int aic32x4_set_dai_fmt(struct sn + return 0; + } + ++static int aic32x4_set_processing_blocks(struct snd_soc_component *component, ++ u8 r_block, u8 p_block) ++{ ++ if (r_block > 18 || p_block > 25) ++ return -EINVAL; ++ ++ snd_soc_component_write(component, AIC32X4_ADCSPB, r_block); ++ snd_soc_component_write(component, AIC32X4_DACSPB, p_block); ++ ++ return 0; ++} ++ + static int aic32x4_setup_clocks(struct snd_soc_component *component, + unsigned int sample_rate, + unsigned int parent_rate) +@@ -710,6 +724,8 @@ static int aic32x4_setup_clocks(struct s + return i; + } + ++ aic32x4_set_processing_blocks(component, aic32x4_divs[i].r_block, aic32x4_divs[i].p_block); ++ + /* MCLK as PLL_CLKIN */ + snd_soc_component_update_bits(component, AIC32X4_CLKMUX, AIC32X4_PLL_CLKIN_MASK, + AIC32X4_PLL_CLKIN_MCLK << AIC32X4_PLL_CLKIN_SHIFT); |