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| author | John Crispin <john@openwrt.org> | 2014-09-12 06:53:21 +0000 |
|---|---|---|
| committer | John Crispin <john@openwrt.org> | 2014-09-12 06:53:21 +0000 |
| commit | fb4196ec2af752f6660ee2e813844357c1150552 (patch) | |
| tree | a6d19f55e5b6367427e0d606d5551dcb9001e137 /target/linux/atheros/patches-3.14 | |
| parent | 94efeaa51f4e4f00160559c53ca6f601f2864560 (diff) | |
| download | upstream-fb4196ec2af752f6660ee2e813844357c1150552.tar.gz upstream-fb4196ec2af752f6660ee2e813844357c1150552.tar.bz2 upstream-fb4196ec2af752f6660ee2e813844357c1150552.zip | |
atheros: ar2315-pci: update DMA offset macroses
Remove duplicated macroses, which define DMA offset (SDRAM baseaddress).
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 42504
Diffstat (limited to 'target/linux/atheros/patches-3.14')
| -rw-r--r-- | target/linux/atheros/patches-3.14/100-board.patch | 29 | ||||
| -rw-r--r-- | target/linux/atheros/patches-3.14/105-ar2315_pci.patch | 11 |
2 files changed, 24 insertions, 16 deletions
diff --git a/target/linux/atheros/patches-3.14/100-board.patch b/target/linux/atheros/patches-3.14/100-board.patch index 4512d55ed4..4cc0246e85 100644 --- a/target/linux/atheros/patches-3.14/100-board.patch +++ b/target/linux/atheros/patches-3.14/100-board.patch @@ -524,7 +524,7 @@ +#endif /* __ASM_MACH_AR231X_CPU_FEATURE_OVERRIDES_H */ --- /dev/null +++ b/arch/mips/include/asm/mach-ar231x/dma-coherence.h -@@ -0,0 +1,77 @@ +@@ -0,0 +1,76 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive @@ -537,9 +537,8 @@ +#ifndef __ASM_MACH_AR231X_DMA_COHERENCE_H +#define __ASM_MACH_AR231X_DMA_COHERENCE_H + -+#define PCI_DMA_OFFSET 0x20000000 -+ +#include <linux/device.h> ++#include <ar2315_regs.h> + +static inline dma_addr_t ar231x_dev_offset(struct device *dev) +{ @@ -547,7 +546,7 @@ + extern struct bus_type pci_bus_type; + + if (dev && dev->bus == &pci_bus_type) -+ return PCI_DMA_OFFSET; ++ return AR2315_PCI_HOST_SDRAM_BASEADDR; +#endif + return 0; +} @@ -674,7 +673,7 @@ +#endif /* __ASM_MACH_AR231X_WAR_H */ --- /dev/null +++ b/arch/mips/include/asm/mach-ar231x/ar2315_regs.h -@@ -0,0 +1,625 @@ +@@ -0,0 +1,631 @@ +/* + * Register definitions for AR2315+ + * @@ -1291,13 +1290,19 @@ +#define AR2315_IRCFG_SEQ_END_WIN_THRESH 0x001f0000 +#define AR2315_IRCFG_NUM_BACKOFF_WORDS 0x01e00000 + -+#define HOST_PCI_DEV_ID 3 -+#define HOST_PCI_MBAR0 0x10000000 -+#define HOST_PCI_MBAR1 0x20000000 -+#define HOST_PCI_MBAR2 0x30000000 -+ -+#define HOST_PCI_SDRAM_BASEADDR HOST_PCI_MBAR1 -+#define PCI_DEVICE_MEM_SPACE 0x800000 ++/* ++ * We need some arbitrary non-zero value to be programmed to the BAR1 register ++ * of PCI host controller to enable DMA. The same value should be used as the ++ * offset to calculate the physical address of DMA buffer for PCI devices. ++ */ ++#define AR2315_PCI_HOST_SDRAM_BASEADDR 0x20000000 ++ ++/* ??? access BAR */ ++#define AR2315_PCI_HOST_MBAR0 0x10000000 ++/* RAM access BAR */ ++#define AR2315_PCI_HOST_MBAR1 AR2315_PCI_HOST_SDRAM_BASEADDR ++/* ??? access BAR */ ++#define AR2315_PCI_HOST_MBAR2 0x30000000 + +#endif /* __ASM_MACH_AR231X_AR2315_REGS_H */ --- /dev/null diff --git a/target/linux/atheros/patches-3.14/105-ar2315_pci.patch b/target/linux/atheros/patches-3.14/105-ar2315_pci.patch index 1460299a75..5c437dc2c5 100644 --- a/target/linux/atheros/patches-3.14/105-ar2315_pci.patch +++ b/target/linux/atheros/patches-3.14/105-ar2315_pci.patch @@ -7,7 +7,7 @@ +obj-$(CONFIG_ATHEROS_AR2315_PCI) += pci.o --- /dev/null +++ b/arch/mips/ar231x/pci.c -@@ -0,0 +1,337 @@ +@@ -0,0 +1,340 @@ +/* + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License @@ -198,9 +198,12 @@ + return -ENODEV; + + /* Program MBARs */ -+ ar2315_pci_local_cfg_wr(devfn, PCI_BASE_ADDRESS_0, HOST_PCI_MBAR0); -+ ar2315_pci_local_cfg_wr(devfn, PCI_BASE_ADDRESS_1, HOST_PCI_MBAR1); -+ ar2315_pci_local_cfg_wr(devfn, PCI_BASE_ADDRESS_2, HOST_PCI_MBAR2); ++ ar2315_pci_local_cfg_wr(devfn, PCI_BASE_ADDRESS_0, ++ AR2315_PCI_HOST_MBAR0); ++ ar2315_pci_local_cfg_wr(devfn, PCI_BASE_ADDRESS_1, ++ AR2315_PCI_HOST_MBAR1); ++ ar2315_pci_local_cfg_wr(devfn, PCI_BASE_ADDRESS_2, ++ AR2315_PCI_HOST_MBAR2); + + /* Run */ + ar2315_pci_local_cfg_wr(devfn, PCI_COMMAND, PCI_COMMAND_MEMORY | |