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authorFelix Fietkau <nbd@openwrt.org>2014-07-17 16:36:49 +0000
committerFelix Fietkau <nbd@openwrt.org>2014-07-17 16:36:49 +0000
commit4294c6bb6cd0624e9e45b31e10c0a0ddd1bea5f9 (patch)
tree8ede33707363a1e73f7734fa08c83bb7d44889ea /target/linux/atheros/patches-3.10/100-board.patch
parent6c0e82e860750bfbd0bc3097bf3872a1b01e5703 (diff)
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atheros[uart]: use 32-bit aligned I/O
Use 32-bit aligned I/O and update base UART address (remove +3 offset). Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com> git-svn-id: svn://svn.openwrt.org/openwrt/trunk@41699 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/atheros/patches-3.10/100-board.patch')
-rw-r--r--target/linux/atheros/patches-3.10/100-board.patch6
1 files changed, 3 insertions, 3 deletions
diff --git a/target/linux/atheros/patches-3.10/100-board.patch b/target/linux/atheros/patches-3.10/100-board.patch
index 4fdf435e87..b9d3719034 100644
--- a/target/linux/atheros/patches-3.10/100-board.patch
+++ b/target/linux/atheros/patches-3.10/100-board.patch
@@ -766,7 +766,7 @@
+#define AR2315_LOCAL 0x10400000 /* LOCAL BUS MMR */
+#define AR2315_ENET0 0x10500000 /* ETHERNET MMR */
+#define AR2315_DSLBASE 0x11000000 /* RESET CONTROL MMR */
-+#define AR2315_UART0 0x11100003 /* UART MMR */
++#define AR2315_UART0 0x11100000 /* UART MMR */
+#define AR2315_SPI_MMR 0x11300000 /* SPI FLASH MMR */
+#define AR2315_PCIEXT 0x80000000 /* pci external */
+
@@ -1385,7 +1385,7 @@
+#define AR531X_FLASHCTL 0x18400000
+#define AR531X_APBBASE 0x1c000000
+#define AR531X_FLASH 0x1e000000
-+#define AR531X_UART0 0xbc000003 /* UART MMR */
++#define AR531X_UART0 0xbc000000 /* UART MMR */
+
+/*
+ * AR531X_NUM_ENET_MAC defines the number of ethernet MACs that
@@ -3007,7 +3007,7 @@
+ memset(&s, 0, sizeof(s));
+
+ s.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST;
-+ s.iotype = UPIO_MEM;
++ s.iotype = UPIO_MEM32;
+ s.irq = irq;
+ s.regshift = 2;
+ s.mapbase = mapbase;