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author | Gabor Juhos <juhosg@openwrt.org> | 2008-04-14 17:23:07 +0000 |
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committer | Gabor Juhos <juhosg@openwrt.org> | 2008-04-14 17:23:07 +0000 |
commit | c7ed0fbd18a000eccb8a0540b959cdb3c6b20b5e (patch) | |
tree | 66768813ea2f116ee146ccda5f69274e7efce098 /target/linux/atheros/files | |
parent | 41cf84f819bcff06077cd323b9b07441e9d200af (diff) | |
download | upstream-c7ed0fbd18a000eccb8a0540b959cdb3c6b20b5e.tar.gz upstream-c7ed0fbd18a000eccb8a0540b959cdb3c6b20b5e.tar.bz2 upstream-c7ed0fbd18a000eccb8a0540b959cdb3c6b20b5e.zip |
add missing CONFIG_GPIO_LEDS related ifdefs
SVN-Revision: 10835
Diffstat (limited to 'target/linux/atheros/files')
-rw-r--r-- | target/linux/atheros/files/arch/mips/atheros/ar5312/board.c | 32 | ||||
-rw-r--r-- | target/linux/atheros/files/arch/mips/atheros/ar5315/board.c | 16 |
2 files changed, 26 insertions, 22 deletions
diff --git a/target/linux/atheros/files/arch/mips/atheros/ar5312/board.c b/target/linux/atheros/files/arch/mips/atheros/ar5312/board.c index f58d08cba7..938db11bc8 100644 --- a/target/linux/atheros/files/arch/mips/atheros/ar5312/board.c +++ b/target/linux/atheros/files/arch/mips/atheros/ar5312/board.c @@ -192,7 +192,7 @@ static struct platform_device ar5312_gpio_leds = { static char __init *ar5312_flash_limit(void) { u32 ctl; - /* + /* * Configure flash bank 0. * Assume 8M window size. Flash will be aliased if it's smaller */ @@ -205,7 +205,7 @@ static char __init *ar5312_flash_limit(void) (sysRegRead(AR531X_FLASHCTL0) & FLASHCTL_MW); sysRegWrite(AR531X_FLASHCTL0, ctl); - + /* Disable other flash banks */ sysRegWrite(AR531X_FLASHCTL1, sysRegRead(AR531X_FLASHCTL1) & ~(FLASHCTL_E | FLASHCTL_AC)); @@ -219,7 +219,7 @@ static char __init *ar5312_flash_limit(void) static struct ar531x_config __init *init_wmac(int unit) { struct ar531x_config *config; - + config = (struct ar531x_config *) kzalloc(sizeof(struct ar531x_config), GFP_KERNEL); config->board = board_config; config->radio = radio_config; @@ -228,7 +228,7 @@ static struct ar531x_config __init *init_wmac(int unit) return config; } - + int __init ar5312_init_devices(void) { struct ar531x_boarddata *bcfg; @@ -243,13 +243,13 @@ int __init ar5312_init_devices(void) ar531x_find_config(ar5312_flash_limit()); bcfg = (struct ar531x_boarddata *) board_config; - + /* * Chip IDs and hardware detection for some Atheros * models are really broken! - * + * * Atheros uses a disabled WMAC0 and Silicon ID of AR5312 - * as indication for AR2312, which is otherwise + * as indication for AR2312, which is otherwise * indistinguishable from the real AR5312. */ if (radio_config) { @@ -262,11 +262,11 @@ int __init ar5312_init_devices(void) /* AR2313 has CPU minor rev. 10 */ if ((current_cpu_data.processor_id & 0xff) == 0x0a) mips_machtype = MACH_ATHEROS_AR2313; - + /* AR2312 shares the same Silicon ID as AR5312 */ else if (bcfg->config & BD_ISCASPER) mips_machtype = MACH_ATHEROS_AR2312; - + /* Everything else is probably AR5312 or compatible */ else mips_machtype = MACH_ATHEROS_AR5312; @@ -288,8 +288,10 @@ int __init ar5312_init_devices(void) ar5312_devs[dev++] = &ar5312_physmap_flash; +#ifdef CONFIG_LEDS_GPIO ar5312_leds[0].gpio = bcfg->sysLedGpio; ar5312_devs[dev++] = &ar5312_gpio_leds; +#endif if (!memcmp(bcfg->enet0Mac, "\xff\xff\xff\xff\xff\xff", 6)) memcpy(bcfg->enet0Mac, bcfg->enet1Mac, 6); @@ -363,7 +365,7 @@ static int __initdata CLOCKCTL1_PREDIVIDE_TABLE[4] = { 5 }; - + static unsigned int __init ar5312_cpu_frequency(void) { unsigned int result; @@ -391,7 +393,7 @@ static unsigned int __init ar5312_cpu_frequency(void) multiplier_shift = AR5312_CLOCKCTL1_MULTIPLIER_SHIFT; doubler_mask = AR5312_CLOCKCTL1_DOUBLER_MASK; } - + /* * Clocking is derived from a fixed 40MHz input clock. * @@ -400,9 +402,9 @@ static unsigned int __init ar5312_cpu_frequency(void) * flash, Timer, Watchdog Timer) * * cntFreq = cpuFreq / 2 (use for CPU count/compare) - * + * * So, for example, with a PLL multiplier of 5, we have - * + * * cpuFreq = 200MHz * sysFreq = 50MHz * cntFreq = 100MHz @@ -414,7 +416,7 @@ static unsigned int __init ar5312_cpu_frequency(void) preDivideSelect = (clockCtl1 & predivide_mask) >> predivide_shift; preDivisor = CLOCKCTL1_PREDIVIDE_TABLE[preDivideSelect]; multiplier = (clockCtl1 & multiplier_mask) >> multiplier_shift; - + if (clockCtl1 & doubler_mask) { multiplier = multiplier << 1; } @@ -446,7 +448,7 @@ void __init ar5312_prom_init(void) + (bank1AC ? (1 << (bank1AC+1)) : 0); memsize <<= 20; add_memory_region(0, memsize, BOOT_MEM_RAM); - + /* Initialize it to AR5312 for now. Real detection will be done * in ar5312_init_devices() */ mips_machtype = MACH_ATHEROS_AR5312; diff --git a/target/linux/atheros/files/arch/mips/atheros/ar5315/board.c b/target/linux/atheros/files/arch/mips/atheros/ar5315/board.c index 28df6587c9..eafde33780 100644 --- a/target/linux/atheros/files/arch/mips/atheros/ar5315/board.c +++ b/target/linux/atheros/files/arch/mips/atheros/ar5315/board.c @@ -150,7 +150,7 @@ static __u8 spiflash_probe(void) (1 << 4) | SPI_CTL_START; spiflash_regwrite32(SPI_FLASH_CTL, reg); - + do { reg = spiflash_regread32(SPI_FLASH_CTL); } while (reg & SPI_CTL_BUSY); @@ -236,17 +236,19 @@ int __init ar5315_init_devices(void) config->radio = radio_config; config->unit = 0; config->tag = (u_int16_t) (sysRegRead(AR5315_SREV) & AR5315_REV_CHIP); - + ar5315_eth_data.board_config = board_config; ar5315_eth_data.macaddr = bcfg->enet0Mac; ar5315_wmac.dev.platform_data = config; - ar5315_leds[0].gpio = bcfg->sysLedGpio; - ar5315_devs[dev++] = &ar5315_eth; ar5315_devs[dev++] = &ar5315_wmac; ar5315_devs[dev++] = &ar5315_spiflash; + +#ifdef CONFIG_LEDS_GPIO + ar5315_leds[0].gpio = bcfg->sysLedGpio; ar5315_devs[dev++] = &ar5315_gpio_leds; +#endif return platform_add_devices(ar5315_devs, dev); } @@ -269,7 +271,7 @@ static void ar5315_restart(char *command) /* reset the system */ sysRegWrite(AR5315_COLD_RESET,AR5317_RESET_SYSTEM); - /* + /* * Cold reset does not work on the AR2315/6, use the GPIO reset bits a workaround. */ gpio_direction_output(AR5315_RESET_GPIO, 0); @@ -326,11 +328,11 @@ ar5315_sys_clk(unsigned int clockCtl) clkDiv = 1; break; } - cpuDiv = (clockCtl & CPUCLK_CLK_DIV_M) >> CPUCLK_CLK_DIV_S; + cpuDiv = (clockCtl & CPUCLK_CLK_DIV_M) >> CPUCLK_CLK_DIV_S; cpuDiv = cpuDiv * 2 ?: 1; return (pllcOut/(clkDiv * cpuDiv)); } - + static inline unsigned int ar5315_cpu_frequency(void) { return ar5315_sys_clk(sysRegRead(AR5315_CPUCLK)); |