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author | John Crispin <blogic@openwrt.org> | 2008-04-03 20:28:10 +0000 |
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committer | John Crispin <blogic@openwrt.org> | 2008-04-03 20:28:10 +0000 |
commit | 6766d68c8526d03c8080f54a1348a2d0948f38c4 (patch) | |
tree | d5e82292716c3d80a459d15808dbff126cdc5485 /target/linux/atheros/files/include/asm-mips/mach-atheros/gpio.h | |
parent | e4ef075c565397307b3ae809bb901db017d3b046 (diff) | |
download | upstream-6766d68c8526d03c8080f54a1348a2d0948f38c4.tar.gz upstream-6766d68c8526d03c8080f54a1348a2d0948f38c4.tar.bz2 upstream-6766d68c8526d03c8080f54a1348a2d0948f38c4.zip |
add gpio support to atheros, fixes #1861, thanks Othello
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@10724 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/atheros/files/include/asm-mips/mach-atheros/gpio.h')
-rw-r--r-- | target/linux/atheros/files/include/asm-mips/mach-atheros/gpio.h | 134 |
1 files changed, 134 insertions, 0 deletions
diff --git a/target/linux/atheros/files/include/asm-mips/mach-atheros/gpio.h b/target/linux/atheros/files/include/asm-mips/mach-atheros/gpio.h new file mode 100644 index 0000000000..560b8cc0dc --- /dev/null +++ b/target/linux/atheros/files/include/asm-mips/mach-atheros/gpio.h @@ -0,0 +1,134 @@ +#ifndef _ATHEROS_GPIO_H_ +#define _ATHEROS_GPIO_H_ + +#include "ar531x.h" + +/* Common AR531X global variables */ +/* extern u32 ar531x_gpio_intr_Mask; */ + +/* AR5312 exported routines */ +#ifdef CONFIG_ATHEROS_AR5312 +asmlinkage void ar5312_gpio_irq_dispatch(void); +#endif + +/* AR5315 exported routines */ +#ifdef CONFIG_ATHEROS_AR5315 +asmlinkage void ar5315_gpio_irq_dispatch(void); +#endif + +/* + * Wrappers for the generic GPIO layer + */ + +/* Sets a gpio to input, or returns ENXIO for non-existent gpio */ +static inline int gpio_direction_input(unsigned gpio) { + DO_AR5312( if (gpio > AR531X_NUM_GPIO) { \ + return -ENXIO; \ + } else { \ + sysRegWrite(AR531X_GPIO_CR, \ + ( sysRegRead(AR531X_GPIO_CR) & \ + ~(AR531X_GPIO_CR_M(gpio)) ) | \ + AR531X_GPIO_CR_I(gpio) ); \ + return 0; \ + } \ + ) + DO_AR5315( if (gpio > AR5315_NUM_GPIO) { \ + return -ENXIO; \ + } else { \ + sysRegWrite(AR5315_GPIO_CR, \ + ( sysRegRead(AR5315_GPIO_CR) & \ + ~(AR5315_GPIO_CR_M(gpio)) ) | \ + AR5315_GPIO_CR_I(gpio) ); \ + return 0; \ + } \ + ) +} + +/* Sets a gpio to output with value, or returns ENXIO for non-existent gpio */ +static inline int gpio_direction_output(unsigned gpio, int value) { + DO_AR5312( if (gpio > AR531X_NUM_GPIO) { \ + return -ENXIO; \ + } else { \ + sysRegWrite(AR531X_GPIO_DO, \ + ( (sysRegRead(AR531X_GPIO_DO) & \ + ~(1 << gpio) ) | \ + ((value!=0) << gpio)) ); \ + sysRegWrite(AR531X_GPIO_CR, \ + sysRegRead(AR531X_GPIO_CR) | \ + AR531X_GPIO_CR_O(gpio) ); \ + return 0; \ + } \ + ) + DO_AR5315( if (gpio > AR5315_NUM_GPIO) { \ + return -ENXIO; \ + } else { \ + sysRegWrite(AR5315_GPIO_DO, \ + ( (sysRegRead(AR5315_GPIO_DO) & \ + ~(1 << gpio)) | \ + ((value!=0) << gpio)) ); \ + sysRegWrite(AR5315_GPIO_CR, \ + sysRegRead(AR5315_GPIO_CR) | \ + AR5315_GPIO_CR_O(gpio) ); \ + return 0; \ + } \ + ) +} + +/* Reads the gpio pin. Unchecked function */ +static inline int gpio_get_value(unsigned gpio) { + DO_AR5312(return (sysRegRead(AR531X_GPIO_DI) & (1 << gpio));) + DO_AR5315(return (sysRegRead(AR5315_GPIO_DI) & (1 << gpio));) +} + +/* Writes to the gpio pin. Unchecked function */ +static inline void gpio_set_value(unsigned gpio, int value) { + DO_AR5312( sysRegWrite(AR531X_GPIO_DO, \ + ( (sysRegRead(AR531X_GPIO_DO) & \ + ~(1 << gpio)) | \ + ((value!=0) << gpio)) ); \ + ) + DO_AR5315( sysRegWrite(AR5315_GPIO_DO, \ + ( (sysRegRead(AR5315_GPIO_DO) & \ + ~(1 << gpio)) | \ + ((value!=0) << gpio)) ); \ + ) +} + +static inline int gpio_request(unsigned gpio, const char *label) { + return 0; +} + +static inline void gpio_free(unsigned gpio) { +} + +/* Returns IRQ to attach for gpio. Unchecked function */ +static inline int gpio_to_irq(unsigned gpio) { + return AR531X_GPIO_IRQ(gpio); +} + +/* Returns gpio for IRQ attached. Unchecked function */ +static inline int irq_to_gpio(unsigned irq) { + return (irq - (AR531X_GPIO_IRQ(0))); +} + +/* #include <asm-generic/gpio.h> */ /* cansleep wrappers */ +/* platforms that don't directly support access to GPIOs through I2C, SPI, + * or other blocking infrastructure can use these wrappers. + */ + +static inline int gpio_cansleep(unsigned gpio) { + return 0; +} + +static inline int gpio_get_value_cansleep(unsigned gpio) { + might_sleep(); + return gpio_get_value(gpio); +} + +static inline void gpio_set_value_cansleep(unsigned gpio, int value) { + might_sleep(); + gpio_set_value(gpio, value); +} + +#endif + |