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| author | Felix Fietkau <nbd@openwrt.org> | 2007-02-15 21:52:13 +0000 |
|---|---|---|
| committer | Felix Fietkau <nbd@openwrt.org> | 2007-02-15 21:52:13 +0000 |
| commit | c13d383c2be23f646e0de054eb8ea7d4bce115f6 (patch) | |
| tree | 535ee81af6671dcd01e015eb9e2de7b2e9acd954 /target/linux/atheros-2.6/files/arch/mips/atheros/ar5312.c | |
| parent | e7697a9ab6c1fdd770e31dc95c3e79246613360c (diff) | |
| download | upstream-c13d383c2be23f646e0de054eb8ea7d4bce115f6.tar.gz upstream-c13d383c2be23f646e0de054eb8ea7d4bce115f6.tar.bz2 upstream-c13d383c2be23f646e0de054eb8ea7d4bce115f6.zip | |
some ar531x cleanup
SVN-Revision: 6302
Diffstat (limited to 'target/linux/atheros-2.6/files/arch/mips/atheros/ar5312.c')
| -rw-r--r-- | target/linux/atheros-2.6/files/arch/mips/atheros/ar5312.c | 24 |
1 files changed, 9 insertions, 15 deletions
diff --git a/target/linux/atheros-2.6/files/arch/mips/atheros/ar5312.c b/target/linux/atheros-2.6/files/arch/mips/atheros/ar5312.c index 28b9d3f958..4e1beaae38 100644 --- a/target/linux/atheros-2.6/files/arch/mips/atheros/ar5312.c +++ b/target/linux/atheros-2.6/files/arch/mips/atheros/ar5312.c @@ -30,12 +30,6 @@ #include "ar531x.h" -#define AR531X_IRQ_WLAN0_INTRS MIPS_CPU_IRQ_BASE+2 /* C0_CAUSE: 0x0400 */ -#define AR531X_IRQ_ENET0_INTRS MIPS_CPU_IRQ_BASE+3 /* C0_CAUSE: 0x0800 */ -#define AR531X_IRQ_ENET1_INTRS MIPS_CPU_IRQ_BASE+4 /* C0_CAUSE: 0x1000 */ -#define AR531X_IRQ_WLAN1_INTRS MIPS_CPU_IRQ_BASE+5 /* C0_CAUSE: 0x2000 */ -#define AR531X_IRQ_MISC_INTRS MIPS_CPU_IRQ_BASE+6 /* C0_CAUSE: 0x4000 */ - static struct platform_device *ar5312_devs[5]; @@ -49,8 +43,8 @@ static struct resource ar5312_eth0_res[] = { { .name = "eth_irq", .flags = IORESOURCE_IRQ, - .start = AR531X_IRQ_ENET0_INTRS, - .end = AR531X_IRQ_ENET0_INTRS, + .start = AR5312_IRQ_ENET0_INTRS, + .end = AR5312_IRQ_ENET0_INTRS, }, }; @@ -65,8 +59,8 @@ static struct resource ar5312_eth1_res[] = { { .name = "eth_irq", .flags = IORESOURCE_IRQ, - .start = AR531X_IRQ_ENET1_INTRS, - .end = AR531X_IRQ_ENET1_INTRS, + .start = AR5312_IRQ_ENET1_INTRS, + .end = AR5312_IRQ_ENET1_INTRS, }, }; @@ -221,13 +215,13 @@ asmlinkage void ar5312_irq_dispatch(void) int pending = read_c0_status() & read_c0_cause(); if (pending & CAUSEF_IP2) - do_IRQ(AR531X_IRQ_WLAN0_INTRS); + do_IRQ(AR5312_IRQ_WLAN0_INTRS); else if (pending & CAUSEF_IP3) - do_IRQ(AR531X_IRQ_ENET0_INTRS); + do_IRQ(AR5312_IRQ_ENET0_INTRS); else if (pending & CAUSEF_IP4) - do_IRQ(AR531X_IRQ_ENET1_INTRS); + do_IRQ(AR5312_IRQ_ENET1_INTRS); else if (pending & CAUSEF_IP5) - do_IRQ(AR531X_IRQ_WLAN1_INTRS); + do_IRQ(AR5312_IRQ_WLAN1_INTRS); else if (pending & CAUSEF_IP6) { unsigned int ar531x_misc_intrs = sysRegRead(AR531X_ISR) & sysRegRead(AR531X_IMR); @@ -448,7 +442,7 @@ void __init ar5312_misc_intr_init(int irq_base) irq_desc[i].chip = &ar5312_misc_intr_controller; } setup_irq(AR531X_MISC_IRQ_AHB_PROC, &ar5312_ahb_proc_interrupt); - setup_irq(AR531X_IRQ_MISC_INTRS, &cascade); + setup_irq(AR5312_IRQ_MISC_INTRS, &cascade); } |