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authorINAGAKI Hiroshi <musashino.open@gmail.com>2018-12-08 14:52:42 +0900
committerChristian Lamparter <chunkeey@gmail.com>2018-12-24 19:18:07 +0100
commit10a54e144252be25106f36ad75f924b7b3c53255 (patch)
tree6f3126e2a80ed3476cef06cafdf4c4affa3ce730 /target/linux/ath79
parent212f2a63eb065769bcbe5d408f071c24033cb6f4 (diff)
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ath79: fix pinmux reg value for QCA956x
The range of pinmux reg property "<0x1804002c 0x40>" for QCA956x SoC does not includes GPIO_FUNCTION register. If the device uses "&jtag_disable_pins", this causes the following errors: [ 1.982937] pinctrl-single 1804002c.pinmux: mux offset out of range: 0x40 (0x40) [ 1.990622] pinctrl-single 1804002c.pinmux: could not add functions for pinmux_jtag_disable_pins 64x Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
Diffstat (limited to 'target/linux/ath79')
-rw-r--r--target/linux/ath79/dts/qca956x.dtsi2
1 files changed, 1 insertions, 1 deletions
diff --git a/target/linux/ath79/dts/qca956x.dtsi b/target/linux/ath79/dts/qca956x.dtsi
index 248c001cd2..b6f7dcaff3 100644
--- a/target/linux/ath79/dts/qca956x.dtsi
+++ b/target/linux/ath79/dts/qca956x.dtsi
@@ -71,7 +71,7 @@
pinmux: pinmux@1804002c {
compatible = "pinctrl-single";
- reg = <0x1804002c 0x40>;
+ reg = <0x1804002c 0x44>;
#size-cells = <0>;