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author | Sander Vanheule <sander@svanheule.net> | 2020-07-16 21:27:06 +0200 |
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committer | Petr Štetiar <ynezz@true.cz> | 2020-11-23 22:53:15 +0100 |
commit | 7a875d155ed90ef8dc44efd898e4f5d55659ee1a (patch) | |
tree | fd808b4a147d95574cc07b3a78214ef5464ec1ca /target/linux/ath79 | |
parent | 87627b2d760cd2ac341dd3181ce6f987d69777c2 (diff) | |
download | upstream-7a875d155ed90ef8dc44efd898e4f5d55659ee1a.tar.gz upstream-7a875d155ed90ef8dc44efd898e4f5d55659ee1a.tar.bz2 upstream-7a875d155ed90ef8dc44efd898e4f5d55659ee1a.zip |
ath79: prepare for 1-port TP-Link EAP2x5 devices
TP-Link has developed a number of access points based on the AP152
reference board. In the EAP-series of 802.11ac access points, this
includes the following devices with one ethernet port:
* EAP225 v1/v2
* EAP225 v3
* EAP225-Outdoor v1
* EAP245 v1
Since the only differences between these devices are the ath10k wireless
radios and LEDs, a common base is provided for the overlapping support
requirements.
Hardware commonalities:
* SoC: QCA9563-AL3A MIPS 74kc v5.0 @ 775MHz, AHB @ 258MHz
* RAM: 128MiB DDR2 @ 650MHz
* Flash: 16MiB SPI NOR
* Wi-Fi 2.4GHz: provided by SoC
* Wi-Fi 5Ghz: ath10k chip on PCIe
* Ethernet: AR8033-AL1A, one 1GbE port (802.3at PoE)
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Diffstat (limited to 'target/linux/ath79')
-rw-r--r-- | target/linux/ath79/dts/qca9563_tplink_eap2x5-1port.dtsi | 135 |
1 files changed, 135 insertions, 0 deletions
diff --git a/target/linux/ath79/dts/qca9563_tplink_eap2x5-1port.dtsi b/target/linux/ath79/dts/qca9563_tplink_eap2x5-1port.dtsi new file mode 100644 index 0000000000..4c550fff6e --- /dev/null +++ b/target/linux/ath79/dts/qca9563_tplink_eap2x5-1port.dtsi @@ -0,0 +1,135 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "qca956x.dtsi" + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> + +/ { + aliases { + label-mac-device = ð0; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "Reset button"; + linux,code = <KEY_RESTART>; + gpios = <&gpio 2 GPIO_ACTIVE_LOW>; + debounce-interval = <60>; + }; + }; +}; + +&pcie { + status = "okay"; +}; + +&uart { + status = "okay"; +}; + +&spi { + status = "okay"; + num-cs = <1>; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <25000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "u-boot"; + reg = <0x000000 0x020000>; + read-only; + }; + + partition@20000 { + label = "partition-table"; + reg = <0x020000 0x010000>; + read-only; + }; + + info: partition@30000 { + label = "info"; + reg = <0x030000 0x010000>; + read-only; + }; + + partition@40000 { + compatible = "openwrt,elf"; + label = "firmware"; + reg = <0x040000 0xd80000>; + }; + + partition@dc0000 { + label = "config"; + reg = <0xdc0000 0x030000>; + read-only; + }; + + /* df0000-f30000 undefined in vendor firmware */ + + partition@f30000 { + label = "log"; + reg = <0xf30000 0x0c0000>; + read-only; + }; + + art: partition@ff0000 { + label = "art"; + reg = <0xff0000 0x010000>; + read-only; + }; + }; + }; +}; + +&pinmux { + mdio_pins: mdio_pins { + /* GPIO 10 as MDIO(0x20), GPIO 8 as MDC(0x21) */ + pinctrl-single,bits = <0x8 0x00200021 0x00ff00ff>; + }; +}; + +&mdio0 { + status = "okay"; + + pinctrl-names = "default"; + pinctrl-0 = <&mdio_pins>; + + phy-mask = <0x10>; + + phy4: ethernet-phy@4 { + reg = <4>; + reset-gpios = <&gpio 11 GPIO_ACTIVE_LOW>; + }; +}; + +ð0 { + status = "okay"; + + phy-handle = <&phy4>; + phy-mode = "sgmii"; + + mtd-mac-address = <&info 0x8>; + + qca956x-serdes-fixup; + + gmac-config { + device = <&gmac>; + }; +}; + +&wmac { + status = "okay"; + + mtd-cal-data = <&art 0x1000>; + mtd-mac-address = <&info 0x8>; +}; |