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| author | David Bauer <mail@david-bauer.net> | 2022-03-27 23:12:39 +0200 |
|---|---|---|
| committer | David Bauer <mail@david-bauer.net> | 2022-03-30 17:28:39 +0200 |
| commit | 9a0155bc4fa3642cdf930d50098bc929173f170f (patch) | |
| tree | 3e1387b63be3e1fc8124d5b447d35b1d6273fcc7 /target/linux/ath79/patches-5.15/0017-dt-bindings-PCI-qcom-ar7100-adds-binding-doc.patch | |
| parent | fc94c0d203d1c97d3dfdd045fb57b1cb7826e491 (diff) | |
| download | upstream-9a0155bc4fa3642cdf930d50098bc929173f170f.tar.gz upstream-9a0155bc4fa3642cdf930d50098bc929173f170f.tar.bz2 upstream-9a0155bc4fa3642cdf930d50098bc929173f170f.zip | |
ath79: add 5.15 support for generic subtarget
Add Kernel 5.15 patches + config. This is currently only available for
the generic subtarget, as it was exclusively tested with this target.
Tested-on: Siemens WS-AP3610, Enterasys WS-AP3705i
Signed-off-by: David Bauer <mail@david-bauer.net>
Diffstat (limited to 'target/linux/ath79/patches-5.15/0017-dt-bindings-PCI-qcom-ar7100-adds-binding-doc.patch')
| -rw-r--r-- | target/linux/ath79/patches-5.15/0017-dt-bindings-PCI-qcom-ar7100-adds-binding-doc.patch | 57 |
1 files changed, 57 insertions, 0 deletions
diff --git a/target/linux/ath79/patches-5.15/0017-dt-bindings-PCI-qcom-ar7100-adds-binding-doc.patch b/target/linux/ath79/patches-5.15/0017-dt-bindings-PCI-qcom-ar7100-adds-binding-doc.patch new file mode 100644 index 0000000000..bf7eb691a5 --- /dev/null +++ b/target/linux/ath79/patches-5.15/0017-dt-bindings-PCI-qcom-ar7100-adds-binding-doc.patch @@ -0,0 +1,57 @@ +From 4a4f869ec58ed8910b9b2e68d0eee50957e9bb20 Mon Sep 17 00:00:00 2001 +From: John Crispin <john@phrozen.org> +Date: Mon, 25 Jun 2018 15:52:10 +0200 +Subject: [PATCH 17/33] dt-bindings: PCI: qcom,ar7100: adds binding doc + +With the driver being converted from platform_data to pure OF, we need to +also add some docs. + +Cc: Rob Herring <robh+dt@kernel.org> +Cc: devicetree@vger.kernel.org +Signed-off-by: John Crispin <john@phrozen.org> +--- + .../devicetree/bindings/pci/qcom,ar7100-pci.txt | 38 ++++++++++++++++++++++ + 1 file changed, 38 insertions(+) + create mode 100644 Documentation/devicetree/bindings/pci/qcom,ar7100-pci.txt + +--- /dev/null ++++ b/Documentation/devicetree/bindings/pci/qcom,ar7100-pci.txt +@@ -0,0 +1,38 @@ ++* Qualcomm Atheros AR7100 PCI express root complex ++ ++Required properties: ++- compatible: should contain "qcom,ar7100-pci" to identify the core. ++- reg: Should contain the register ranges as listed in the reg-names property. ++- reg-names: Definition: Must include the following entries ++ - "cfg_base" IO Memory ++- #address-cells: set to <3> ++- #size-cells: set to <2> ++- ranges: ranges for the PCI memory and I/O regions ++- interrupt-map-mask and interrupt-map: standard PCI ++ properties to define the mapping of the PCIe interface to interrupt ++ numbers. ++- #interrupt-cells: set to <1> ++- interrupt-controller: define to enable the builtin IRQ cascade. ++ ++Optional properties: ++- interrupt-parent: phandle to the MIPS IRQ controller ++ ++* Example for ar7100 ++ pcie-controller@180c0000 { ++ compatible = "qca,ar7100-pci"; ++ #address-cells = <3>; ++ #size-cells = <2>; ++ bus-range = <0x0 0x0>; ++ reg = <0x17010000 0x100>; ++ reg-names = "cfg_base"; ++ ranges = <0x2000000 0 0x10000000 0x10000000 0 0x07000000 ++ 0x1000000 0 0x00000000 0x00000000 0 0x00000001>; ++ interrupt-parent = <&cpuintc>; ++ interrupts = <2>; ++ ++ interrupt-controller; ++ #interrupt-cells = <1>; ++ ++ interrupt-map-mask = <0 0 0 1>; ++ interrupt-map = <0 0 0 0 &pcie0 0>; ++ }; |