aboutsummaryrefslogtreecommitdiffstats
path: root/target/linux/ath79/patches-5.10/0034-MIPS-ath79-ath9k-exports.patch
diff options
context:
space:
mode:
authorDavid Bauer <mail@david-bauer.net>2021-02-17 01:29:44 +0100
committerDavid Bauer <mail@david-bauer.net>2021-02-20 01:26:33 +0100
commitd6b785d47739a84611088ab26256fa5808d06a9d (patch)
treed45ffa6e6182ce80ec35663de8c514888655e1b8 /target/linux/ath79/patches-5.10/0034-MIPS-ath79-ath9k-exports.patch
parentfb64e2c30f0cba887d3b183ce52de36b3e8bbb7e (diff)
downloadupstream-d6b785d47739a84611088ab26256fa5808d06a9d.tar.gz
upstream-d6b785d47739a84611088ab26256fa5808d06a9d.tar.bz2
upstream-d6b785d47739a84611088ab26256fa5808d06a9d.zip
ath79: add kernel 5.10 support
This adds Kernel 5.10 support for the generic, nand and tiny subtargets. The following patch is not contained, as it needs to be reworked: platform/920-mikrotik-rb4xx.patch Tested-on: - Siemens WS-AP3610 - Enterasys WS-AP3710 - Aerohive HiveAP 121 - TP-Link TL-WA901 v2 - TP-Link TL-WR741 v1 Signed-off-by: David Bauer <mail@david-bauer.net>
Diffstat (limited to 'target/linux/ath79/patches-5.10/0034-MIPS-ath79-ath9k-exports.patch')
-rw-r--r--target/linux/ath79/patches-5.10/0034-MIPS-ath79-ath9k-exports.patch27
1 files changed, 27 insertions, 0 deletions
diff --git a/target/linux/ath79/patches-5.10/0034-MIPS-ath79-ath9k-exports.patch b/target/linux/ath79/patches-5.10/0034-MIPS-ath79-ath9k-exports.patch
new file mode 100644
index 0000000000..71acc22210
--- /dev/null
+++ b/target/linux/ath79/patches-5.10/0034-MIPS-ath79-ath9k-exports.patch
@@ -0,0 +1,27 @@
+--- a/arch/mips/ath79/common.c
++++ b/arch/mips/ath79/common.c
+@@ -31,11 +31,13 @@ EXPORT_SYMBOL_GPL(ath79_ddr_freq);
+
+ enum ath79_soc_type ath79_soc;
+ unsigned int ath79_soc_rev;
++EXPORT_SYMBOL_GPL(ath79_soc_rev);
+
+ void __iomem *ath79_pll_base;
+ void __iomem *ath79_reset_base;
+ EXPORT_SYMBOL_GPL(ath79_reset_base);
+-static void __iomem *ath79_ddr_base;
++void __iomem *ath79_ddr_base;
++EXPORT_SYMBOL_GPL(ath79_ddr_base);
+ static void __iomem *ath79_ddr_wb_flush_base;
+ static void __iomem *ath79_ddr_pci_win_base;
+
+--- a/arch/mips/include/asm/mach-ath79/ath79.h
++++ b/arch/mips/include/asm/mach-ath79/ath79.h
+@@ -149,6 +149,7 @@ void ath79_ddr_wb_flush(unsigned int reg
+ void ath79_ddr_set_pci_windows(void);
+
+ extern void __iomem *ath79_pll_base;
++extern void __iomem *ath79_ddr_base;
+ extern void __iomem *ath79_reset_base;
+
+ static inline void ath79_pll_wr(unsigned reg, u32 val)