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authorJohn Crispin <john@phrozen.org>2018-05-14 07:11:56 +0200
committerJohn Crispin <john@phrozen.org>2018-05-24 15:43:39 +0200
commit83fb9ec5e0d175f99286dacda2f68c776c203f88 (patch)
treeb4b813d6c6b61049cd1c782292751f25d989296e /target/linux/ath79/patches-4.14
parentbcf20e05832aa8b00ab4b5e67a112d7910cca2d0 (diff)
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ath79: make ahb wifi work
Signed-off-by: John Crispin <john@phrozen.org>
Diffstat (limited to 'target/linux/ath79/patches-4.14')
-rw-r--r--target/linux/ath79/patches-4.14/0034-MIPS-ath79-ath9k-exports.patch31
1 files changed, 31 insertions, 0 deletions
diff --git a/target/linux/ath79/patches-4.14/0034-MIPS-ath79-ath9k-exports.patch b/target/linux/ath79/patches-4.14/0034-MIPS-ath79-ath9k-exports.patch
new file mode 100644
index 0000000000..fddacc6853
--- /dev/null
+++ b/target/linux/ath79/patches-4.14/0034-MIPS-ath79-ath9k-exports.patch
@@ -0,0 +1,31 @@
+Index: linux-4.14.42/arch/mips/ath79/common.c
+===================================================================
+--- linux-4.14.42.orig/arch/mips/ath79/common.c
++++ linux-4.14.42/arch/mips/ath79/common.c
+@@ -34,11 +34,13 @@ EXPORT_SYMBOL_GPL(ath79_ddr_freq);
+
+ enum ath79_soc_type ath79_soc;
+ unsigned int ath79_soc_rev;
++EXPORT_SYMBOL_GPL(ath79_soc_rev);
+
+ void __iomem *ath79_pll_base;
+ void __iomem *ath79_reset_base;
+ EXPORT_SYMBOL_GPL(ath79_reset_base);
+-static void __iomem *ath79_ddr_base;
++void __iomem *ath79_ddr_base;
++EXPORT_SYMBOL_GPL(ath79_ddr_base);
+ static void __iomem *ath79_ddr_wb_flush_base;
+ static void __iomem *ath79_ddr_pci_win_base;
+
+Index: linux-4.14.42/arch/mips/include/asm/mach-ath79/ath79.h
+===================================================================
+--- linux-4.14.42.orig/arch/mips/include/asm/mach-ath79/ath79.h
++++ linux-4.14.42/arch/mips/include/asm/mach-ath79/ath79.h
+@@ -152,6 +152,7 @@ void ath79_ddr_wb_flush(unsigned int reg
+ void ath79_ddr_set_pci_windows(void);
+
+ extern void __iomem *ath79_pll_base;
++extern void __iomem *ath79_ddr_base;
+ extern void __iomem *ath79_reset_base;
+
+ static inline void ath79_pll_wr(unsigned reg, u32 val)