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| author | John Crispin <john@phrozen.org> | 2018-05-06 10:20:11 +0200 |
|---|---|---|
| committer | John Crispin <john@phrozen.org> | 2018-05-07 08:06:51 +0200 |
| commit | 53c474abbdfef8eb3499e2d10c9ad491788b8a72 (patch) | |
| tree | acd19415420664f59bc63c1ceb4ad37bb7323027 /target/linux/ath79/patches-4.14/0015-MIPS-ath79-enable-uart-during-early_prink.patch | |
| parent | 3dc523f232ff01d31d59345f5fa6de508d5059ef (diff) | |
| download | upstream-53c474abbdfef8eb3499e2d10c9ad491788b8a72.tar.gz upstream-53c474abbdfef8eb3499e2d10c9ad491788b8a72.tar.bz2 upstream-53c474abbdfef8eb3499e2d10c9ad491788b8a72.zip | |
ath79: add new OF only target for QCA MIPS silicon
This target aims to replace ar71xx mid-term. The big part that is still
missing is making the MMIO/AHB wifi work using OF. NAND and mikrotik
subtargets will follow.
Signed-off-by: John Crispin <john@phrozen.org>
Diffstat (limited to 'target/linux/ath79/patches-4.14/0015-MIPS-ath79-enable-uart-during-early_prink.patch')
| -rw-r--r-- | target/linux/ath79/patches-4.14/0015-MIPS-ath79-enable-uart-during-early_prink.patch | 76 |
1 files changed, 76 insertions, 0 deletions
diff --git a/target/linux/ath79/patches-4.14/0015-MIPS-ath79-enable-uart-during-early_prink.patch b/target/linux/ath79/patches-4.14/0015-MIPS-ath79-enable-uart-during-early_prink.patch new file mode 100644 index 0000000000..a466037275 --- /dev/null +++ b/target/linux/ath79/patches-4.14/0015-MIPS-ath79-enable-uart-during-early_prink.patch @@ -0,0 +1,76 @@ +From b14f8260724abec6c82970085dece6a143d3a0db Mon Sep 17 00:00:00 2001 +From: Gabor Juhos <juhosg@openwrt.org> +Date: Mon, 5 Mar 2018 11:38:21 +0100 +Subject: [PATCH 15/27] MIPS: ath79: enable uart during early_prink + +Signed-off-by: Gabor Juhos <juhosg@openwrt.org> +--- + arch/mips/ath79/early_printk.c | 44 +++++++++++++++++++++++++++++++++++++++++- + 1 file changed, 43 insertions(+), 1 deletion(-) + +diff --git a/arch/mips/ath79/early_printk.c b/arch/mips/ath79/early_printk.c +index d1adc59af5bf..ec3978678653 100644 +--- a/arch/mips/ath79/early_printk.c ++++ b/arch/mips/ath79/early_printk.c +@@ -58,6 +58,46 @@ static void prom_putchar_dummy(unsigned char ch) + /* nothing to do */ + } + ++static void prom_enable_uart(u32 id) ++{ ++ void __iomem *gpio_base; ++ u32 uart_en; ++ u32 t; ++ ++ switch (id) { ++ case REV_ID_MAJOR_AR71XX: ++ uart_en = AR71XX_GPIO_FUNC_UART_EN; ++ break; ++ ++ case REV_ID_MAJOR_AR7240: ++ case REV_ID_MAJOR_AR7241: ++ case REV_ID_MAJOR_AR7242: ++ uart_en = AR724X_GPIO_FUNC_UART_EN; ++ break; ++ ++ case REV_ID_MAJOR_AR913X: ++ uart_en = AR913X_GPIO_FUNC_UART_EN; ++ break; ++ ++ case REV_ID_MAJOR_AR9330: ++ case REV_ID_MAJOR_AR9331: ++ uart_en = AR933X_GPIO_FUNC_UART_EN; ++ break; ++ ++ case REV_ID_MAJOR_AR9341: ++ case REV_ID_MAJOR_AR9342: ++ case REV_ID_MAJOR_AR9344: ++ /* TODO */ ++ default: ++ return; ++ } ++ ++ gpio_base = (void __iomem *)(KSEG1ADDR(AR71XX_GPIO_BASE)); ++ t = __raw_readl(gpio_base + AR71XX_GPIO_REG_FUNC); ++ t |= uart_en; ++ __raw_writel(t, gpio_base + AR71XX_GPIO_REG_FUNC); ++} ++ + static void prom_putchar_init(void) + { + void __iomem *base; +@@ -88,8 +128,10 @@ static void prom_putchar_init(void) + + default: + _prom_putchar = prom_putchar_dummy; +- break; ++ return; + } ++ ++ prom_enable_uart(id); + } + + void prom_putchar(unsigned char ch) +-- +2.11.0 + |