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author | John Crispin <john@phrozen.org> | 2018-05-06 10:20:11 +0200 |
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committer | John Crispin <john@phrozen.org> | 2018-05-07 08:06:51 +0200 |
commit | 53c474abbdfef8eb3499e2d10c9ad491788b8a72 (patch) | |
tree | acd19415420664f59bc63c1ceb4ad37bb7323027 /target/linux/ath79/patches-4.14/0011-MIPS-ath79-fix-register-address-in-ath79_ddr_wb_flus.patch | |
parent | 3dc523f232ff01d31d59345f5fa6de508d5059ef (diff) | |
download | upstream-53c474abbdfef8eb3499e2d10c9ad491788b8a72.tar.gz upstream-53c474abbdfef8eb3499e2d10c9ad491788b8a72.tar.bz2 upstream-53c474abbdfef8eb3499e2d10c9ad491788b8a72.zip |
ath79: add new OF only target for QCA MIPS silicon
This target aims to replace ar71xx mid-term. The big part that is still
missing is making the MMIO/AHB wifi work using OF. NAND and mikrotik
subtargets will follow.
Signed-off-by: John Crispin <john@phrozen.org>
Diffstat (limited to 'target/linux/ath79/patches-4.14/0011-MIPS-ath79-fix-register-address-in-ath79_ddr_wb_flus.patch')
-rw-r--r-- | target/linux/ath79/patches-4.14/0011-MIPS-ath79-fix-register-address-in-ath79_ddr_wb_flus.patch | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/target/linux/ath79/patches-4.14/0011-MIPS-ath79-fix-register-address-in-ath79_ddr_wb_flus.patch b/target/linux/ath79/patches-4.14/0011-MIPS-ath79-fix-register-address-in-ath79_ddr_wb_flus.patch new file mode 100644 index 0000000000..c7ad39e128 --- /dev/null +++ b/target/linux/ath79/patches-4.14/0011-MIPS-ath79-fix-register-address-in-ath79_ddr_wb_flus.patch @@ -0,0 +1,32 @@ +From 54204ef3edbb1aa2390cabba61fe185a12cc39f0 Mon Sep 17 00:00:00 2001 +From: Felix Fietkau <nbd@nbd.name> +Date: Tue, 6 Mar 2018 08:35:44 +0100 +Subject: [PATCH 11/27] MIPS: ath79: fix register address in + ath79_ddr_wb_flush() + +ath79_ddr_wb_flush_base has the type void __iomem *, so register offsets +need to be a multiple of 4. + +Cc: Alban Bedel <albeu@free.fr> +Fixes: 24b0e3e84fbf ("MIPS: ath79: Improve the DDR controller interface") +Signed-off-by: Felix Fietkau <nbd@nbd.name> +--- + arch/mips/ath79/common.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/mips/ath79/common.c b/arch/mips/ath79/common.c +index 10a405d593df..c782b10ddf50 100644 +--- a/arch/mips/ath79/common.c ++++ b/arch/mips/ath79/common.c +@@ -58,7 +58,7 @@ EXPORT_SYMBOL_GPL(ath79_ddr_ctrl_init); + + void ath79_ddr_wb_flush(u32 reg) + { +- void __iomem *flush_reg = ath79_ddr_wb_flush_base + reg; ++ void __iomem *flush_reg = ath79_ddr_wb_flush_base + (reg * 4); + + /* Flush the DDR write buffer. */ + __raw_writel(0x1, flush_reg); +-- +2.11.0 + |