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author | John Crispin <john@phrozen.org> | 2018-05-06 10:20:11 +0200 |
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committer | John Crispin <john@phrozen.org> | 2018-05-07 08:06:51 +0200 |
commit | 53c474abbdfef8eb3499e2d10c9ad491788b8a72 (patch) | |
tree | acd19415420664f59bc63c1ceb4ad37bb7323027 /target/linux/ath79/image/lzma-loader/src/cp0regdef.h | |
parent | 3dc523f232ff01d31d59345f5fa6de508d5059ef (diff) | |
download | upstream-53c474abbdfef8eb3499e2d10c9ad491788b8a72.tar.gz upstream-53c474abbdfef8eb3499e2d10c9ad491788b8a72.tar.bz2 upstream-53c474abbdfef8eb3499e2d10c9ad491788b8a72.zip |
ath79: add new OF only target for QCA MIPS silicon
This target aims to replace ar71xx mid-term. The big part that is still
missing is making the MMIO/AHB wifi work using OF. NAND and mikrotik
subtargets will follow.
Signed-off-by: John Crispin <john@phrozen.org>
Diffstat (limited to 'target/linux/ath79/image/lzma-loader/src/cp0regdef.h')
-rw-r--r-- | target/linux/ath79/image/lzma-loader/src/cp0regdef.h | 39 |
1 files changed, 39 insertions, 0 deletions
diff --git a/target/linux/ath79/image/lzma-loader/src/cp0regdef.h b/target/linux/ath79/image/lzma-loader/src/cp0regdef.h new file mode 100644 index 0000000000..c1188ad8c8 --- /dev/null +++ b/target/linux/ath79/image/lzma-loader/src/cp0regdef.h @@ -0,0 +1,39 @@ +/* + * Copyright (C) 1994, 1995, 1996, 1997, 2000, 2001 by Ralf Baechle + * + * Copyright (C) 2001, Monta Vista Software + * Author: jsun@mvista.com or jsun@junsun.net + */ +#ifndef _cp0regdef_h_ +#define _cp0regdef_h_ + +#define CP0_INDEX $0 +#define CP0_RANDOM $1 +#define CP0_ENTRYLO0 $2 +#define CP0_ENTRYLO1 $3 +#define CP0_CONTEXT $4 +#define CP0_PAGEMASK $5 +#define CP0_WIRED $6 +#define CP0_BADVADDR $8 +#define CP0_COUNT $9 +#define CP0_ENTRYHI $10 +#define CP0_COMPARE $11 +#define CP0_STATUS $12 +#define CP0_CAUSE $13 +#define CP0_EPC $14 +#define CP0_PRID $15 +#define CP0_CONFIG $16 +#define CP0_LLADDR $17 +#define CP0_WATCHLO $18 +#define CP0_WATCHHI $19 +#define CP0_XCONTEXT $20 +#define CP0_FRAMEMASK $21 +#define CP0_DIAGNOSTIC $22 +#define CP0_PERFORMANCE $25 +#define CP0_ECC $26 +#define CP0_CACHEERR $27 +#define CP0_TAGLO $28 +#define CP0_TAGHI $29 +#define CP0_ERROREPC $30 + +#endif |