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| author | Chuanhong Guo <gch981213@gmail.com> | 2018-08-07 12:02:07 +0800 |
|---|---|---|
| committer | Mathias Kresin <dev@kresin.me> | 2018-08-09 18:44:57 +0200 |
| commit | 387736af41444945da6a5e51748e91011569c03e (patch) | |
| tree | b4e09e1c1aef9b377510f7812de0c56cf7a70c71 /target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c | |
| parent | 23519edbcaa9cfd24b5a6fff44770f0fa9e13f3c (diff) | |
| download | upstream-387736af41444945da6a5e51748e91011569c03e.tar.gz upstream-387736af41444945da6a5e51748e91011569c03e.tar.bz2 upstream-387736af41444945da6a5e51748e91011569c03e.zip | |
ath79: ag71xx: remove PHY reset
Bit 8/12 of reset controller which is marked as PHY_RESET/SWITCH_RESET
in datasheets will trigger either a reset for builtin switch or assert
an external ETH0_RESET_L/ETH1_RESET_L pin, which are usually connected
to external PHY/switch. None of them should be triggered every time an
interface is brought up in ethernet driver.
Remove PHY reset support from ag71xx and definition for them in dtsi.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Diffstat (limited to 'target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c')
| -rw-r--r-- | target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c | 9 |
1 files changed, 0 insertions, 9 deletions
diff --git a/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c b/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c index 3a25904d56..4f1c75fbff 100644 --- a/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c +++ b/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c @@ -423,13 +423,6 @@ static void ag71xx_hw_init(struct ag71xx *ag) { ag71xx_hw_stop(ag); - if (ag->phy_reset) { - reset_control_assert(ag->phy_reset); - msleep(50); - reset_control_deassert(ag->phy_reset); - msleep(200); - } - ag71xx_sb(ag, AG71XX_REG_MAC_CFG1, MAC_CFG1_SR); udelay(20); @@ -1313,8 +1306,6 @@ static int ag71xx_probe(struct platform_device *pdev) goto err_free; } - ag->phy_reset = devm_reset_control_get_optional(&pdev->dev, "phy"); - if (of_property_read_u32_array(np, "fifo-data", ag->fifodata, 3)) { if (of_device_is_compatible(np, "qca,ar9130-eth") || of_device_is_compatible(np, "qca,ar7100-eth")) { |