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| author | Edward Chow <equu@openmail.cc> | 2022-11-09 17:18:17 +0800 |
|---|---|---|
| committer | Hauke Mehrtens <hauke@hauke-m.de> | 2022-11-18 20:27:52 +0100 |
| commit | e354b01baf886e7715dd7928472fb858f7c8e4c3 (patch) | |
| tree | b5cf5a753b32673ef071028049c1f120af8026a7 /target/linux/ath79/dts | |
| parent | 224babfd6f85fbf8a76fde9f835ba48d3eacb060 (diff) | |
| download | upstream-e354b01baf886e7715dd7928472fb858f7c8e4c3.tar.gz upstream-e354b01baf886e7715dd7928472fb858f7c8e4c3.tar.bz2 upstream-e354b01baf886e7715dd7928472fb858f7c8e4c3.zip | |
ath79: calibrate all ar9344 tl-WDRxxxx with nvmem
Driver for both soc (2.4GHz Wifi) and pci (5 GHz) now pull the calibration
data from the nvmem subsystem.
This allows us to move the userspace caldata extraction for the pci-e ath9k
supported wifi into the device-tree definition of the device.
wmac's nodes are also changed over to use nvmem-cells over OpenWrt's
custom mtd-cal-data property.
The wifi mac address remains correct after these changes, because When both
"mac-address" and "calibration" are defined, the effective mac address
comes from the cell corresponding to "mac-address" and
mac-address-increment.
Test passed on my tplink tl-wdr4310.
Signed-off-by: Edward Chow <equu@openmail.cc>
Diffstat (limited to 'target/linux/ath79/dts')
| -rw-r--r-- | target/linux/ath79/dts/ar9344_tplink_tl-wdr3500-v1.dts | 17 | ||||
| -rw-r--r-- | target/linux/ath79/dts/ar9344_tplink_tl-wdr4300.dtsi | 17 | ||||
| -rw-r--r-- | target/linux/ath79/dts/ar9344_tplink_tl-wdrxxxx.dtsi | 29 |
3 files changed, 27 insertions, 36 deletions
diff --git a/target/linux/ath79/dts/ar9344_tplink_tl-wdr3500-v1.dts b/target/linux/ath79/dts/ar9344_tplink_tl-wdr3500-v1.dts index 77f6637188..1600e12b64 100644 --- a/target/linux/ath79/dts/ar9344_tplink_tl-wdr3500-v1.dts +++ b/target/linux/ath79/dts/ar9344_tplink_tl-wdr3500-v1.dts @@ -50,16 +50,9 @@ }; &ath9k { - nvmem-cells = <&macaddr_uboot_1fc00>; - nvmem-cell-names = "mac-address"; mac-address-increment = <1>; }; -&wmac { - nvmem-cells = <&macaddr_uboot_1fc00>; - nvmem-cell-names = "mac-address"; -}; - ð1 { status = "okay"; @@ -83,13 +76,3 @@ nvmem-cell-names = "mac-address"; mac-address-increment = <2>; }; - -&uboot { - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; - - macaddr_uboot_1fc00: macaddr@1fc00 { - reg = <0x1fc00 0x6>; - }; -}; diff --git a/target/linux/ath79/dts/ar9344_tplink_tl-wdr4300.dtsi b/target/linux/ath79/dts/ar9344_tplink_tl-wdr4300.dtsi index 55ddb74184..d2791aee70 100644 --- a/target/linux/ath79/dts/ar9344_tplink_tl-wdr4300.dtsi +++ b/target/linux/ath79/dts/ar9344_tplink_tl-wdr4300.dtsi @@ -75,14 +75,7 @@ status = "okay"; }; -&ath9k { - nvmem-cells = <&macaddr_uboot_1fc00>; - nvmem-cell-names = "mac-address"; -}; - &wmac { - nvmem-cells = <&macaddr_uboot_1fc00>; - nvmem-cell-names = "mac-address"; mac-address-increment = <(-1)>; }; @@ -117,13 +110,3 @@ phy-mode = "rgmii"; phy-handle = <&phy0>; }; - -&uboot { - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; - - macaddr_uboot_1fc00: macaddr@1fc00 { - reg = <0x1fc00 0x6>; - }; -}; diff --git a/target/linux/ath79/dts/ar9344_tplink_tl-wdrxxxx.dtsi b/target/linux/ath79/dts/ar9344_tplink_tl-wdrxxxx.dtsi index a3f4dc036d..a2649d19e9 100644 --- a/target/linux/ath79/dts/ar9344_tplink_tl-wdrxxxx.dtsi +++ b/target/linux/ath79/dts/ar9344_tplink_tl-wdrxxxx.dtsi @@ -106,14 +106,39 @@ ath9k: wifi@0,0 { compatible = "pci168c,0033"; reg = <0x0000 0 0 0 0>; - qca,no-eeprom; #gpio-cells = <2>; gpio-controller; + nvmem-cells = <&macaddr_uboot_1fc00>, <&cal_art_5000>; + nvmem-cell-names = "mac-address", "calibration"; }; }; &wmac { status = "okay"; + nvmem-cells = <&macaddr_uboot_1fc00>, <&cal_art_1000>; + nvmem-cell-names = "mac-address", "calibration"; +}; + +&uboot { + compatible = "nvmem-cells"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_uboot_1fc00: macaddr@1fc00 { + reg = <0x1fc00 0x6>; + }; +}; - mtd-cal-data = <&art 0x1000>; +&art { + compatible = "nvmem-cells"; + #address-cells = <1>; + #size-cells = <1>; + + cal_art_1000: cal@1000 { + reg = <0x1000 0x440>; + }; + + cal_art_5000: cal@5000 { + reg = <0x5000 0x440>; + }; }; |