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authorJan Forman <forman.jan96@gmail.com>2021-05-15 20:48:12 +0200
committerHauke Mehrtens <hauke@hauke-m.de>2023-05-20 13:43:09 +0200
commit7a29230752f232487107b2e0d54fe1f63e733b59 (patch)
tree687d24ad7504fd9d495ead8377a0304fd610604d /target/linux/ath79/dts
parentc0ef48814ea6dbd8c60b31af622c9ff4b163959f (diff)
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ath79: Replace reset-button for DIR-859
gpio-export for the switch reset pin replaced with a reset pin definition for the driver, within the phy node. Signed-off-by: Jan Forman <forman.jan96@gmail.com> Tested-By: Sebastian Schaper <openwrt@sebastianschaper.net>
Diffstat (limited to 'target/linux/ath79/dts')
-rw-r--r--target/linux/ath79/dts/qca9563_dlink_dir-859-a1.dts13
1 files changed, 2 insertions, 11 deletions
diff --git a/target/linux/ath79/dts/qca9563_dlink_dir-859-a1.dts b/target/linux/ath79/dts/qca9563_dlink_dir-859-a1.dts
index 804f3434c3..140f0b65c6 100644
--- a/target/linux/ath79/dts/qca9563_dlink_dir-859-a1.dts
+++ b/target/linux/ath79/dts/qca9563_dlink_dir-859-a1.dts
@@ -56,17 +56,6 @@
debounce-interval = <60>;
};
};
-
- gpio-export {
- compatible = "gpio-export";
- #size-cells = <0>;
-
- gpio_switch_reset {
- gpio-export,name = "dir-859-a1:reset:switch";
- gpio-export,output = <1>;
- gpios = <&gpio 11 GPIO_ACTIVE_HIGH>;
- };
- };
};
&pcie {
@@ -133,6 +122,8 @@
phy-mode = "sgmii";
qca,mib-poll-interval = <500>;
+ reset-gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
+
qca,ar8327-initvals = <
0x04 0x00080080 /* PORT0 PAD MODE CTRL */
0x10 0x81000080 /* POWER_ON_STRAP */