diff options
author | Christoph Krapp <achterin@googlemail.com> | 2019-07-16 20:47:49 +0200 |
---|---|---|
committer | David Bauer <mail@david-bauer.net> | 2019-07-17 23:14:23 +0200 |
commit | 6fde0b735c455f834b1ffc10d38c24f056839b29 (patch) | |
tree | 4ca03c01aab370af54e3b1352ecd5d827733ba6a /target/linux/ath79/dts | |
parent | 8c51ddeff0876b439ac35a3f492ab719085bfb9c (diff) | |
download | upstream-6fde0b735c455f834b1ffc10d38c24f056839b29.tar.gz upstream-6fde0b735c455f834b1ffc10d38c24f056839b29.tar.bz2 upstream-6fde0b735c455f834b1ffc10d38c24f056839b29.zip |
ath79: add support for TP-Link RE355 v1 and RE450 v1
Specification:
SoC: Qualcomm Atheros QCA9558
RAM: 64/128MiB
Flash: 8MiB SPI-NOR
Wifi:
- 2.4GHz: 3T3R (QCA9558)
- 5GHz: 3T3R (QCA9880)
LAN: 1x 10/100/1000 Mbps
UART:
- TP1: Tx
- TP2: Rx
- TP3: Gnd
- TP4: 3v3
Flash instructions:
Flash factory image through stock firmware WEB UI.
Signed-off-by: Christoph Krapp <achterin@googlemail.com>
Diffstat (limited to 'target/linux/ath79/dts')
-rw-r--r-- | target/linux/ath79/dts/qca9558_tplink_re355-v1.dts | 9 | ||||
-rw-r--r-- | target/linux/ath79/dts/qca9558_tplink_re450-v1.dts | 9 | ||||
-rw-r--r-- | target/linux/ath79/dts/qca9558_tplink_rex5x.dtsi | 180 |
3 files changed, 198 insertions, 0 deletions
diff --git a/target/linux/ath79/dts/qca9558_tplink_re355-v1.dts b/target/linux/ath79/dts/qca9558_tplink_re355-v1.dts new file mode 100644 index 0000000000..4f017786d3 --- /dev/null +++ b/target/linux/ath79/dts/qca9558_tplink_re355-v1.dts @@ -0,0 +1,9 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/dts-v1/; + +#include "qca9558_tplink_rex5x.dtsi" + +/ { + compatible = "tplink,re355-v1", "qca,qca9558"; + model = "TP-Link RE355 v1"; +}; diff --git a/target/linux/ath79/dts/qca9558_tplink_re450-v1.dts b/target/linux/ath79/dts/qca9558_tplink_re450-v1.dts new file mode 100644 index 0000000000..b9b1bd18b2 --- /dev/null +++ b/target/linux/ath79/dts/qca9558_tplink_re450-v1.dts @@ -0,0 +1,9 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/dts-v1/; + +#include "qca9558_tplink_rex5x.dtsi" + +/ { + compatible = "tplink,re450-v1", "qca,qca9558"; + model = "TP-Link RE450 v1"; +}; diff --git a/target/linux/ath79/dts/qca9558_tplink_rex5x.dtsi b/target/linux/ath79/dts/qca9558_tplink_rex5x.dtsi new file mode 100644 index 0000000000..c593cc434f --- /dev/null +++ b/target/linux/ath79/dts/qca9558_tplink_rex5x.dtsi @@ -0,0 +1,180 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/dts-v1/; + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> + +#include "qca9557.dtsi" + +/ { + chosen { + bootargs = "console=ttyS0,115200n8"; + }; + + aliases { + led-boot = &led_power; + led-failsafe = &led_power; + led-running = &led_power; + led-upgrade = &led_power; + mdio-gpio0 = &mdio2; + }; + + leds { + compatible = "gpio-leds"; + + led_power: power { + label = "tp-link:blue:power"; + gpios = <&gpio 12 GPIO_ACTIVE_LOW>; + }; + + wlan2g { + label = "tp-link:blue:wlan2g"; + gpios = <&gpio 13 GPIO_ACTIVE_LOW>; + linux,default-trigger = "phy1tpt"; + }; + + wlan5g { + label = "tp-link:blue:wlan5g"; + gpios = <&gpio 14 GPIO_ACTIVE_LOW>; + linux,default-trigger = "phy0tpt"; + }; + + lan_link { + label = "tp-link:green:lan_link"; + gpios = <&gpio 23 GPIO_ACTIVE_LOW>; + }; + + lan_data { + label = "tp-link:green:lan_data"; + gpios = <&gpio 17 GPIO_ACTIVE_LOW>; + }; + + wps_blue { + label = "tp-link:blue:wps"; + gpios = <&gpio 21 GPIO_ACTIVE_HIGH>; + }; + + wps_red { + label = "tp-link:red:wps"; + gpios = <&gpio 22 GPIO_ACTIVE_HIGH>; + }; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "Reset button"; + linux,code = <KEY_RESTART>; + gpios = <&gpio 18 GPIO_ACTIVE_LOW>; + debounce-interval = <60>; + }; + + leds { + label = "LED control button"; + linux,code = <BTN_0>; + gpios = <&gpio 19 GPIO_ACTIVE_LOW>; + debounce-interval = <60>; + }; + + wps { + label = "WPS button"; + linux,code = <KEY_WPS_BUTTON>; + gpios = <&gpio 20 GPIO_ACTIVE_LOW>; + debounce-interval = <60>; + }; + }; + + mdio2: mdio { + compatible = "virtual,mdio-gpio"; + + gpios = <&gpio 3 GPIO_ACTIVE_HIGH>, /* MDC */ + <&gpio 1 GPIO_ACTIVE_HIGH>; /* MDIO */ + #address-cells = <1>; + #size-cells = <0>; + + phy0: ethernet-phy@4 { + reg = <4>; + reset-gpios = <&gpio 11 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&pcie0 { + status = "okay"; +}; + +&uart { + status = "okay"; +}; + +&gpio { + status = "okay"; +}; + +&spi { + status = "okay"; + num-cs = <1>; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <25000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "u-boot"; + reg = <0x000000 0x020000>; + read-only; + }; + + partition@20000 { + compatible = "tplink,firmware"; + label = "firmware"; + reg = <0x020000 0x5e0000>; + }; + + partition@600000 { + label = "partition-table"; + reg = <0x600000 0x010000>; + read-only; + }; + + info: partition@610000 { + label = "info"; + reg = <0x610000 0x020000>; + read-only; + }; + + partition@630000 { + label = "config"; + reg = <0x630000 0x1c0000>; + read-only; + }; + + art: partition@7f0000 { + label = "art"; + reg = <0x7f0000 0x010000>; + read-only; + }; + }; + }; +}; + +ð0 { + status = "okay"; + mtd-mac-address = <&info 0x8>; + pll-data = <0xa6000000 0x00000101 0x00001616>; + phy-handle = <&phy0>; +}; + +&wmac { + status = "okay"; + mtd-cal-data = <&art 0x1000>; + mtd-mac-address = <&info 0x8>; + mtd-mac-address-increment = <(-1)>; +}; |