diff options
author | David Bauer <mail@david-bauer.net> | 2020-04-12 13:03:31 +0200 |
---|---|---|
committer | David Bauer <mail@david-bauer.net> | 2020-04-17 13:23:06 +0200 |
commit | d883eaacd428e1231554687e9875248291a004cc (patch) | |
tree | d5e890f6719da3bff63767ec6ad57721e95e6369 /target/linux/ath79/dts | |
parent | 99d567a83de5e0531d94721c6831e32b2990bb1c (diff) | |
download | upstream-d883eaacd428e1231554687e9875248291a004cc.tar.gz upstream-d883eaacd428e1231554687e9875248291a004cc.tar.bz2 upstream-d883eaacd428e1231554687e9875248291a004cc.zip |
ath79: add QCA9550 reset sequence
The QCA9550 family of SoCs have a slightly different reset
sequence compared to older chips.
Normally the bootloader performs this sequence, however
some bootloader implementation expect the operating system
to clear the reset. Also get the PCIe resets from OF to
support the second RC of the QCA9558.
This is required for the AVM FRITZ!WLAN Repeater 1750E to work,
as EVA leaves the PCIe bus in reset.
Tested: AVM FRITZ!WLAN Repeater 1750E - OCEDO Koala
Signed-off-by: David Bauer <mail@david-bauer.net>
Diffstat (limited to 'target/linux/ath79/dts')
-rw-r--r-- | target/linux/ath79/dts/ar724x.dtsi | 3 | ||||
-rw-r--r-- | target/linux/ath79/dts/ar9344.dtsi | 3 | ||||
-rw-r--r-- | target/linux/ath79/dts/qca953x.dtsi | 3 | ||||
-rw-r--r-- | target/linux/ath79/dts/qca9557.dtsi | 10 | ||||
-rw-r--r-- | target/linux/ath79/dts/qca956x.dtsi | 3 |
5 files changed, 20 insertions, 2 deletions
diff --git a/target/linux/ath79/dts/ar724x.dtsi b/target/linux/ath79/dts/ar724x.dtsi index 95832d998a..2d7383c36d 100644 --- a/target/linux/ath79/dts/ar724x.dtsi +++ b/target/linux/ath79/dts/ar724x.dtsi @@ -130,6 +130,9 @@ interrupt-parent = <&cpuintc>; interrupts = <2>; + resets = <&rst 6>, <&rst 7>; + reset-names = "hc", "phy"; + interrupt-controller; #interrupt-cells = <1>; diff --git a/target/linux/ath79/dts/ar9344.dtsi b/target/linux/ath79/dts/ar9344.dtsi index de118e9a3b..e99d962933 100644 --- a/target/linux/ath79/dts/ar9344.dtsi +++ b/target/linux/ath79/dts/ar9344.dtsi @@ -46,6 +46,9 @@ interrupt-parent = <&intc2>; interrupts = <1>; + resets = <&rst 6>, <&rst 7>; + reset-names = "hc", "phy"; + interrupt-controller; #interrupt-cells = <1>; diff --git a/target/linux/ath79/dts/qca953x.dtsi b/target/linux/ath79/dts/qca953x.dtsi index e359badd2b..f7e0703e4e 100644 --- a/target/linux/ath79/dts/qca953x.dtsi +++ b/target/linux/ath79/dts/qca953x.dtsi @@ -164,6 +164,9 @@ interrupt-parent = <&intc2>; interrupts = <1>; + resets = <&rst 6>, <&rst 7>; + reset-names = "hc", "phy"; + interrupt-controller; #interrupt-cells = <1>; diff --git a/target/linux/ath79/dts/qca9557.dtsi b/target/linux/ath79/dts/qca9557.dtsi index 69ea639804..ede658af6d 100644 --- a/target/linux/ath79/dts/qca9557.dtsi +++ b/target/linux/ath79/dts/qca9557.dtsi @@ -202,7 +202,7 @@ }; pcie0: pcie-controller@180c0000 { - compatible = "qcom,ar7240-pci"; + compatible = "qcom,qca9550-pci", "qcom,ar7240-pci"; #address-cells = <3>; #size-cells = <2>; bus-range = <0x0 0x0>; @@ -215,6 +215,9 @@ interrupt-parent = <&intc2>; interrupts = <1>; + resets = <&rst 6>, <&rst 7>; + reset-names = "hc", "phy"; + interrupt-controller; #interrupt-cells = <1>; @@ -234,7 +237,7 @@ }; pcie1: pcie-controller@18250000 { - compatible = "qcom,ar7240-pci"; + compatible = "qcom,qca9550-pci", "qcom,ar7240-pci"; #address-cells = <3>; #size-cells = <2>; bus-range = <0x0 0x0>; @@ -247,6 +250,9 @@ interrupt-parent = <&intc3>; interrupts = <0>; + resets = <&rst2 6>, <&rst2 7>; + reset-names = "hc", "phy"; + interrupt-controller; #interrupt-cells = <1>; diff --git a/target/linux/ath79/dts/qca956x.dtsi b/target/linux/ath79/dts/qca956x.dtsi index d0ce952ef4..333428443f 100644 --- a/target/linux/ath79/dts/qca956x.dtsi +++ b/target/linux/ath79/dts/qca956x.dtsi @@ -168,6 +168,9 @@ interrupt-parent = <&intc3>; interrupts = <0>; + resets = <&rst 6>, <&rst 7>; + reset-names = "hc", "phy"; + interrupt-controller; #interrupt-cells = <1>; |