diff options
| author | Sven Eckelmann <sven@narfation.org> | 2020-12-30 21:56:55 +0100 |
|---|---|---|
| committer | Adrian Schmutzler <freifunk@adrianschmutzler.de> | 2021-01-19 15:39:36 +0100 |
| commit | 4fbdadc0bf01196d4e385872cfa805060fb127a6 (patch) | |
| tree | 01f450204fac4505eb936d7abb40cb21a6076f0a /target/linux/ath79/dts | |
| parent | 31172e53f9d0971204e6fa7e3541c0695d99618a (diff) | |
| download | upstream-4fbdadc0bf01196d4e385872cfa805060fb127a6.tar.gz upstream-4fbdadc0bf01196d4e385872cfa805060fb127a6.tar.bz2 upstream-4fbdadc0bf01196d4e385872cfa805060fb127a6.zip | |
ath79: apply Engenius ECB1750 style to OpenMesh MR900 RGMII cfg
The OpenMesh MR900 is a modified version of the Exx900/Exx1750 family.
These devices are shipped with an AR803x PHY and had various problems with
the delay configuration in ar71xx. These problems are now in the past [1]
and parts of the delay configuration should now be done in the PHY only.
Just switch to the configuration of the ECB1750 to have an already well
tested configuration for ath79 with the newer kernel versions.
[1] https://github.com/openwrt/openwrt/pull/3505#issuecomment-716050292
Reported-by: Michael Pratt <mcpratt@pm.me>
Signed-off-by: Sven Eckelmann <sven@narfation.org>
Diffstat (limited to 'target/linux/ath79/dts')
| -rw-r--r-- | target/linux/ath79/dts/qca9558_openmesh_mr900.dtsi | 8 |
1 files changed, 2 insertions, 6 deletions
diff --git a/target/linux/ath79/dts/qca9558_openmesh_mr900.dtsi b/target/linux/ath79/dts/qca9558_openmesh_mr900.dtsi index e506e12c31..8c612042c8 100644 --- a/target/linux/ath79/dts/qca9558_openmesh_mr900.dtsi +++ b/target/linux/ath79/dts/qca9558_openmesh_mr900.dtsi @@ -145,20 +145,16 @@ ð0 { status = "okay"; - pll-data = <0xae000000 0xa0000101 0xa0001313>; + pll-data = <0x82000000 0x80000101 0x80001313>; mtd-mac-address = <&art 0x0>; - phy-mode = "rgmii-rxid"; + phy-mode = "rgmii-id"; phy-handle = <&phy5>; gmac-config { device = <&gmac>; rgmii-enabled = <1>; - rxd-delay = <3>; - rxdv-delay = <3>; - txd-delay = <0>; - txen-delay = <0>; }; }; |