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authorAdrian Schmutzler <freifunk@adrianschmutzler.de>2020-08-14 13:09:12 +0200
committerAdrian Schmutzler <freifunk@adrianschmutzler.de>2020-12-04 18:21:08 +0100
commit33c27ccf4aef677d28246d30e815050ead68b434 (patch)
treefe8e6f67b9bd320b4e1a30763fb36a47316c75da /target/linux/ath79/dts
parent2abc55b2e27269c1cabb3e8f71de715d13825f5e (diff)
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ath79: add support for TP-Link TL-WDR7500 v3
This ports support for the TP-Link TL-WDR7500 v3 from ar71xx to ath79. The basic features appear to be identical to the Archer C7 v1, however it has the (supported) QCA9880-BR4A chip of the C7 v2. Specifications: SoC: QCA9558 CPU: 720 MHz Flash: 8 MiB RAM: 128 MiB WLAN: 2.4 GHz b/g/n, 5 GHz a/n/ac Qualcomm Atheros QCA9880-BR4A Ethernet: 5x Gbit ports USB: 2x 2.0 ports Flashing instructions: Upload the factory image via the OEM firmware GUI. TFTP recovery appears to be available as well. Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Diffstat (limited to 'target/linux/ath79/dts')
-rw-r--r--target/linux/ath79/dts/qca9558_tplink_tl-wdr7500-v3.dts45
1 files changed, 45 insertions, 0 deletions
diff --git a/target/linux/ath79/dts/qca9558_tplink_tl-wdr7500-v3.dts b/target/linux/ath79/dts/qca9558_tplink_tl-wdr7500-v3.dts
new file mode 100644
index 0000000000..04368b9244
--- /dev/null
+++ b/target/linux/ath79/dts/qca9558_tplink_tl-wdr7500-v3.dts
@@ -0,0 +1,45 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "qca9558_tplink_archer-c.dtsi"
+
+/ {
+ compatible = "tplink,tl-wdr7500-v3", "qca,qca9558";
+ model = "TP-Link TL-WDR7500 v3";
+};
+
+&keys {
+ rfkill {
+ gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_RFKILL>;
+ linux,input-type = <EV_SW>;
+ debounce-interval = <60>;
+ };
+};
+
+&leds {
+ wlan5g {
+ label = "green:wlan5g";
+ gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "phy0tpt";
+ };
+};
+
+&mtdparts {
+ uboot: partition@0 {
+ label = "u-boot";
+ reg = <0x000000 0x020000>;
+ read-only;
+ };
+
+ partition@20000 {
+ label = "firmware";
+ compatible = "tplink,firmware";
+ reg = <0x020000 0x7d0000>;
+ };
+
+ art: partition@7f0000 {
+ label = "art";
+ reg = <0x7f0000 0x010000>;
+ read-only;
+ };
+};