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authorGeorgi Vlaev <georgi.vlaev@gmail.com>2018-12-28 10:24:01 +0200
committerMathias Kresin <dev@kresin.me>2018-12-31 16:25:11 +0100
commitd03aae1a09fce5a5d5747855bc07ee1f54388e03 (patch)
tree36f9d5737ced8470a393b9ef7760433b857ca19b /target/linux/ath79/dts
parent9ebb44aef4db8f423f7bf1fd2436906b2eafb570 (diff)
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ath79: add support for TP-Link Archer C6 v2
This patch adds support for TP-Link Archer C6 v2 (EU) Hardware specification: - SOC: Qualcomm QCA9563 @ 775MHz - Flash: GigaDevice GD25Q64CSIG (8MiB) - RAM: Zentel A3R1GE40JBF (128 MiB DDR2) - Ethernet: Qualcomm QCA8337N: 4x 1Gbps LAN + 1x 1Gbps WAN - Wireless: - 2.4GHz (bgn) QCA9563 integrated (3x3) - 5GHz (ac) Qualcomm QCA9886 (2x2) - Button: 1x power, 1x reset, 1x wps - LED: 6x LEDs: power, wlan2g, wlan5g, lan, wan, wps - UART: There's no UART header on the board Flash instructions: Upload openwrt-ath79-generic-tplink_archer-c6-v2-squashfs-factory.bin via the router Web interface. Flash instruction using tftp recovery: 1. Connect the computer to one of the LAN ports of the router 2. Set the computer IP to 192.168.0.66 3. Start a tftp server with the OpenWrt factory image in the tftp root directory renamed to ArcherC6v2_tp_recovery.bin. 4. Connect power cable to router, press and hold the reset button and turn the router on 5. Keep the reset button pressed until the WPS LED lights up 6. Wait ~150 seconds to complete flashing According to the GPL source the non-EU variant has different GPIOs assigned to some of the LEDs and buttons. The flash layout might be different as well. The wikidevi entry for Archer A6/C6 assumes they are identical. Signed-off-by: Georgi Vlaev <georgi.vlaev@gmail.com>
Diffstat (limited to 'target/linux/ath79/dts')
-rw-r--r--target/linux/ath79/dts/qca9563_tplink_archer-c6-v2.dts9
-rw-r--r--target/linux/ath79/dts/qca9563_tplink_archer-x6-v2.dtsi170
2 files changed, 179 insertions, 0 deletions
diff --git a/target/linux/ath79/dts/qca9563_tplink_archer-c6-v2.dts b/target/linux/ath79/dts/qca9563_tplink_archer-c6-v2.dts
new file mode 100644
index 0000000000..5caec6fab1
--- /dev/null
+++ b/target/linux/ath79/dts/qca9563_tplink_archer-c6-v2.dts
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/dts-v1/;
+
+#include "qca9563_tplink_archer-x6-v2.dtsi"
+
+/ {
+ compatible = "tplink,archer-c6-v2", "qca,qca9563";
+ model = "TP-Link Archer C6 v2";
+};
diff --git a/target/linux/ath79/dts/qca9563_tplink_archer-x6-v2.dtsi b/target/linux/ath79/dts/qca9563_tplink_archer-x6-v2.dtsi
new file mode 100644
index 0000000000..37ab16453b
--- /dev/null
+++ b/target/linux/ath79/dts/qca9563_tplink_archer-x6-v2.dtsi
@@ -0,0 +1,170 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+#include "qca956x.dtsi"
+
+/ {
+ chosen {
+ bootargs = "console=ttyS0,115200n8";
+ };
+
+ aliases {
+ led-boot = &power;
+ led-failsafe = &power;
+ led-running = &power;
+ led-upgrade = &power;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ power: power {
+ label = "tp-link:green:power";
+ gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
+ default-state = "on";
+ };
+
+ wlan2g {
+ label = "tp-link:green:wlan2g";
+ gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "phy1tpt";
+ };
+
+ wlan5g {
+ label = "tp-link:green:wlan5g";
+ gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "phy0tpt";
+ };
+
+ lan {
+ label = "tp-link:green:lan";
+ gpios = <&gpio 20 GPIO_ACTIVE_LOW>;
+ };
+
+ wan {
+ label = "tp-link:green:wan";
+ gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
+ };
+
+ wan_fail {
+ label = "tp-link:amber:wan";
+ gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
+ };
+
+ wps {
+ label = "tp-link:green:wps";
+ gpios = <&gpio 9 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ keys {
+ compatible = "gpio-keys";
+
+ reset {
+ label = "Reset button";
+ linux,code = <KEY_RESTART>;
+ gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
+ debounce-interval = <60>;
+ };
+
+ wps {
+ label = "WPS button";
+ linux,code = <KEY_WPS_BUTTON>;
+ gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
+ debounce-interval = <60>;
+ };
+ };
+};
+
+&pcie {
+ status = "okay";
+};
+
+&uart {
+ status = "okay";
+};
+
+&gpio {
+ status = "okay";
+};
+
+&spi {
+ status = "okay";
+ num-cs = <1>;
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <25000000>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "u-boot";
+ reg = <0x000000 0x020000>;
+ read-only;
+ };
+
+ mac: partition@20000 {
+ label = "mac";
+ reg = <0x020000 0x010000>;
+ read-only;
+ };
+
+ partition@30000 {
+ compatible = "denx,uimage";
+ label = "firmware";
+ reg = <0x030000 0x7a0000>;
+ };
+
+ partition@7d0000 {
+ label = "tplink";
+ reg = <0x7d0000 0x020000>;
+ read-only;
+ };
+
+ art: partition@7f0000 {
+ label = "art";
+ reg = <0x7f0000 0x010000>;
+ read-only;
+ };
+ };
+ };
+};
+
+&mdio0 {
+ status = "okay";
+
+ phy-mask = <0>;
+
+ phy0: ethernet-phy@0 {
+ reg = <0>;
+ phy-mode = "sgmii";
+
+ qca,ar8327-initvals = <
+ 0x04 0x00080080 /* PORT0 PAD MODE CTRL */
+ 0x7c 0x0000007e /* PORT0_STATUS */
+ >;
+ };
+};
+
+&eth0 {
+ status = "okay";
+
+ phy-mode = "sgmii";
+ mtd-mac-address = <&mac 0x8>;
+ phy-handle = <&phy0>;
+};
+
+&wmac {
+ status = "okay";
+
+ mtd-cal-data = <&art 0x1000>;
+ mtd-mac-address = <&mac 0x8>;
+};