ath79: GL-AR750S: provide NAND support; increase kernel to 4 MB

The GL.iNet GL-AR750S has been supported by the ar71xx and ath79
platforms with access to its 16 MB NOR flash, but not its 128 MB
SPI NAND flash.

This commit provides support for the NAND through the upstream
SPI-NAND framework.

At this time, the OEM U-Boot appears to only support loading the
kernel from NOR. This configuration is preserved as this time,
with the glinet,gl-ar750s-nand name reserved for a potential,
future, NAND-only boot.

The family of GL-AR750S devices on the ath79 platform now includes:

  * glinet,gl-ar750m-nor-nand   "nand" target
  * glinet,gl-ar750m-nor        "nand" target (NAND-aware)

NB: This commit increases the kernel size from 2 MB to 4 MB

"Force-less" sysupgrade is presently supported from the current
versions of following NOR-based firmwre images to the version of
glinet,gl-ar750s-nor firmware produced by this commit:

  * glinet,gl-ar750s     -- OpenWrt 19.07 ar71xx
  * glinet,gl-ar750s     -- OpenWrt 19.07 ath79

Users who have sucessfully upgraded to glinet,gl-ar750m-nor may then
flash glinet,gl-ar750m-nor-nand with sysupgrade to transtion to the
NAND-based variant.

Other upgrades to these images, including directly to the NAND-based
glinet,gl-ar750s-nor-nand firmware, can be accomplished through U-Boot.

NB: See "ath79: restrict GL-AR750S kernel build-size to 2 MB" which
enables flashing of NAND factory.img with the current GL-iNet U-Boot,
"U-Boot 1.1.4-gcf378d80-dirty (Aug 16 2018 - 07:51:15)"

The GL-AR750S OEM U-Boot allows upload and flashing of either NOR
firmware (sysupgrade.bin) or NAND firmware (factory.img) through its
HTTP-based GUI. Serial connectivity is not required.

The glinet,gl-ar750s-nor and glinet,gl-ar750s-nor-nand images
generated after this commit flash each other directly.

This commit changes the control of the USB VBUS to gpio-hog from
regulator-fixed introduced by commit 0f6b944c92. This reduces the
compressed kernel size by ~14 kB, with no apparent loss of
functionality. No other ath79-nand boards are using regulator-fixed
at this time.

Note: mtd_get_mac_binary art 0x5006 does not return the proper MAC
and the GL.iNet source indicates that only the 0x0 offset is valid

The ar71xx targets are unmodified.

Cc: Alexander Wördekemper <alexwoerde@web.de>

Signed-off-by: Jeff Kletsky <git-commits@allycomm.com>

3 files changed, 100 insertions, 40 deletions

diff --git a/target/linux/ath79/dts/qca9563_glinet_gl-ar750s-nor-nand.dts b/target/linux/ath79/dts/qca9563_glinet_gl-ar750s-nor-nand.dts
new file mode 100644
index 0000000000..92d1fb9ba2
--- /dev/null
+++ b/target/linux/ath79/dts/qca9563_glinet_gl-ar750s-nor-nand.dts
@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+/dts-v1/;
+
+#include "qca9563_glinet_gl-ar750s.dtsi"
+
+/ {
+	compatible = "glinet,gl-ar750s-nor-nand", "qca,qca9563";
+	model = "GL.iNet GL-AR750S (NOR/NAND)";
+};
+
+&nor_kernel {
+	label = "kernel";
+};
+
+&nand_ubi {
+	label = "ubi";
+};
diff --git a/target/linux/ath79/dts/qca9563_glinet_gl-ar750s-nor.dts b/target/linux/ath79/dts/qca9563_glinet_gl-ar750s-nor.dts
new file mode 100644
index 0000000000..bb33abd630
--- /dev/null
+++ b/target/linux/ath79/dts/qca9563_glinet_gl-ar750s-nor.dts
@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+/dts-v1/;
+
+#include "qca9563_glinet_gl-ar750s.dtsi"
+
+/ {
+	compatible = "glinet,gl-ar750s-nor", "qca,qca9563";
+	model = "GL.iNet GL-AR750S (NOR)";
+};
+
+/delete-node/ &nor_kernel;
+/delete-node/ &nor_reserved;
+
+&nor_firmware {
+	compatible = "denx,uimage";
+	label = "firmware";
+};
diff --git a/target/linux/ath79/dts/qca9563_glinet_gl-ar750s.dts b/target/linux/ath79/dts/qca9563_glinet_gl-ar750s.dtsi
index 3f9a091824..8250db55ad 100644
--- a/target/linux/ath79/dts/qca9563_glinet_gl-ar750s.dts
+++ b/target/linux/ath79/dts/qca9563_glinet_gl-ar750s.dtsi
@@ -1,4 +1,5 @@
 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
 /dts-v1/;
 
 #include <dt-bindings/gpio/gpio.h>
@@ -19,6 +20,7 @@
 		led-failsafe = &led_power;
 		led-running = &led_power;
 		led-upgrade = &led_power;
+		label-mac-device = &eth0;
 	};
 
 	keys {
@@ -50,13 +52,13 @@
 			default-state = "keep";
 		};
 
-		wlan2g {
+		led_wlan2g: wlan2g {
 			label = "gl-ar750s:green:wlan2g";
 			gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
 			linux,default-trigger = "phy1tpt";
 		};
 
-		wlan5g {
+		led_wlan5g: wlan5g {
 			label = "gl-ar750s:green:wlan5g";
 			gpios = <&gpio 20 GPIO_ACTIVE_HIGH>;
 			linux,default-trigger = "phy0tpt";
@@ -69,32 +71,20 @@
 		sda-gpios = <&gpio  5 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
 		scl-gpios = <&gpio 21 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
 	};
-
-	usb_vbus: regulator-usb-vbus {
-		compatible = "regulator-fixed";
-
-		regulator-name = "USB_VBUS";
-
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		regulator-always-on;
-
-		gpio = <&gpio 7 GPIO_ACTIVE_HIGH>;
-		enable-active-high;
-	};
 };
 
 &spi {
 	status = "okay";
 
-	num-cs = <0>;
+	num-cs = <2>;
+	cs-gpios = <0>, <0>;
 
-	flash@0 {
+	flash_nor: flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <25000000>;
 
-		partitions {
+		nor_partitions: partitions {
 			compatible = "fixed-partitions";
 			#address-cells = <1>;
 			#size-cells = <1>;
@@ -116,38 +106,55 @@
 				read-only;
 			};
 
-			partition@60000 {
-				compatible = "denx,uimage";
-				label = "firmware";
+			nor_firmware: partition@60000 {
+				label = "nor_firmware";
 				reg = <0x060000 0xfa0000>;
 			};
+
+			nor_kernel: partition_alt@60000 {
+				label = "nor_kernel";
+				reg = <0x060000 0x400000>;
+			};
+
+			nor_reserved: parition_alt@460000 {
+				label = "nor_reserved";
+				reg = <0x460000 0xba0000>;
+			};
 		};
 	};
-};
 
-&pcie {
-	status = "okay";
-};
+	flash_nand: flash@1 {
+		compatible = "spi-nand";
+		reg = <1>;
+		spi-max-frequency = <25000000>;
 
-&uart {
-	status = "okay";
-};
+		nand_partitions: partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
 
-&usb0 {
-	status = "okay";
-	vbus-supply = <&usb_vbus>;
+			nand_ubi: partition@0 {
+				label = "nand_ubi";
+				reg = <0x000000 0x8000000>;
+			};
+		};
+	};
 };
 
-&usb_phy0 {
+&eth0 {
 	status = "okay";
-};
 
-&usb1 {
-	status = "okay";
+	phy-handle = <&phy0>;
+	mtd-mac-address = <&art 0x0>;
 };
 
-&usb_phy1 {
-	status = "okay";
+&gpio {
+	usb_vbus {
+		gpio-hog;
+		gpios = <7 GPIO_ACTIVE_HIGH>;
+		output-high;
+		line-name = "usb-vbus";
+	};
 };
 
 &mdio0 {
@@ -165,11 +172,28 @@
 	};
 };
 
-&eth0 {
+&pcie {
 	status = "okay";
+};
 
-	mtd-mac-address = <&art 0x0>;
-	phy-handle = <&phy0>;
+&uart {
+	status = "okay";
+};
+
+&usb0 {
+	status = "okay";
+};
+
+&usb1 {
+	status = "okay";
+};
+
+&usb_phy0 {
+	status = "okay";
+};
+
+&usb_phy1 {
+	status = "okay";
 };
 
 &wmac {