ath79: add support for TP-Link TL-WA1201 v2

This device is a wireless access point working on the 2.4 GHz and 5 GHz
band, based on Qualcomm/Atheros QCA9563 + QCA9886.

Specification
- 775 MHz CPU
- 128 MB of RAM (DDR2)
- 16 MB of FLASH (SPI NOR)
- QCA9563: 2.4 GHz 3x3
- QCA9886: 5 GHz
- AR8033: 1x 1 Gbs Ethernet
- 4x LED, WPS factory reset and power button
- bare UART on PCB (accessible through testpoints)

Methods for Flashing:
- Apply factory image in OEM firmware web-gui. Wait a minute after the
  progress bar completes and restart the device.
- Sysupgrade on top of existing OpenWRT image
- Solder wires onto UART testpoints and attach a terminal.
  Boot the device and press enter to enter u-boot's menu. Then issue the
  following commands
  1. setenv serverip your-server-ip
     setenv ipaddr your-device-ip
  2. tftp 0x80060000 openwrt-squashfs.bin (Rembember output of size in
    hex, henceforth "sizeinhex")
  3. erase 0x9f030000 +"sizeinhex"
  4. cp.b 0x80060000 0x9f030000 0x"sizeinhex"
  5. reboot

Recover:
- U-boot serial console

Signed-off-by: Robert Balas <balasr@iis.ee.ethz.ch>
[convert to nvmem]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>

1 files changed, 161 insertions, 0 deletions

diff --git a/target/linux/ath79/dts/qca9563_tplink_tl-wa1201-v2.dts b/target/linux/ath79/dts/qca9563_tplink_tl-wa1201-v2.dts
new file mode 100644
index 0000000000..71ab4f8aad
--- /dev/null
+++ b/target/linux/ath79/dts/qca9563_tplink_tl-wa1201-v2.dts
@@ -0,0 +1,161 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "qca956x.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "tplink,tl-wa1201-v2", "qca,qca9563";
+	model = "TP-Link TL-WA1201 v2";
+
+	aliases {
+		label-mac-device = &eth0;
+		led-boot = &led_power;
+		led-failsafe = &led_power;
+		led-running = &led_power;
+		led-upgrade = &led_power;
+		mdio-gpio0 = &mdio2;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_power: power {
+			label = "green:power";
+			gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
+			default-state = "on";
+		};
+
+		wlan2g {
+			label = "green:wlan2g";
+			gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy1tpt";
+		};
+
+		wlan5g {
+			label = "green:wlan5g";
+			gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy0tpt";
+		};
+
+		lan {
+			label = "green:lan";
+			gpios = <&gpio 20 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "Reset button";
+			linux,code = <KEY_RESTART>;
+			gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
+			debounce-interval = <60>;
+		};
+
+		wps {
+			label = "WPS button";
+			linux,code = <KEY_WPS_BUTTON>;
+			gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
+			debounce-interval = <60>;
+		};
+	};
+
+	mdio2: mdio {
+		compatible = "virtual,mdio-gpio";
+
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		gpios = <&gpio 3 GPIO_ACTIVE_HIGH>, /* MDC */
+			<&gpio 4 GPIO_ACTIVE_HIGH>; /* MDIO */
+
+		phy4: ethernet-phy@4 {
+			reg = <4>;
+
+			eee-broken-100tx;
+			eee-broken-1000t;
+		};
+	};
+};
+
+&pcie {
+	status = "okay";
+};
+
+&eth0 {
+	status = "okay";
+
+	phy-mode = "sgmii";
+	phy-handle = <&phy4>;
+
+	nvmem-cells = <&macaddr_info_8>;
+	nvmem-cell-names = "mac-address";
+};
+
+&wmac {
+	status = "okay";
+
+	mtd-cal-data = <&art 0x1000>;
+
+	nvmem-cells = <&macaddr_info_8>;
+	nvmem-cell-names = "mac-address";
+};
+
+&spi {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <25000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "u-boot";
+				reg = <0x000000 0x020000>;
+				read-only;
+			};
+
+			info: partition@20000 {
+				label = "info";
+				reg = <0x020000 0x010000>;
+				read-only;
+			};
+
+			partition@30000 {
+				compatible = "denx,uimage";
+				label = "firmware";
+				reg = <0x030000 0xce0000>;
+			};
+
+			partition@d10000 {
+				label = "tplink";
+				reg = <0xd10000 0x2e0000>;
+				read-only;
+			};
+
+			art: partition@ff0000 {
+				label = "art";
+				reg = <0xff0000 0x010000>;
+				read-only;
+			};
+		};
+	};
+};
+
+&info {
+	compatible = "nvmem-cells";
+	#address-cells = <1>;
+	#size-cells = <1>;
+
+	macaddr_info_8: macaddr@8 {
+		reg = <0x8 0x6>;
+	};
+};