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authorChristian Lamparter <chunkeey@gmail.com>2018-12-24 17:44:03 +0100
committerChristian Lamparter <chunkeey@gmail.com>2018-12-24 19:18:07 +0100
commit87c5fd348d14de07735550c81d95fd20520055df (patch)
treea1da6ce608d41f7f01190ff94066be2c9a5a48e4 /target/linux/ath79/dts/qca9557.dtsi
parentd0bf8f4fd63260af78b17e42e114f98a34ae96cc (diff)
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ath79: fix pinmux reg size for QCA955x
The range of pinmux reg property "<0x1804002c 0x40>" for QCA955x SoC does not includes GPIO_FUNCTION register. Reported-by: INAGAKI Hiroshi <musashino.open@gmail.com> Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
Diffstat (limited to 'target/linux/ath79/dts/qca9557.dtsi')
-rw-r--r--target/linux/ath79/dts/qca9557.dtsi2
1 files changed, 1 insertions, 1 deletions
diff --git a/target/linux/ath79/dts/qca9557.dtsi b/target/linux/ath79/dts/qca9557.dtsi
index 0357be9b5c..bfc2545b27 100644
--- a/target/linux/ath79/dts/qca9557.dtsi
+++ b/target/linux/ath79/dts/qca9557.dtsi
@@ -95,7 +95,7 @@
pinmux: pinmux@1804002c {
compatible = "pinctrl-single";
- reg = <0x1804002c 0x40>;
+ reg = <0x1804002c 0x44>;
#size-cells = <0>;