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authorTomasz Maciej Nowak <tmn505@gmail.com>2020-12-17 17:24:26 +0100
committerAdrian Schmutzler <freifunk@adrianschmutzler.de>2020-12-19 19:42:00 +0100
commit0d96d36841e817f368e86d4af725570d757cb0ca (patch)
treea8cbdb733968385aacd69c06face94735e6f9a9c /target/linux/ath79/dts/qca9550_airtight_c-75.dts
parentd69ec61f7d51f4fb671345043bc6d8e4fe916815 (diff)
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ath79: add support for AirTight C-75
AirTight Networks (later renamed to Mojo Networks) C-75 is a dual-band access point, also sold by WatchGuard under name AP320. Specification SoC: Qualcomm Atheros QCA9550 RAM: 128 MiB DDR2 Flash: 2x 16 MiB SPI NOR WIFI: 2.4 GHz 3T3R integrated 5 GHz 3T3R QCA9890 oversized Mini PCIe card Ethernet: 2x 10/100/1000 Mbps QCA8334 port labeled LAN1 is PoE capable (802.3at) USB: 1x 2.0 LEDs: 7x which two are GPIO controlled, four switch controlled, one controlled by wireless driver Buttons: 1x GPIO controlled Serial: RJ-45 port, Cisco pinout baud: 115200, parity: none, flow control: none JTAG: Yes, pins marked J1 on PCB Installation 1. Prepare TFTP server with OpenWrt initramfs-kernel image. 2. Connect to one of LAN ports. 3. Connect to serial port. 4. Power on the device and when prompted to stop autoboot, hit any key. 5. Adjust "ipaddr" and "serverip" addresses in U-Boot environment, use 'setenv' to do that, then run following commands: tftpboot 0x81000000 <openwrt_initramfs-kernel_image_name> bootm 0x81000000 6. Wait about 1 minute for OpenWrt to boot. 7. Transfer OpenWrt sysupgrade image to /tmp directory and flash it with: sysupgrade -n /tmp/<openwrt_sysupgrade_image_name> 8. After flashing, the access point will reboot to OpenWrt. Wait few minutes, until the Power LED stops blinking, then it's ready for configuration. Known issues Green power LED does not work. Additional information The U-Boot fails to initialise ethernet ports correctly when a UART adapter is attached to UART pins (marked J3 on PCB). Cc: Vladimir Georgievsky <vladimir.georgievsky@yahoo.com> Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com>
Diffstat (limited to 'target/linux/ath79/dts/qca9550_airtight_c-75.dts')
-rw-r--r--target/linux/ath79/dts/qca9550_airtight_c-75.dts169
1 files changed, 169 insertions, 0 deletions
diff --git a/target/linux/ath79/dts/qca9550_airtight_c-75.dts b/target/linux/ath79/dts/qca9550_airtight_c-75.dts
new file mode 100644
index 0000000000..566aa6aef6
--- /dev/null
+++ b/target/linux/ath79/dts/qca9550_airtight_c-75.dts
@@ -0,0 +1,169 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "qca955x.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "AirTight Networks C-75";
+ compatible = "airtight,c-75", "qca,qca9550", "qca,qca9558";
+
+ aliases {
+ label-mac-device = &eth0;
+ led-boot = &led_power;
+ led-failsafe = &led_power;
+ led-upgrade = &led_power;
+ };
+
+ keys {
+ compatible = "gpio-keys";
+
+ reset {
+ label = "reset";
+ linux,code = <KEY_RESTART>;
+ gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ led_power: power {
+ label = "amber:power";
+ gpios = <&gpio 14 GPIO_ACTIVE_HIGH>;
+ default-state = "on";
+ };
+
+ wlan2g {
+ label = "green:wlan2g";
+ gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "phy1tpt";
+ };
+ };
+};
+
+&eth0 {
+ status = "okay";
+
+ mtd-mac-address = <&art 0x0>;
+ phy-handle = <&phy0>;
+ pll-data = <0xa6000000 0x00000101 0x00001616>;
+};
+
+&mdio0 {
+ status = "okay";
+
+ phy0: ethernet-phy@0 {
+ reg = <0>;
+ qca,ar8327-initvals = <
+ 0x04 0x07600000 /* PORT0 PAD MODE CTRL */
+ 0x0c 0x00080080 /* PORT6 PAD MODE CTRL */
+ 0x58 0xc935c935 /* LED2 CTRL */
+ 0x5c 0x03ffff00 /* LED3 CTRL */
+ 0x7c 0x0000007e /* PORT0_STATUS */
+ 0x94 0x0000007e /* PORT6_STATUS */
+ >;
+ };
+};
+
+&eth1 {
+ status = "okay";
+
+ mtd-mac-address = <&art 0x6>;
+ pll-data = <0x03000101 0x00000101 0x00001616>;
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+};
+
+&pcie0 {
+ status = "okay";
+
+ wifi@0,0 {
+ compatible = "qcom,ath10k";
+ reg = <0x0000 0 0 0 0>;
+ };
+};
+
+&spi {
+ status = "okay";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <25000000>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "u-boot";
+ reg = <0x000000 0x040000>;
+ read-only;
+ };
+
+ partition@40000 {
+ label = "u-boot-env";
+ reg = <0x040000 0x010000>;
+ };
+
+ partition@50000 {
+ label = "wlandrv";
+ reg = <0x050000 0x010000>;
+ read-only;
+ };
+
+ partition@60000 {
+ label = "firmware";
+ reg = <0x060000 0xf90000>;
+ compatible = "denx,uimage";
+ };
+
+ art: partition@ff0000 {
+ label = "art";
+ reg = <0xff0000 0x010000>;
+ read-only;
+ };
+ };
+ };
+
+ flash@1 {
+ compatible = "jedec,spi-nor";
+ reg = <1>;
+ spi-max-frequency = <25000000>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "opt";
+ reg = <0x0 0x1000000>;
+ };
+ };
+ };
+};
+
+&uart {
+ status = "okay";
+};
+
+&usb_phy0 {
+ status = "okay";
+};
+
+&usb0 {
+ status = "okay";
+};
+
+&wmac {
+ status = "okay";
+
+ mtd-cal-data = <&art 0x1000>;
+};