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authorMarty E. Plummer <hanetzer@startmail.com>2018-05-27 00:37:22 -0500
committerJohn Crispin <john@phrozen.org>2018-06-18 20:29:38 +0200
commitfe3b62bbdc66a50c985ba3b0c9e873e5c0862ee2 (patch)
treec0cfef0b1aa848dd016f8d91d5f5ab27a06d48de /target/linux/ath79/dts/qca9533.dtsi
parent142477e75112f0c3a21d43a1b36922d46c67bd33 (diff)
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ath79: initial gl-ar300m support
Signed-off-by: Marty E. Plummer <hanetzer@startmail.com>
Diffstat (limited to 'target/linux/ath79/dts/qca9533.dtsi')
-rw-r--r--target/linux/ath79/dts/qca9533.dtsi235
1 files changed, 235 insertions, 0 deletions
diff --git a/target/linux/ath79/dts/qca9533.dtsi b/target/linux/ath79/dts/qca9533.dtsi
new file mode 100644
index 0000000000..ff1e77e070
--- /dev/null
+++ b/target/linux/ath79/dts/qca9533.dtsi
@@ -0,0 +1,235 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+#include <dt-bindings/clock/ath79-clk.h>
+#include "ath79.dtsi"
+
+/ {
+ compatible = "qca,qca9533";
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "mips,mips24Kc";
+ clocks = <&pll ATH79_CLK_CPU>;
+ reg = <0>;
+ };
+ };
+
+ ref: ref {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ };
+
+ ahb {
+ apb {
+ ddr_ctrl: memory-controller@18000000 {
+ compatible = "qca,ar9530-ddr-controller",
+ "qca,ar7240-ddr-controller";
+ reg = <0x18000000 0x128>;
+
+ #qca,ddr-wb-channel-cells = <1>;
+ };
+
+ uart: uart@18020000 {
+ compatible = "ns16550a";
+ reg = <0x18020000 0x20>;
+
+ interrupts = <3>;
+
+ clocks = <&pll ATH79_CLK_REF>;
+ clock-names = "uart";
+
+ reg-io-width = <4>;
+ reg-shift = <2>;
+ no-loopback-test;
+
+ status = "disabled";
+ };
+
+ usb_phy: usb-phy@18030000 {
+ compatible = "qca,ar7200-usb-phy";
+ reg = <0x18030000 0x100>;
+ #phy-cells = <0>;
+
+ reset-names = "usb-phy", "usb-suspend-override";
+ resets = <&rst 4>, <&rst 3>;
+
+ status = "disabled";
+ };
+
+ gpio: gpio@18040000 {
+ compatible = "qca,ar9530-gpio",
+ "qca,ar9340-gpio";
+ reg = <0x18040000 0x28>;
+
+ interrupts = <2>;
+ ngpios = <20>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ pinmux: pinmux@1804002c {
+ compatible = "pinctrl-single";
+
+ reg = <0x1804002c 0x48>;
+
+ #size-cells = <0>;
+
+ pinctrl-single,bit-per-mux;
+ pinctrl-single,register-width = <32>;
+ pinctrl-single,function-mask = <0x1>;
+ #pinctrl-cells = <2>;
+
+ jtag_disable_pins: pinmux_jtag_disable_pins {
+ pinctrl-single,bits = <
+ 0x40 0x2 0x2
+ >;
+ };
+ };
+
+ pll: pll-controller@18050000 {
+ compatible = "qca,qca9530-pll", "syscon";
+ reg = <0x18050000 0x48>;
+
+ #clock-cells = <1>;
+ clocks = <&ref>;
+ clock-names = "ref";
+ clock-output-names = "cpu", "ddr", "ahb";
+ };
+
+ wdt: wdt@18060008 {
+ compatible = "qca,qca9530-wdt", "qca,ar7130-wdt";
+ reg = <0x18060008 0x8>;
+
+ interrupts = <4>;
+
+ clocks = <&pll ATH79_CLK_AHB>;
+ clock-names = "wdt";
+ };
+
+ rst: reset-controller@1806001c {
+ compatible = "qca,qca9530-reset",
+ "qca,ar7100-reset";
+ reg = <0x1806001c 0xac>;
+
+ #reset-cells = <1>;
+
+ intc2: interrupt-controller@2 {
+ compatible = "qcom,qca9556-intc";
+
+ interrupts = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ qcom,pending-bits = <0x1f0>, /* pcie rc1 */
+ <0xf>; /* wmac */
+ };
+ };
+
+ pcie0: pcie-controller@180c0000 {
+ compatible = "qcom,ar7240-pci";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ bus-range = <0x0 0x0>;
+ reg = <0x180c0000 0x1000>, /* CRP */
+ <0x180f0000 0x100>, /* CTRL */
+ <0x14000000 0x1000>; /* CFG */
+ reg-names = "crp_base", "ctrl_base", "cfg_base";
+ ranges = <0x2000000 0 0x10000000 0x10000000 0 0x04000000 /* pci memory */
+ 0x1000000 0 0x00000000 0x0000000 0 0x000001>; /* io space */
+ interrupt-parent = <&intc2>;
+ interrupts = <0>;
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ interrupt-map-mask = <0 0 0 1>;
+ interrupt-map = <0 0 0 0 &pcie0 0>;
+ status = "disabled";
+ };
+
+ wmac: gmac@18100000 {
+ compatible = "qca,qca9530-wmac";
+ reg = <0x18100000 0x230000>;
+
+ interrupt-parent = <&cpuintc>;
+ interrupts = <2>;
+
+ status = "disabled";
+ };
+ };
+
+ usb0: usb@1b000000 {
+ compatible = "generic-ehci";
+ reg = <0x1b000000 0x1000>;
+
+ interrupts = <3>;
+ resets = <&rst 5>;
+ reset-names = "usb-host";
+ dr_mode = "host";
+
+ has-transaction-translator;
+ caps-offset = <0x100>;
+
+ phy-names = "usb-phy";
+ phys = <&usb_phy>;
+
+ status = "disabled";
+ };
+
+ spi: spi@1f000000 {
+ compatible = "qca,ar9530-spi", "qca,ar7100-spi";
+ reg = <0x1f000000 0x10>;
+
+ clocks = <&pll ATH79_CLK_AHB>;
+ clock-names = "ahb";
+
+ status = "disabled";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ };
+
+};
+
+&mdio0 {
+ resets = <&rst 22>;
+ reset-names = "mdio";
+};
+
+&eth0 {
+ compatible = "qca,qca9530-eth", "syscon";
+ pll-data = <0x82000101 0x80000101 0x80001313>;
+ reg = <0x19000000 0x200
+ 0x18070000 0x4>;
+ pll-reg = <0x4 0x2c 17>;
+ pll-handle = <&pll>;
+
+ reset-names = "mac";
+ resets = <&rst 9>;
+};
+
+
+&mdio1 {
+ resets = <&rst 23>;
+ reset-names = "mdio";
+ builtin-switch;
+};
+
+&eth1 {
+ compatible = "qca,qca9530-eth", "syscon";
+ resets = <&rst 13>;
+ reset-names = "mac";
+};