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authorAdrian Schmutzler <freifunk@adrianschmutzler.de>2021-02-24 01:52:34 +0100
committerAdrian Schmutzler <freifunk@adrianschmutzler.de>2021-02-24 02:53:53 +0100
commit3a4b751110b32380cf827f14a203190cfbc2e40f (patch)
tree135fe08d50786c8f7a697dde043a95908567fe6d /target/linux/ath79/dts/ar9344_pcs_cap324.dts
parent1322150b0cc8acdb7fbcf7115a5201803fc4986d (diff)
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ath79: enable UART in SoC DTSI files
The uart node is enabled on all devices except one (GL-USB150 *). Thus, let's not have a few hundred nodes to enable it, but do not disable it in the first place. Where the majority of devices is using it, also move the serial0 alias to the DTSI. *) Since GL-USB150 even defines serial0 alias, the missing uart is probably just a mistake. Anyway, disable it for now so this patch stays cosmetic. Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Diffstat (limited to 'target/linux/ath79/dts/ar9344_pcs_cap324.dts')
-rw-r--r--target/linux/ath79/dts/ar9344_pcs_cap324.dts5
1 files changed, 0 insertions, 5 deletions
diff --git a/target/linux/ath79/dts/ar9344_pcs_cap324.dts b/target/linux/ath79/dts/ar9344_pcs_cap324.dts
index de75b8e0b4..3ce8bb58fc 100644
--- a/target/linux/ath79/dts/ar9344_pcs_cap324.dts
+++ b/target/linux/ath79/dts/ar9344_pcs_cap324.dts
@@ -10,7 +10,6 @@
compatible = "pcs,cap324", "qca,ar9344";
aliases {
- serial0 = &uart;
led-boot = &led_power_amber;
led-failsafe = &led_power_amber;
led-running = &led_power_green;
@@ -73,10 +72,6 @@
clock-frequency = <25000000>;
};
-&uart {
- status = "okay";
-};
-
&spi {
status = "okay";