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authorDaniel F. Dickinson <cshored@thecshore.com>2018-07-28 08:52:39 -0400
committerJohn Crispin <john@phrozen.org>2018-07-30 10:43:31 +0200
commit915966d86121613dad04ee77ca1849b1c2187e13 (patch)
tree57de24a6a2abc64f039534ea312af47063b7ce8d /target/linux/ath79/dts/ar9344_pcs_cap324.dts
parent4b93cbd17269409b22e4ba9cf5d6f8be86e4fadb (diff)
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ath79: Port PowerCloud Systems CAP324 support
The CAP324 was an AP for a NaaS offering that is now defunct. While previously supported in the ar71xx arch, there were some errata (to be fixed shortly). Notable differences from ar71xx support: 1) The method of getting the ath9k firmware for the PCIe 2ghz wifi has changed (due to changes in how the arch handles this), since this device doesn't use the EEPROM except to get the MAC address of the wifi. 2) /etc/config/wireless will need to be regenerated as the path(s) to the wireless device(s) have changed. 3) ath79 OpenWrt firmware no longer supports build an image that allows reverting to stock firmware (as the cloud service no longer exists, the stock firmware is useless), instead using all of the flash for image and overlay (less u-boot/env and art). 4) Initial network config treats the ethernet port as a Lan port with the standard default address (192.168.1.1 unless changed in .config --e.g. via menuconfig) instead of using DHCP (this was the default for the stock firmware, however for openwrt use this is rather confusion and counter-productive as the user has a harder time finding the device on the network. Signed-off-by: Daniel F. Dickinson <cshored@thecshore.com>
Diffstat (limited to 'target/linux/ath79/dts/ar9344_pcs_cap324.dts')
-rw-r--r--target/linux/ath79/dts/ar9344_pcs_cap324.dts179
1 files changed, 179 insertions, 0 deletions
diff --git a/target/linux/ath79/dts/ar9344_pcs_cap324.dts b/target/linux/ath79/dts/ar9344_pcs_cap324.dts
new file mode 100644
index 0000000000..57cf81694d
--- /dev/null
+++ b/target/linux/ath79/dts/ar9344_pcs_cap324.dts
@@ -0,0 +1,179 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+#include "ar9344.dtsi"
+
+/ {
+ model = "PowerCloud Systems CAP324";
+ compatible = "pcs,cap324", "qca,ar9344";
+
+ aliases {
+ serial0 = &uart;
+ led-status = &status;
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ poll-interval = <20>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&jtag_disable_pins>;
+
+ reset {
+ label = "Reset button";
+ linux,code = <KEY_RESTART>;
+ gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
+ debounce-interval = <60>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ power_amber {
+ label = "pcs:amber:power";
+ gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+
+ status: power_green {
+ label = "pcs:green:power";
+ gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
+ default-state = "on";
+ };
+
+ wlan_amber {
+ label = "pcs:amber:wlan";
+ gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ linux,default-trigger = "phy1tpt";
+ };
+
+ wlan_green {
+ label = "pcs:green:wlan";
+ gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ linux,default-trigger = "phy0tpt";
+ };
+
+ lan_amber {
+ label = "pcs:lan:amber";
+ gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+
+ lan_green {
+ label = "pcs:lan:green";
+ gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+ };
+
+};
+
+&ref {
+ clock-frequency = <25000000>;
+};
+
+&uart {
+ status = "okay";
+};
+
+&gpio {
+ status = "okay";
+};
+
+&spi {
+ num-cs = <1>;
+
+ status = "okay";
+
+ flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <25000000>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ uboot: partition@0 {
+ label = "u-boot";
+ reg = <0x000000 0x040000>;
+ read-only;
+ };
+
+ partition@40000 {
+ label = "u-boot-env";
+ reg = <0x040000 0x010000>;
+ read-only;
+ };
+
+ partition@50000 {
+ label = "firmware";
+ reg = <0x050000 0x0fa0000>;
+ };
+
+ art: partition@7f0000 {
+ label = "art";
+ reg = <0xff0000 0x010000>;
+ read-only;
+ };
+ };
+ };
+};
+
+&pcie {
+ status = "okay";
+
+ ath9k: wifi@168c,0030 {
+ compatible = "168c,0030";
+ reg = <0x0000 0 0 0 0>;
+ mtd-mac-address = <&art 0x0>;
+ mtd-mac-address-increment = <(-2)>;
+ mtd-cal-data = <&art 0x5000>;
+ qca,no-eeprom;
+ qca,disable-5ghz;
+ #gpio-cells = <2>;
+ gpio-controller;
+ };
+};
+
+&wmac {
+ status = "okay";
+
+ qca,disable-2ghz;
+ mtd-cal-data = <&art 0x1000>;
+ mtd-mac-address = <&art 0x0>;
+ mtd-mac-address-increment = <(-1)>;
+};
+
+&mdio0 {
+ status = "okay";
+
+ phy-mask = <0>;
+
+ phy0: ethernet-phy@0 {
+ reg = <0>;
+ phy-mode = "rgmii";
+ };
+};
+
+&eth0 {
+ status = "okay";
+
+ /* default for ar934x, except for 1000M */
+ pll-data = <0x06000000 0x00000101 0x00001616>;
+
+ mtd-mac-address = <&art 0x0>;
+
+ phy-mode = "rgmii";
+ phy-handle = <&phy0>;
+};