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| author | Michal Cieslakiewicz <michal.cieslakiewicz@wp.pl> | 2019-10-16 12:38:43 +0200 |
|---|---|---|
| committer | John Crispin <john@phrozen.org> | 2019-10-21 13:14:52 +0200 |
| commit | 69df7eb73d9922e5e717b004aae06f93fe692dba (patch) | |
| tree | 34085f455d0fbe0a418dc72cf4a2b8e59ae08117 /target/linux/ath79/dts/ar724x.dtsi | |
| parent | 1bc921f419df508c57dc07cd3e43cdf0408c17dd (diff) | |
| download | upstream-69df7eb73d9922e5e717b004aae06f93fe692dba.tar.gz upstream-69df7eb73d9922e5e717b004aae06f93fe692dba.tar.bz2 upstream-69df7eb73d9922e5e717b004aae06f93fe692dba.zip | |
ath79: add LAN LEDs control bits for AR724x GPIO function pinmux
Currently AR724x pinmux for register 0x18040028 controls only JTAG disable bit.
This patch adds new DTS settings to control LAN LEDs and CLKs that allow
full software control over these diodes - exactly the same is done by ar71xx
target in device setup phase for many routers (WNR2000v3 for example).
'switch_led_disable_pins' clears AR724X_GPIO_FUNC_ETH_SWITCH_LED[0-4]_EN bits.
'clks_disable_pins' clears AR724X_GPIO_FUNC_CLK_OBS[1-5]_EN and
AR724X_GPIO_FUNC_GE0_MII_CLK_EN bits. These all should be used together, along
with 'jtag_disable_pins', to allow OS to control all GPIO-connected LEDs and
buttons on device.
Signed-off-by: Michal Cieslakiewicz <michal.cieslakiewicz@wp.pl>
Diffstat (limited to 'target/linux/ath79/dts/ar724x.dtsi')
| -rw-r--r-- | target/linux/ath79/dts/ar724x.dtsi | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/target/linux/ath79/dts/ar724x.dtsi b/target/linux/ath79/dts/ar724x.dtsi index b2844bf179..95832d998a 100644 --- a/target/linux/ath79/dts/ar724x.dtsi +++ b/target/linux/ath79/dts/ar724x.dtsi @@ -75,7 +75,15 @@ #pinctrl-cells = <2>; jtag_disable_pins: pinmux_jtag_disable_pins { - pinctrl-single,bits = <0x0 0x1 0x1>; + pinctrl-single,bits = <0x0 0x1 0x1>; + }; + + switch_led_disable_pins: pinmux_switch_led_disable_pins { + pinctrl-single,bits = <0x0 0x0 0xf8>; + }; + + clks_disable_pins: pinmux_clks_disable_pins { + pinctrl-single,bits = <0x0 0x0 0x81f00>; }; }; |