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authorJohn Crispin <john@phrozen.org>2018-05-24 16:53:10 +0200
committerJohn Crispin <john@phrozen.org>2018-05-24 17:24:31 +0200
commit76ba98d9b0b6e06bb7e843207654223cb62518d6 (patch)
tree34fec623c4450216119aacf6b038bd3bc1742a69 /target/linux/ath79/dts/ar724x.dtsi
parent45456fe0c8af2274ccf5db57942a8009a841fac3 (diff)
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ath79: drop, its not ready for a release yet
Signed-off-by: John Crispin <john@phrozen.org>
Diffstat (limited to 'target/linux/ath79/dts/ar724x.dtsi')
-rw-r--r--target/linux/ath79/dts/ar724x.dtsi140
1 files changed, 0 insertions, 140 deletions
diff --git a/target/linux/ath79/dts/ar724x.dtsi b/target/linux/ath79/dts/ar724x.dtsi
deleted file mode 100644
index 4108745113..0000000000
--- a/target/linux/ath79/dts/ar724x.dtsi
+++ /dev/null
@@ -1,140 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-#include <dt-bindings/clock/ath79-clk.h>
-#include "ath79.dtsi"
-
-/ {
- compatible = "qca,ar7240";
-
- #address-cells = <1>;
- #size-cells = <1>;
-
- chosen {
- bootargs = "console=ttyS0,115200";
- };
-
- cpus {
- #address-cells = <1>;
- #size-cells = <0>;
-
- cpu@0 {
- device_type = "cpu";
- compatible = "mips,mips24Kc";
- clocks = <&pll ATH79_CLK_CPU>;
- reg = <0>;
- };
- };
-
- ahb: ahb {
- apb {
- ddr_ctrl: memory-controller@18000000 {
- compatible = "qca,ar9132-ddr-controller",
- "qca,ar7240-ddr-controller";
- reg = <0x18000000 0x100>;
-
- #qca,ddr-wb-channel-cells = <1>;
- };
-
- uart: uart@18020000 {
- compatible = "ns16550a";
- reg = <0x18020000 0x20>;
- interrupts = <3>;
-
- clocks = <&pll ATH79_CLK_AHB>;
- clock-names = "uart";
-
- reg-io-width = <4>;
- reg-shift = <2>;
- no-loopback-test;
-
- status = "disabled";
- };
-
- gpio: gpio@18040000 {
- compatible = "qca,ar7240-gpio",
- "qca,ar7100-gpio";
- reg = <0x18040000 0x30>;
- interrupts = <2>;
-
- ngpios = <18>;
-
- gpio-controller;
- #gpio-cells = <2>;
-
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- pll: pll-controller@18050000 {
- compatible = "qca,ar7240-pll",
- "qca,ar7240-pll";
- reg = <0x18050000 0x20>;
-
- clock-names = "ref";
- /* The board must provides the ref clock */
-
- #clock-cells = <1>;
- clock-output-names = "cpu", "ddr", "ahb";
- };
-
- wdt: wdt@18060008 {
- compatible = "qca,ar7130-wdt";
- reg = <0x18060008 0x8>;
-
- interrupts = <4>;
-
- clocks = <&pll ATH79_CLK_AHB>;
- clock-names = "wdt";
- };
-
- rst: reset-controller@1806001c {
- compatible = "qca,ar7240-reset",
- "qca,ar7100-reset";
- reg = <0x1806001c 0x4>;
-
- #reset-cells = <1>;
- };
-
- pcie: pcie-controller@180c0000 {
- compatible = "qcom,ar7240-pci";
- #address-cells = <3>;
- #size-cells = <2>;
- bus-range = <0x0 0x0>;
- reg = <0x180c0000 0x1000>, /* CRP */
- <0x180f0000 0x100>, /* CTRL */
- <0x14000000 0x1000>; /* CFG */
- reg-names = "crp_base", "ctrl_base", "cfg_base";
- ranges = <0x2000000 0 0x10000000 0x10000000 0 0x04000000 /* pci memory */
- 0x1000000 0 0x00000000 0x0000000 0 0x000001>; /* io space */
- interrupt-parent = <&cpuintc>;
- interrupts = <2>;
-
- interrupt-controller;
- #interrupt-cells = <1>;
-
- interrupt-map-mask = <0 0 0 1>;
- interrupt-map = <0 0 0 0 &pcie 0>;
- status = "disabled";
- };
- };
-
- spi: spi@1f000000 {
- compatible = "qca,ar7240-spi",
- "qca,ar7100-spi";
- reg = <0x1f000000 0x10>;
-
- clocks = <&pll ATH79_CLK_AHB>;
- clock-names = "ahb";
-
- status = "disabled";
-
- #address-cells = <1>;
- #size-cells = <0>;
- };
- };
-};
-
-&cpuintc {
- qca,ddr-wb-channel-interrupts = <2>, <3>, <4>, <5>;
- qca,ddr-wb-channels = <&ddr_ctrl 3>, <&ddr_ctrl 2>,
- <&ddr_ctrl 0>, <&ddr_ctrl 1>;
-};