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| author | Chuanhong Guo <gch981213@gmail.com> | 2018-07-17 17:09:14 +0800 |
|---|---|---|
| committer | John Crispin <john@phrozen.org> | 2018-07-30 10:43:35 +0200 |
| commit | a5fa6b3825c18058e6b2e5370041fa6cd9c81d12 (patch) | |
| tree | ba5b5664a82de48977e1dec5a5f9f54440520f9c /target/linux/ath79/dts/ar7242.dtsi | |
| parent | 4e5ba5076097cf10865c9d65a6fbe887dba5a467 (diff) | |
| download | upstream-a5fa6b3825c18058e6b2e5370041fa6cd9c81d12.tar.gz upstream-a5fa6b3825c18058e6b2e5370041fa6cd9c81d12.tar.bz2 upstream-a5fa6b3825c18058e6b2e5370041fa6cd9c81d12.zip | |
ath79: ar724x: Fix reset definition for gmac0/gmac1
reset bit 8 is for builtin switch and bit 12 is marked 'reserved' on datasheet.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Diffstat (limited to 'target/linux/ath79/dts/ar7242.dtsi')
| -rw-r--r-- | target/linux/ath79/dts/ar7242.dtsi | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/target/linux/ath79/dts/ar7242.dtsi b/target/linux/ath79/dts/ar7242.dtsi index 189e768e9f..7828c9fadc 100644 --- a/target/linux/ath79/dts/ar7242.dtsi +++ b/target/linux/ath79/dts/ar7242.dtsi @@ -51,8 +51,8 @@ pll-reg = <0x4 0x2c 17>; pll-handle = <&pll>; - resets = <&rst 8>, <&rst 9>; - reset-names = "mac", "phy"; + resets = <&rst 9>; + reset-names = "mac"; }; &mdio1 { @@ -71,8 +71,8 @@ ð1 { compatible = "qca,ar7242-eth", "syscon", "simple-mfd"; - resets = <&rst 12>, <&rst 13>; - reset-names = "mac", "phy"; + resets = <&rst 13>; + reset-names = "mac"; phy-mode = "gmii"; |