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author | Mathias Kresin <dev@kresin.me> | 2018-05-08 07:22:38 +0200 |
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committer | Mathias Kresin <dev@kresin.me> | 2018-05-17 07:40:19 +0200 |
commit | 0ff5785c5d5e57d99acb8da06d2c08903448b663 (patch) | |
tree | 4541e482fb5751cbedcaf1e94fd9dae380432cdc /target/linux/ath79/dts/ar7241_ubnt_unifi.dts | |
parent | 8f7e28a7835521e8e0e6f9ff44005c3374e39bf0 (diff) | |
download | upstream-0ff5785c5d5e57d99acb8da06d2c08903448b663.tar.gz upstream-0ff5785c5d5e57d99acb8da06d2c08903448b663.tar.bz2 upstream-0ff5785c5d5e57d99acb8da06d2c08903448b663.zip |
ath79: fix dts files
Add the SoC compatible to the individual dts files. Rename the dts files
to match the common pattern.
Remove dts files wich aren't used and no image in ar71xx exists.
Signed-off-by: Mathias Kresin <dev@kresin.me>
Diffstat (limited to 'target/linux/ath79/dts/ar7241_ubnt_unifi.dts')
-rw-r--r-- | target/linux/ath79/dts/ar7241_ubnt_unifi.dts | 142 |
1 files changed, 142 insertions, 0 deletions
diff --git a/target/linux/ath79/dts/ar7241_ubnt_unifi.dts b/target/linux/ath79/dts/ar7241_ubnt_unifi.dts new file mode 100644 index 0000000000..1cb45e6afc --- /dev/null +++ b/target/linux/ath79/dts/ar7241_ubnt_unifi.dts @@ -0,0 +1,142 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/dts-v1/; + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> + +#include "ar7241.dtsi" + +/ { + compatible = "ubnt,unifi", "qca,ar7241"; + model = "Ubiquiti UniFi AP"; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x4000000>; + }; + + extosc: ref { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <40000000>; + }; + + keys { + compatible = "gpio-keys-polled"; + #address-cells = <1>; + #size-cells = <0>; + + poll-interval = <20>; + button@0 { + label = "reset"; + linux,code = <KEY_RESTART>; + gpios = <&gpio 12 GPIO_ACTIVE_LOW>; + debounce-interval = <60>; + }; + }; + + leds { + compatible = "gpio-leds"; + led@0 { + label = "ubnt:green:dome"; + gpios = <&gpio 0 GPIO_ACTIVE_HIGH>; + }; + + led@1 { + label = "ubnt:orange:dome"; + gpios = <&gpio 1 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&uart { + status = "okay"; +}; + +&pll { + clocks = <&extosc>; +}; + +&spi { + status = "okay"; + num-cs = <1>; + + flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "mx25l6405d"; + reg = <0>; + spi-max-frequency = <25000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "u-boot"; + reg = <0x000000 0x040000>; + read-only; + }; + + partition@1 { + label = "u-boot-env"; + reg = <0x040000 0x010000>; + }; + + partition@2 { + label = "firmware"; + reg = <0x050000 0x750000>; + }; + + partition@3 { + label = "board_config"; + reg = <0x7a0000 0x010000>; + read-only; + }; + + partition@4 { + label = "cfg"; + reg = <0x7b0000 0x040000>; + read-only; + }; + + art: partition@5 { + label = "art"; + reg = <0x7f0000 0x010000>; + read-only; + }; + }; + }; +}; + +&pcie { + status = "okay"; + + ath9k@0000 { + reg = <0x0000 0 0 0 0>; + qca,no-eeprom; + }; +}; + +&mdio0 { + status = "okay"; + + phy4: ethernet-phy@4 { + reg = <4>; + phy-mode = "mii"; + }; +}; + +ð0 { + status = "okay"; + + mtd-mac-address = <&art 0x0>; + phy-handle = <&phy4>; +}; + +ð1 { + status = "okay"; + + compatible = "syscon"; +}; |