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authorRussell Senior <russell@personaltelco.net>2020-12-22 18:32:54 -0800
committerAdrian Schmutzler <freifunk@adrianschmutzler.de>2021-01-15 18:32:38 +0100
commit591a4c9ed3a3e3d9b0a2d1dd856c1df87892b877 (patch)
treec20a0239cd6b9f9d10a6a2e38374af81e4fe663a /target/linux/ath79/dts/ar7241_tplink.dtsi
parent583e39e3d5149357c8070eb7cdd942e42ea44906 (diff)
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ath79: Add support for Ubiquiti Bullet AC
CPU: Atheros AR9342 rev 3 SoC RAM: 64 MB DDR2 Flash: 16 MB NOR SPI WLAN 2.4GHz: Atheros AR9342 v3 (ath9k) WLAN 5.0GHz: QCA988X Ports: 1x GbE Flashing procedure is identical to other ubnt devices. https://openwrt.org/toh/ubiquiti/common Flashing through factory firmware 1. Ensure firmware version v8.7.0 is installed. Up/downgrade to this exact version. 2. Patch fwupdate.real binary using `hexdump -Cv /bin/ubntbox | sed 's/14 40 fe 27/00 00 00 00/g' | \ hexdump -R > /tmp/fwupdate.real` 3. Make the patched fwupdate.real binary executable using `chmod +x /tmp/fwupdate.real` 4. Copy the squashfs factory image to /tmp on the device 5. Flash OpenWrt using `/tmp/fwupdate.real -m <squashfs-factory image>` 6. Wait for the device to reboot (copied from Ubiquiti NanoBeam AC and modified) Flashing from serial console 1. Connect serial console (115200 baud) 2. Connect ethernet to a network with a TFTP server, through a passive PoE injector. 3. Press a key to obtain a u-boot prompt 4. Set your TFTP server's ip address, with: setenv serverip <tftp-server-address> 5. Set the Bullet AC's ip address, with: setenv ipaddr <bullet-ac-address> 6. Set the boot file, with: setenv bootfile <name-of-initramfs-binary-on-tftp-server> 7. Fetch the binary with tftp: tftpboot 8. Boot the initramfs binary: bootm 9. From the initramfs, fetch the sysupgrade binary, and flash it with sysupgrade. The Bullet AC is identified as a 2WA board by Ubiquiti. As such, the UBNT_TYPE must match from the "Flashing through factory firmware" install instructions to work. Phy0 is QCA988X which can tune either band (2.4 or 5GHz). Phy1 is AR9342, on which 5GHz is disabled. It isn't currently known whether phy1 is routed to the N connector at all. Signed-off-by: Russell Senior <russell@personaltelco.net>
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