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author | Dmitry Tunin <hanipouspilot@gmail.com> | 2018-08-24 11:56:57 +0300 |
---|---|---|
committer | John Crispin <john@phrozen.org> | 2018-08-28 11:26:53 +0200 |
commit | 8132e0624726f0df512f79052299a5790259cda0 (patch) | |
tree | dcf28130341cc3d3fc0ec29caba3eb43476e7341 /target/linux/ath79/dts/ar7100.dtsi | |
parent | 028daa99743b87d33759529d40835cb51dced5cc (diff) | |
download | upstream-8132e0624726f0df512f79052299a5790259cda0.tar.gz upstream-8132e0624726f0df512f79052299a5790259cda0.tar.bz2 upstream-8132e0624726f0df512f79052299a5790259cda0.zip |
ath79: fix ar7100 PCI IRQ handling
Currently all PCI devices get the same IRQ that affects performance badly.
This commit adresses this problem and cleans the code.
ar7100 has a special PCI interrupt controller@18060018 that works exactly
the same way as misc interrupt controller.
This patch does the following:
1. Defines pci-intc interrupt controller@18060018 in dtsi.
2. Removes interrupt-controller property from PCI node.
3. Sets a correct interrupt mask for PCI devices.
4. Removes all IRQ handling code from the PCI driver.
"qca,ar7100-misc-intc" should be used as the compatible property, becuase on ar7100
the controlled status register is read-only and the ack method used in
"qca,ar7240-misc-intc" won't work properly.
There are two very minor downsides of this patch that don't affect perormance:
1. We allocate an IRQ domain of 32 IRQ, whan we need only 5. But ar7100 aren't tiny un terms of RAM
and that is not very important and can be tuned if we implement "nr-interrupts" property".
2. It reuses the same irg chip name "MISC" for both controllers.
Run tested on DIR-825 B1.
Signed-off-by: Dmitry Tunin <hanipouspilot@gmail.com>
Diffstat (limited to 'target/linux/ath79/dts/ar7100.dtsi')
-rw-r--r-- | target/linux/ath79/dts/ar7100.dtsi | 21 |
1 files changed, 16 insertions, 5 deletions
diff --git a/target/linux/ath79/dts/ar7100.dtsi b/target/linux/ath79/dts/ar7100.dtsi index 6402657841..5d5c97cd89 100644 --- a/target/linux/ath79/dts/ar7100.dtsi +++ b/target/linux/ath79/dts/ar7100.dtsi @@ -88,6 +88,14 @@ clock-names = "wdt"; }; + pci_intc: interrupt-controller@18060018 { + compatible = "qca,ar7100-misc-intc"; + reg = <0x18060018 0x4>; + interrupt-parent = <&cpuintc>; + interrupts = <2>; + interrupt-controller; + #interrupt-cells = <1>; + }; rst: reset-controller@18060024 { compatible = "qca,ar7100-reset"; @@ -105,14 +113,17 @@ reg-names = "cfg_base"; ranges = <0x2000000 0 0x10000000 0x10000000 0 0x07000000 /* pci memory */ 0x1000000 0 0x00000000 0x0000000 0 0x000001>; /* io space */ - interrupt-parent = <&cpuintc>; - interrupts = <2>; - interrupt-controller; + interrupt-parent = <&pci_intc>; + interrupts = <4>; + #interrupt-cells = <1>; - interrupt-map-mask = <0 0 0 1>; - interrupt-map = <0 0 0 0 &pcie0 0>; + interrupt-map-mask = <0xf800 0 0 0>; + interrupt-map = <0x8800 0 0 0 &pci_intc 0 + 0x9000 0 0 0 &pci_intc 1 + 0x9800 0 0 0 &pci_intc 2>; + status = "disabled"; }; }; |