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| author | Claudiu Beznea <claudiu.beznea@microchip.com> | 2022-02-04 15:57:50 +0200 |
|---|---|---|
| committer | Petr Štetiar <ynezz@true.cz> | 2022-02-24 19:05:28 +0100 |
| commit | e58cd453d58b20c6a6f34d3591640aa19aa14d25 (patch) | |
| tree | a4fef5f5d79575a7a60b516482ee114c1dbc932e /target/linux/at91/patches-5.10/227-ARM-dts-at91-sama7g5-add-chipid.patch | |
| parent | 3ed992a99630457f660761ce199e3d2a00f06168 (diff) | |
| download | upstream-e58cd453d58b20c6a6f34d3591640aa19aa14d25.tar.gz upstream-e58cd453d58b20c6a6f34d3591640aa19aa14d25.tar.bz2 upstream-e58cd453d58b20c6a6f34d3591640aa19aa14d25.zip | |
at91: add kernel support for sama7g5 soc
Add kernel support for SAMA7G5 by back-porting mainline kernel patches.
Among SAMA7G5 features could be remembered:
- ARM Cortex-A7
- double data rate multi-port dynamic RAM controller supporting DDR2,
DDR3, DDR3L, LPDDR2, LPDDR3 up to 533MHz
- peripherals for audio, video processing
- 1 gigabit + 1 megabit Ethernet controllers
- 6 CAN controllers
- trust zone support
- DVFS for CPU
- criptography IPs
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Diffstat (limited to 'target/linux/at91/patches-5.10/227-ARM-dts-at91-sama7g5-add-chipid.patch')
| -rw-r--r-- | target/linux/at91/patches-5.10/227-ARM-dts-at91-sama7g5-add-chipid.patch | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/target/linux/at91/patches-5.10/227-ARM-dts-at91-sama7g5-add-chipid.patch b/target/linux/at91/patches-5.10/227-ARM-dts-at91-sama7g5-add-chipid.patch new file mode 100644 index 0000000000..53530a537b --- /dev/null +++ b/target/linux/at91/patches-5.10/227-ARM-dts-at91-sama7g5-add-chipid.patch @@ -0,0 +1,33 @@ +From d216c1ecf978574216ece8140146c8dc0ea400e3 Mon Sep 17 00:00:00 2001 +From: Claudiu Beznea <claudiu.beznea@microchip.com> +Date: Wed, 8 Sep 2021 12:43:29 +0300 +Subject: [PATCH 227/247] ARM: dts: at91: sama7g5: add chipid + +Add chipid node for sama7g5. + +Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> +Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> +Link: https://lore.kernel.org/r/20210908094329.182477-1-claudiu.beznea@microchip.com +--- + arch/arm/boot/dts/sama7g5.dtsi | 5 +++++ + 1 file changed, 5 insertions(+) + +diff --git a/arch/arm/boot/dts/sama7g5.dtsi b/arch/arm/boot/dts/sama7g5.dtsi +index e50806cf7660..6c58c151c6d9 100644 +--- a/arch/arm/boot/dts/sama7g5.dtsi ++++ b/arch/arm/boot/dts/sama7g5.dtsi +@@ -159,6 +159,11 @@ ps_wdt: watchdog@e001d180 { + clocks = <&clk32k 0>; + }; + ++ chipid@e0020000 { ++ compatible = "microchip,sama7g5-chipid"; ++ reg = <0xe0020000 0x8>; ++ }; ++ + sdmmc0: mmc@e1204000 { + compatible = "microchip,sama7g5-sdhci", "microchip,sam9x60-sdhci"; + reg = <0xe1204000 0x4000>; +-- +2.32.0 + |