at91: add kernel support for sama7g5 soc

Add kernel support for SAMA7G5 by back-porting mainline kernel patches.
Among SAMA7G5 features could be remembered:
- ARM Cortex-A7
- double data rate multi-port dynamic RAM controller supporting DDR2,
  DDR3, DDR3L, LPDDR2, LPDDR3 up to 533MHz
- peripherals for audio, video processing
- 1 gigabit + 1 megabit Ethernet controllers
- 6 CAN controllers
- trust zone support
- DVFS for CPU
- criptography IPs

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>

1 files changed, 110 insertions, 0 deletions

diff --git a/target/linux/at91/patches-5.10/169-media-atmel-atmel-isc-add-HIS-to-register-offsets.patch b/target/linux/at91/patches-5.10/169-media-atmel-atmel-isc-add-HIS-to-register-offsets.patch
new file mode 100644
index 0000000000..d818ccdaa6
--- /dev/null
+++ b/target/linux/at91/patches-5.10/169-media-atmel-atmel-isc-add-HIS-to-register-offsets.patch
@@ -0,0 +1,110 @@
+From 8c19aa14b8303a0e7c4bae42f3f00f9a2a65b0db Mon Sep 17 00:00:00 2001
+From: Eugen Hristev <eugen.hristev@microchip.com>
+Date: Tue, 13 Apr 2021 12:57:11 +0200
+Subject: [PATCH 169/247] media: atmel: atmel-isc: add HIS to register offsets
+
+The HIS submodule is a part of the atmel-isc pipeline, and stands for
+Histogram. This module performs a color histogram that can be read and used
+by the main processor.
+Add his to the reg offsets struct.
+This will allow different products to have a different reg offset for this
+particular module.
+
+Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
+Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
+Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
+---
+ drivers/media/platform/atmel/atmel-isc-base.c    | 11 +++++++----
+ drivers/media/platform/atmel/atmel-isc-regs.h    |  2 ++
+ drivers/media/platform/atmel/atmel-isc.h         |  2 ++
+ drivers/media/platform/atmel/atmel-sama5d2-isc.c |  1 +
+ 4 files changed, 12 insertions(+), 4 deletions(-)
+
+diff --git a/drivers/media/platform/atmel/atmel-isc-base.c b/drivers/media/platform/atmel/atmel-isc-base.c
+index 25c90b821067..5c95aa45cf6c 100644
+--- a/drivers/media/platform/atmel/atmel-isc-base.c
++++ b/drivers/media/platform/atmel/atmel-isc-base.c
+@@ -686,12 +686,13 @@ static void isc_set_histogram(struct isc_device *isc, bool enable)
+ 	struct isc_ctrls *ctrls = &isc->ctrls;
+ 
+ 	if (enable) {
+-		regmap_write(regmap, ISC_HIS_CFG,
++		regmap_write(regmap, ISC_HIS_CFG + isc->offsets.his,
+ 			     ISC_HIS_CFG_MODE_GR |
+ 			     (isc->config.sd_format->cfa_baycfg
+ 					<< ISC_HIS_CFG_BAYSEL_SHIFT) |
+ 					ISC_HIS_CFG_RAR);
+-		regmap_write(regmap, ISC_HIS_CTRL, ISC_HIS_CTRL_EN);
++		regmap_write(regmap, ISC_HIS_CTRL + isc->offsets.his,
++			     ISC_HIS_CTRL_EN);
+ 		regmap_write(regmap, ISC_INTEN, ISC_INT_HISDONE);
+ 		ctrls->hist_id = ISC_HIS_CFG_MODE_GR;
+ 		isc_update_profile(isc);
+@@ -700,7 +701,8 @@ static void isc_set_histogram(struct isc_device *isc, bool enable)
+ 		ctrls->hist_stat = HIST_ENABLED;
+ 	} else {
+ 		regmap_write(regmap, ISC_INTDIS, ISC_INT_HISDONE);
+-		regmap_write(regmap, ISC_HIS_CTRL, ISC_HIS_CTRL_DIS);
++		regmap_write(regmap, ISC_HIS_CTRL + isc->offsets.his,
++			     ISC_HIS_CTRL_DIS);
+ 
+ 		ctrls->hist_stat = HIST_DISABLED;
+ 	}
+@@ -1836,7 +1838,8 @@ static void isc_awb_work(struct work_struct *w)
+ 			ctrls->awb = ISC_WB_NONE;
+ 		}
+ 	}
+-	regmap_write(regmap, ISC_HIS_CFG, hist_id | baysel | ISC_HIS_CFG_RAR);
++	regmap_write(regmap, ISC_HIS_CFG + isc->offsets.his,
++		     hist_id | baysel | ISC_HIS_CFG_RAR);
+ 	isc_update_profile(isc);
+ 	/* if awb has been disabled, we don't need to start another histogram */
+ 	if (ctrls->awb)
+diff --git a/drivers/media/platform/atmel/atmel-isc-regs.h b/drivers/media/platform/atmel/atmel-isc-regs.h
+index 2205484e04fc..0ab280ab59ec 100644
+--- a/drivers/media/platform/atmel/atmel-isc-regs.h
++++ b/drivers/media/platform/atmel/atmel-isc-regs.h
+@@ -224,6 +224,8 @@
+ #define ISC_RLP_CFG_MODE_YYCC_LIMITED   0xc
+ #define ISC_RLP_CFG_MODE_MASK           GENMASK(3, 0)
+ 
++/* Offset for HIS register specific to sama5d2 product */
++#define ISC_SAMA5D2_HIS_OFFSET	0
+ /* Histogram Control Register */
+ #define ISC_HIS_CTRL	0x000003d4
+ 
+diff --git a/drivers/media/platform/atmel/atmel-isc.h b/drivers/media/platform/atmel/atmel-isc.h
+index 4a5293c66f49..97ec4c58297e 100644
+--- a/drivers/media/platform/atmel/atmel-isc.h
++++ b/drivers/media/platform/atmel/atmel-isc.h
+@@ -150,6 +150,7 @@ struct isc_ctrls {
+  * @sub422:		Offset for the SUB422 register
+  * @sub420:		Offset for the SUB420 register
+  * @rlp:		Offset for the RLP register
++ * @his:		Offset for the HIS related registers
+  */
+ struct isc_reg_offsets {
+ 	u32 csc;
+@@ -157,6 +158,7 @@ struct isc_reg_offsets {
+ 	u32 sub422;
+ 	u32 sub420;
+ 	u32 rlp;
++	u32 his;
+ };
+ 
+ /*
+diff --git a/drivers/media/platform/atmel/atmel-sama5d2-isc.c b/drivers/media/platform/atmel/atmel-sama5d2-isc.c
+index b01b5b9f229b..db93cb76c08b 100644
+--- a/drivers/media/platform/atmel/atmel-sama5d2-isc.c
++++ b/drivers/media/platform/atmel/atmel-sama5d2-isc.c
+@@ -256,6 +256,7 @@ static int atmel_isc_probe(struct platform_device *pdev)
+ 	isc->offsets.sub422 = ISC_SAMA5D2_SUB422_OFFSET;
+ 	isc->offsets.sub420 = ISC_SAMA5D2_SUB420_OFFSET;
+ 	isc->offsets.rlp = ISC_SAMA5D2_RLP_OFFSET;
++	isc->offsets.his = ISC_SAMA5D2_HIS_OFFSET;
+ 
+ 	/* sama5d2-isc - 8 bits per beat */
+ 	isc->dcfg = ISC_DCFG_YMBSIZE_BEATS8 | ISC_DCFG_CMBSIZE_BEATS8;
+-- 
+2.32.0
+