diff options
| author | Claudiu Beznea <claudiu.beznea@microchip.com> | 2022-02-04 15:57:50 +0200 |
|---|---|---|
| committer | Petr Štetiar <ynezz@true.cz> | 2022-02-24 19:05:28 +0100 |
| commit | e58cd453d58b20c6a6f34d3591640aa19aa14d25 (patch) | |
| tree | a4fef5f5d79575a7a60b516482ee114c1dbc932e /target/linux/at91/patches-5.10/118-net-macb-unprepare-clocks-in-case-of-failure.patch | |
| parent | 3ed992a99630457f660761ce199e3d2a00f06168 (diff) | |
| download | upstream-e58cd453d58b20c6a6f34d3591640aa19aa14d25.tar.gz upstream-e58cd453d58b20c6a6f34d3591640aa19aa14d25.tar.bz2 upstream-e58cd453d58b20c6a6f34d3591640aa19aa14d25.zip | |
at91: add kernel support for sama7g5 soc
Add kernel support for SAMA7G5 by back-porting mainline kernel patches.
Among SAMA7G5 features could be remembered:
- ARM Cortex-A7
- double data rate multi-port dynamic RAM controller supporting DDR2,
DDR3, DDR3L, LPDDR2, LPDDR3 up to 533MHz
- peripherals for audio, video processing
- 1 gigabit + 1 megabit Ethernet controllers
- 6 CAN controllers
- trust zone support
- DVFS for CPU
- criptography IPs
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Diffstat (limited to 'target/linux/at91/patches-5.10/118-net-macb-unprepare-clocks-in-case-of-failure.patch')
| -rw-r--r-- | target/linux/at91/patches-5.10/118-net-macb-unprepare-clocks-in-case-of-failure.patch | 65 |
1 files changed, 65 insertions, 0 deletions
diff --git a/target/linux/at91/patches-5.10/118-net-macb-unprepare-clocks-in-case-of-failure.patch b/target/linux/at91/patches-5.10/118-net-macb-unprepare-clocks-in-case-of-failure.patch new file mode 100644 index 0000000000..a1581086bc --- /dev/null +++ b/target/linux/at91/patches-5.10/118-net-macb-unprepare-clocks-in-case-of-failure.patch @@ -0,0 +1,65 @@ +From 9692c07ee8bf8f68b74d553d861d092e33264781 Mon Sep 17 00:00:00 2001 +From: Claudiu Beznea <claudiu.beznea@microchip.com> +Date: Wed, 9 Dec 2020 15:03:35 +0200 +Subject: [PATCH 118/247] net: macb: unprepare clocks in case of failure + +Unprepare clocks in case of any failure in fu540_c000_clk_init(). + +Fixes: c218ad559020 ("macb: Add support for SiFive FU540-C000") +Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> +Signed-off-by: David S. Miller <davem@davemloft.net> +--- + drivers/net/ethernet/cadence/macb_main.c | 24 ++++++++++++++++++------ + 1 file changed, 18 insertions(+), 6 deletions(-) + +diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c +index eacf907a365d..c8d66f966a8b 100644 +--- a/drivers/net/ethernet/cadence/macb_main.c ++++ b/drivers/net/ethernet/cadence/macb_main.c +@@ -4307,8 +4307,10 @@ static int fu540_c000_clk_init(struct platform_device *pdev, struct clk **pclk, + return err; + + mgmt = devm_kzalloc(&pdev->dev, sizeof(*mgmt), GFP_KERNEL); +- if (!mgmt) +- return -ENOMEM; ++ if (!mgmt) { ++ err = -ENOMEM; ++ goto err_disable_clks; ++ } + + init.name = "sifive-gemgxl-mgmt"; + init.ops = &fu540_c000_ops; +@@ -4319,16 +4321,26 @@ static int fu540_c000_clk_init(struct platform_device *pdev, struct clk **pclk, + mgmt->hw.init = &init; + + *tx_clk = devm_clk_register(&pdev->dev, &mgmt->hw); +- if (IS_ERR(*tx_clk)) +- return PTR_ERR(*tx_clk); ++ if (IS_ERR(*tx_clk)) { ++ err = PTR_ERR(*tx_clk); ++ goto err_disable_clks; ++ } + + err = clk_prepare_enable(*tx_clk); +- if (err) ++ if (err) { + dev_err(&pdev->dev, "failed to enable tx_clk (%u)\n", err); +- else ++ *tx_clk = NULL; ++ goto err_disable_clks; ++ } else { + dev_info(&pdev->dev, "Registered clk switch '%s'\n", init.name); ++ } + + return 0; ++ ++err_disable_clks: ++ macb_clks_disable(*pclk, *hclk, *tx_clk, *rx_clk, *tsu_clk); ++ ++ return err; + } + + static int fu540_c000_init(struct platform_device *pdev) +-- +2.32.0 + |