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author | Claudiu Beznea <claudiu.beznea@microchip.com> | 2022-02-04 15:57:50 +0200 |
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committer | Petr Štetiar <ynezz@true.cz> | 2022-02-24 19:05:28 +0100 |
commit | e58cd453d58b20c6a6f34d3591640aa19aa14d25 (patch) | |
tree | a4fef5f5d79575a7a60b516482ee114c1dbc932e /target/linux/at91/patches-5.10/104-clk-at91-clk-master-add-5th-divisor-for-mck-master.patch | |
parent | 3ed992a99630457f660761ce199e3d2a00f06168 (diff) | |
download | upstream-e58cd453d58b20c6a6f34d3591640aa19aa14d25.tar.gz upstream-e58cd453d58b20c6a6f34d3591640aa19aa14d25.tar.bz2 upstream-e58cd453d58b20c6a6f34d3591640aa19aa14d25.zip |
at91: add kernel support for sama7g5 soc
Add kernel support for SAMA7G5 by back-porting mainline kernel patches.
Among SAMA7G5 features could be remembered:
- ARM Cortex-A7
- double data rate multi-port dynamic RAM controller supporting DDR2,
DDR3, DDR3L, LPDDR2, LPDDR3 up to 533MHz
- peripherals for audio, video processing
- 1 gigabit + 1 megabit Ethernet controllers
- 6 CAN controllers
- trust zone support
- DVFS for CPU
- criptography IPs
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Diffstat (limited to 'target/linux/at91/patches-5.10/104-clk-at91-clk-master-add-5th-divisor-for-mck-master.patch')
-rw-r--r-- | target/linux/at91/patches-5.10/104-clk-at91-clk-master-add-5th-divisor-for-mck-master.patch | 49 |
1 files changed, 49 insertions, 0 deletions
diff --git a/target/linux/at91/patches-5.10/104-clk-at91-clk-master-add-5th-divisor-for-mck-master.patch b/target/linux/at91/patches-5.10/104-clk-at91-clk-master-add-5th-divisor-for-mck-master.patch new file mode 100644 index 0000000000..f01d6f4b3a --- /dev/null +++ b/target/linux/at91/patches-5.10/104-clk-at91-clk-master-add-5th-divisor-for-mck-master.patch @@ -0,0 +1,49 @@ +From b2349278894bb381fa26a8717d3093d53f08fd36 Mon Sep 17 00:00:00 2001 +From: Eugen Hristev <eugen.hristev@microchip.com> +Date: Thu, 19 Nov 2020 17:43:10 +0200 +Subject: [PATCH 104/247] clk: at91: clk-master: add 5th divisor for mck master + +clk-master can have 5 divisors with a field width of 3 bits +on some products. + +Change the mask and number of divisors accordingly. + +Reported-by: Mihai Sain <mihai.sain@microchip.com> +Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com> +Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> +Link: https://lore.kernel.org/r/1605800597-16720-5-git-send-email-claudiu.beznea@microchip.com +Signed-off-by: Stephen Boyd <sboyd@kernel.org> +--- + drivers/clk/at91/clk-master.c | 2 +- + drivers/clk/at91/pmc.h | 2 +- + 2 files changed, 2 insertions(+), 2 deletions(-) + +diff --git a/drivers/clk/at91/clk-master.c b/drivers/clk/at91/clk-master.c +index bd0d8a69a2cf..aafd003b30cf 100644 +--- a/drivers/clk/at91/clk-master.c ++++ b/drivers/clk/at91/clk-master.c +@@ -15,7 +15,7 @@ + #define MASTER_PRES_MASK 0x7 + #define MASTER_PRES_MAX MASTER_PRES_MASK + #define MASTER_DIV_SHIFT 8 +-#define MASTER_DIV_MASK 0x3 ++#define MASTER_DIV_MASK 0x7 + + #define PMC_MCR 0x30 + #define PMC_MCR_ID_MSK GENMASK(3, 0) +diff --git a/drivers/clk/at91/pmc.h b/drivers/clk/at91/pmc.h +index 7b86affc6d7c..0a9364bde339 100644 +--- a/drivers/clk/at91/pmc.h ++++ b/drivers/clk/at91/pmc.h +@@ -48,7 +48,7 @@ extern const struct clk_master_layout at91sam9x5_master_layout; + + struct clk_master_characteristics { + struct clk_range output; +- u32 divisors[4]; ++ u32 divisors[5]; + u8 have_div3_pres; + }; + +-- +2.32.0 + |