at91: add kernel support for sama7g5 soc

Add kernel support for SAMA7G5 by back-porting mainline kernel patches.
Among SAMA7G5 features could be remembered:
- ARM Cortex-A7
- double data rate multi-port dynamic RAM controller supporting DDR2,
  DDR3, DDR3L, LPDDR2, LPDDR3 up to 533MHz
- peripherals for audio, video processing
- 1 gigabit + 1 megabit Ethernet controllers
- 6 CAN controllers
- trust zone support
- DVFS for CPU
- criptography IPs

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>

1 files changed, 72 insertions, 0 deletions

diff --git a/target/linux/at91/patches-5.10/102-dt-bindings-clock-at91-add-sama7g5-pll-defines.patch b/target/linux/at91/patches-5.10/102-dt-bindings-clock-at91-add-sama7g5-pll-defines.patch
new file mode 100644
index 0000000000..2f2e6641a4
--- /dev/null
+++ b/target/linux/at91/patches-5.10/102-dt-bindings-clock-at91-add-sama7g5-pll-defines.patch
@@ -0,0 +1,72 @@
+From 44bb7c72cdd830f54fe18e730205f892d9cbfe39 Mon Sep 17 00:00:00 2001
+From: Eugen Hristev <eugen.hristev@microchip.com>
+Date: Thu, 19 Nov 2020 17:43:08 +0200
+Subject: [PATCH 102/247] dt-bindings: clock: at91: add sama7g5 pll defines
+
+Add SAMA7G5 specific PLL defines to be referenced in a phandle as a
+PMC_TYPE_CORE clock.
+
+Suggested-by: Claudiu Beznea <claudiu.beznea@microchip.com>
+Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
+[claudiu.beznea@microchip.com: adapt comit message, adapt sama7g5.c]
+Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
+Link: https://lore.kernel.org/r/1605800597-16720-3-git-send-email-claudiu.beznea@microchip.com
+Signed-off-by: Stephen Boyd <sboyd@kernel.org>
+---
+ drivers/clk/at91/sama7g5.c       |  6 +++---
+ include/dt-bindings/clock/at91.h | 10 ++++++++++
+ 2 files changed, 13 insertions(+), 3 deletions(-)
+
+diff --git a/drivers/clk/at91/sama7g5.c b/drivers/clk/at91/sama7g5.c
+index a092a940baa4..7ef7963126b6 100644
+--- a/drivers/clk/at91/sama7g5.c
++++ b/drivers/clk/at91/sama7g5.c
+@@ -182,13 +182,13 @@ static const struct {
+ 		  .p = "audiopll_fracck",
+ 		  .l = &pll_layout_divpmc,
+ 		  .t = PLL_TYPE_DIV,
+-		  .eid = PMC_I2S0_MUX, },
++		  .eid = PMC_AUDIOPMCPLL, },
+ 
+ 		{ .n = "audiopll_diviock",
+ 		  .p = "audiopll_fracck",
+ 		  .l = &pll_layout_divio,
+ 		  .t = PLL_TYPE_DIV,
+-		  .eid = PMC_I2S1_MUX, },
++		  .eid = PMC_AUDIOIOPLL, },
+ 	},
+ 
+ 	[PLL_ID_ETH] = {
+@@ -835,7 +835,7 @@ static void __init sama7g5_pmc_setup(struct device_node *np)
+ 	if (IS_ERR(regmap))
+ 		return;
+ 
+-	sama7g5_pmc = pmc_data_allocate(PMC_I2S1_MUX + 1,
++	sama7g5_pmc = pmc_data_allocate(PMC_ETHPLL + 1,
+ 					nck(sama7g5_systemck),
+ 					nck(sama7g5_periphck),
+ 					nck(sama7g5_gck), 8);
+diff --git a/include/dt-bindings/clock/at91.h b/include/dt-bindings/clock/at91.h
+index eba17106608b..fab313f62e8f 100644
+--- a/include/dt-bindings/clock/at91.h
++++ b/include/dt-bindings/clock/at91.h
+@@ -25,6 +25,16 @@
+ #define PMC_PLLBCK		8
+ #define PMC_AUDIOPLLCK		9
+ 
++/* SAMA7G5 */
++#define PMC_CPUPLL		(PMC_MAIN + 1)
++#define PMC_SYSPLL		(PMC_MAIN + 2)
++#define PMC_DDRPLL		(PMC_MAIN + 3)
++#define PMC_IMGPLL		(PMC_MAIN + 4)
++#define PMC_BAUDPLL		(PMC_MAIN + 5)
++#define PMC_AUDIOPMCPLL		(PMC_MAIN + 6)
++#define PMC_AUDIOIOPLL		(PMC_MAIN + 7)
++#define PMC_ETHPLL		(PMC_MAIN + 8)
++
+ #ifndef AT91_PMC_MOSCS
+ #define AT91_PMC_MOSCS		0		/* MOSCS Flag */
+ #define AT91_PMC_LOCKA		1		/* PLLA Lock */
+-- 
+2.32.0
+