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| author | Claudio Mignanti <c.mignanti@gmail.com> | 2010-07-22 11:32:42 +0000 |
|---|---|---|
| committer | Claudio Mignanti <c.mignanti@gmail.com> | 2010-07-22 11:32:42 +0000 |
| commit | d4d6fefdf27845273be0c49b53539334817aa3c6 (patch) | |
| tree | 72eb9cc4523168d9acf478a36b0d319ed609f355 /target/linux/at91/patches-2.6.25/009-fdl-uartinit.patch | |
| parent | 4a829973275bc47a85e499b9f6f4872bacadb502 (diff) | |
| download | upstream-d4d6fefdf27845273be0c49b53539334817aa3c6.tar.gz upstream-d4d6fefdf27845273be0c49b53539334817aa3c6.tar.bz2 upstream-d4d6fefdf27845273be0c49b53539334817aa3c6.zip | |
general cleanup
SVN-Revision: 22352
Diffstat (limited to 'target/linux/at91/patches-2.6.25/009-fdl-uartinit.patch')
| -rw-r--r-- | target/linux/at91/patches-2.6.25/009-fdl-uartinit.patch | 34 |
1 files changed, 0 insertions, 34 deletions
diff --git a/target/linux/at91/patches-2.6.25/009-fdl-uartinit.patch b/target/linux/at91/patches-2.6.25/009-fdl-uartinit.patch deleted file mode 100644 index d30023186a..0000000000 --- a/target/linux/at91/patches-2.6.25/009-fdl-uartinit.patch +++ /dev/null @@ -1,34 +0,0 @@ ---- a/arch/arm/mach-at91/at91rm9200_devices.c -+++ b/arch/arm/mach-at91/at91rm9200_devices.c -@@ -1001,7 +1001,15 @@ static inline void configure_usart0_pins - * We need to drive the pin manually. Default is off (RTS is active low). - */ - at91_set_gpio_output(AT91_PIN_PA21, 1); -- } -+ } -+ if (pins & ATMEL_UART_DTR) -+ at91_set_gpio_output(AT91_PIN_PB6, 1); /* DTR0 */ -+ if (pins & ATMEL_UART_RI) -+ at91_set_gpio_output(AT91_PIN_PB7, 1); /* RI0 */ -+ if (pins & ATMEL_UART_DCD) { -+ at91_set_gpio_input(AT91_PIN_PA19, 1); /* DCD0 */ -+ at91_set_deglitch(AT91_PIN_PA19, 1); -+ } - } - - static struct resource uart1_resources[] = { -@@ -1139,6 +1147,14 @@ static inline void configure_usart3_pins - at91_set_B_periph(AT91_PIN_PB1, 0); /* CTS3 */ - if (pins & ATMEL_UART_RTS) - at91_set_B_periph(AT91_PIN_PB0, 0); /* RTS3 */ -+ if (pins & ATMEL_UART_DTR) -+ at91_set_gpio_output(AT91_PIN_PB29, 1); /* DTR0 */ -+ if (pins & ATMEL_UART_RI) -+ at91_set_gpio_output(AT91_PIN_PB2, 1); /* RI0 */ -+ if (pins & ATMEL_UART_DCD) { -+ at91_set_gpio_input(AT91_PIN_PA24, 1); /* DCD0 */ -+ at91_set_deglitch(AT91_PIN_PA24, 1); -+ } - } - - static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */ |