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author | Gabor Juhos <juhosg@openwrt.org> | 2013-04-26 16:55:40 +0000 |
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committer | Gabor Juhos <juhosg@openwrt.org> | 2013-04-26 16:55:40 +0000 |
commit | 988ae9cbf8efbb2050a34e61b5518d93f41cb606 (patch) | |
tree | 9882e6361a7022fdcbda24f4587b0a423a53397d /target/linux/at91/files/arch | |
parent | c63bb1a18e04c1b72f18bf0b77491933818d08d0 (diff) | |
download | upstream-988ae9cbf8efbb2050a34e61b5518d93f41cb606.tar.gz upstream-988ae9cbf8efbb2050a34e61b5518d93f41cb606.tar.bz2 upstream-988ae9cbf8efbb2050a34e61b5518d93f41cb606.zip |
at91: upgrade to kernel 3.8.7 and use devicetree
This upgrades the AT91 target to 3.8.7, and migrates to device tree.
This allows a single kernel to be built for most at91 variants which
simplifies things quite a bit. The immediate result is that all
subtargets are nuked, and any boards without dts files are no longer
supported, though the target now includes more boards than before. The
adc driver was also nuked as 3.8.7 includes a new one under the IIO
subsystem.
Signed-off-by: Adam Porter <porter.adam@gmail.com>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
SVN-Revision: 36452
Diffstat (limited to 'target/linux/at91/files/arch')
-rw-r--r-- | target/linux/at91/files/arch/arm/boot/dts/lmu5000.dts | 125 |
1 files changed, 125 insertions, 0 deletions
diff --git a/target/linux/at91/files/arch/arm/boot/dts/lmu5000.dts b/target/linux/at91/files/arch/arm/boot/dts/lmu5000.dts new file mode 100644 index 0000000000..671f452416 --- /dev/null +++ b/target/linux/at91/files/arch/arm/boot/dts/lmu5000.dts @@ -0,0 +1,125 @@ +/* + * lmu5000.dst - Device Tree file for CalAmp LMU5000 board + * + * Copyright (C) 2013 Adam Porter <porter.adam@gmail.com> + * + * Licensed under GPLv2. + */ +/dts-v1/; +/include/ "at91sam9g20.dtsi" + +/ { + model = "CalAmp LMU5000"; + compatible = "calamp,lmu5000", "atmel,at91sam9g20", "atmel,at91sam9"; + + chosen { + bootargs = "mem=64M console=ttyS0,115200 rootfstype=jffs2"; + }; + + memory { + reg = <0x20000000 0x4000000>; + }; + + clocks { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + main_clock: clock@0 { + compatible = "atmel,osc", "fixed-clock"; + clock-frequency = <18432000>; + }; + }; + + ahb { + apb { + pinctrl@fffff400 { + board { + pinctrl_pck0_as_mck: pck0_as_mck { + atmel,pins = + <2 1 0x2 0x0>; /* PC1 periph B */ + }; + + }; + }; + + dbgu: serial@fffff200 { + status = "okay"; + }; + + usart0: serial@fffb0000 { + pinctrl-0 = + <&pinctrl_usart0 + &pinctrl_usart0_rts + &pinctrl_usart0_cts + &pinctrl_usart0_dtr_dsr + &pinctrl_usart0_dcd + &pinctrl_usart0_ri>; + status = "okay"; + }; + + usart2: serial@fffb8000 { + status = "okay"; + }; + + uart0: serial@fffd4000 { + status = "okay"; + }; + + uart1: serial@fffd8000 { + status = "okay"; + }; + + macb0: ethernet@fffc4000 { + phy-mode = "mii"; + status = "okay"; + }; + + usb1: gadget@fffa4000 { + atmel,vbus-gpio = <&pioC 5 0>; + status = "okay"; + }; + + ssc0: ssc@fffbc000 { + status = "okay"; + pinctrl-0 = <&pinctrl_ssc0_tx>; + }; + + watchdog@fffffd40 { + status = "okay"; + }; + }; + + nand0: nand@40000000 { + nand-bus-width = <8>; + nand-ecc-mode = "soft"; + nand-on-flash-bbt; + status = "okay"; + + kernel@0 { + label = "kernel"; + reg = <0x0 0x400000>; + }; + + rootfs@400000 { + label = "rootfs"; + reg = <0x400000 0x3C00000>; + }; + + user1@4000000 { + label = "user1"; + reg = <0x4000000 0x2000000>; + }; + + user2@6000000 { + label = "user2"; + reg = <0x6000000 0x2000000>; + }; + }; + + usb0: ohci@00500000 { + num-ports = <2>; + status = "okay"; + }; + }; +}; |