diff options
| author | Hamish Guthrie <hcg@openwrt.org> | 2007-05-28 13:00:05 +0000 |
|---|---|---|
| committer | Hamish Guthrie <hcg@openwrt.org> | 2007-05-28 13:00:05 +0000 |
| commit | 858fe59dcd434bbc49579ae2b00277c8dbb44eaf (patch) | |
| tree | 1e6156654b1f91587821483c58f0c5fb1ecaf15c /target/linux/at91-2.6/patches | |
| parent | d02c762dd1772996920081d60a1097ffe50b7d68 (diff) | |
| download | upstream-858fe59dcd434bbc49579ae2b00277c8dbb44eaf.tar.gz upstream-858fe59dcd434bbc49579ae2b00277c8dbb44eaf.tar.bz2 upstream-858fe59dcd434bbc49579ae2b00277c8dbb44eaf.zip | |
First patches to get to .21 kernel
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@7365 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/at91-2.6/patches')
| -rw-r--r-- | target/linux/at91-2.6/patches/000-at91patches.patch | 19690 | ||||
| -rw-r--r-- | target/linux/at91-2.6/patches/001-vlink-machine.patch | 90 | ||||
| -rw-r--r-- | target/linux/at91-2.6/patches/002-led-driver.patch | 163 |
3 files changed, 5616 insertions, 14327 deletions
diff --git a/target/linux/at91-2.6/patches/000-at91patches.patch b/target/linux/at91-2.6/patches/000-at91patches.patch index a5581d2178..93fa2cf03c 100644 --- a/target/linux/at91-2.6/patches/000-at91patches.patch +++ b/target/linux/at91-2.6/patches/000-at91patches.patch @@ -1,2249 +1,112 @@ -diff -urN -x CVS linux-2.6.19-final/arch/arm/Kconfig linux-2.6.19/arch/arm/Kconfig ---- linux-2.6.19-final/arch/arm/Kconfig Mon Dec 4 16:39:27 2006 -+++ linux-2.6.19/arch/arm/Kconfig Thu Nov 30 09:08:02 2006 -@@ -583,7 +591,7 @@ - ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \ - ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \ - ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \ -- ARCH_AT91RM9200 || MACH_TRIZEPS4 -+ ARCH_AT91 || MACH_TRIZEPS4 - help - If you say Y here, the LEDs on your machine will be used - to provide useful information about your current system status. -diff -urN -x CVS linux-2.6.19-final/arch/arm/configs/at91rm9200dk_defconfig linux-2.6.19/arch/arm/configs/at91rm9200dk_defconfig ---- linux-2.6.19-final/arch/arm/configs/at91rm9200dk_defconfig Mon Dec 4 16:39:28 2006 -+++ linux-2.6.19/arch/arm/configs/at91rm9200dk_defconfig Mon Nov 20 10:46:02 2006 -@@ -357,9 +357,9 @@ - # - # CONFIG_MTD_COMPLEX_MAPPINGS is not set - CONFIG_MTD_PHYSMAP=y --CONFIG_MTD_PHYSMAP_START=0x10000000 --CONFIG_MTD_PHYSMAP_LEN=0x200000 --CONFIG_MTD_PHYSMAP_BANKWIDTH=2 -+CONFIG_MTD_PHYSMAP_START=0 -+CONFIG_MTD_PHYSMAP_LEN=0 -+CONFIG_MTD_PHYSMAP_BANKWIDTH=0 - # CONFIG_MTD_ARM_INTEGRATOR is not set - # CONFIG_MTD_IMPA7 is not set - # CONFIG_MTD_PLATRAM is not set -@@ -585,7 +585,9 @@ - # CONFIG_USBPCWATCHDOG is not set - # CONFIG_NVRAM is not set - # CONFIG_RTC is not set --CONFIG_AT91_RTC=y -+CONFIG_RTC_LIB=y -+CONFIG_RTC_CLASS=y -+CONFIG_RTC_DRV_AT91RM9200=y - # CONFIG_DTLK is not set - # CONFIG_R3964 is not set - -diff -urN -x CVS linux-2.6.19-final/arch/arm/configs/at91rm9200ek_defconfig linux-2.6.19/arch/arm/configs/at91rm9200ek_defconfig ---- linux-2.6.19-final/arch/arm/configs/at91rm9200ek_defconfig Mon Dec 4 16:39:28 2006 -+++ linux-2.6.19/arch/arm/configs/at91rm9200ek_defconfig Mon Nov 20 10:45:49 2006 -@@ -348,9 +348,9 @@ - # - # CONFIG_MTD_COMPLEX_MAPPINGS is not set - CONFIG_MTD_PHYSMAP=y --CONFIG_MTD_PHYSMAP_START=0x10000000 --CONFIG_MTD_PHYSMAP_LEN=0x800000 --CONFIG_MTD_PHYSMAP_BANKWIDTH=2 -+CONFIG_MTD_PHYSMAP_START=0 -+CONFIG_MTD_PHYSMAP_LEN=0 -+CONFIG_MTD_PHYSMAP_BANKWIDTH=0 - # CONFIG_MTD_ARM_INTEGRATOR is not set - # CONFIG_MTD_IMPA7 is not set - # CONFIG_MTD_PLATRAM is not set -@@ -566,7 +566,9 @@ - # CONFIG_USBPCWATCHDOG is not set - # CONFIG_NVRAM is not set - # CONFIG_RTC is not set --CONFIG_AT91_RTC=y -+CONFIG_RTC_LIB=y -+CONFIG_RTC_CLASS=y -+CONFIG_RTC_DRV_AT91RM9200=y - # CONFIG_DTLK is not set - # CONFIG_R3964 is not set - -diff -urN -x CVS linux-2.6.19-final/arch/arm/configs/at91sam9260ek_defconfig linux-2.6.19/arch/arm/configs/at91sam9260ek_defconfig ---- linux-2.6.19-final/arch/arm/configs/at91sam9260ek_defconfig Thu Jan 1 02:00:00 1970 -+++ linux-2.6.19/arch/arm/configs/at91sam9260ek_defconfig Mon Nov 20 10:51:08 2006 -@@ -0,0 +1,950 @@ -+# -+# Automatically generated make config: don't edit -+# Linux kernel version: 2.6.19-rc6 -+# Fri Nov 17 18:42:21 2006 -+# -+CONFIG_ARM=y -+# CONFIG_GENERIC_TIME is not set -+CONFIG_MMU=y -+CONFIG_GENERIC_HARDIRQS=y -+CONFIG_TRACE_IRQFLAGS_SUPPORT=y -+CONFIG_HARDIRQS_SW_RESEND=y -+CONFIG_GENERIC_IRQ_PROBE=y -+CONFIG_RWSEM_GENERIC_SPINLOCK=y -+CONFIG_GENERIC_HWEIGHT=y -+CONFIG_GENERIC_CALIBRATE_DELAY=y -+CONFIG_VECTORS_BASE=0xffff0000 -+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" -+ -+# -+# Code maturity level options -+# -+CONFIG_EXPERIMENTAL=y -+CONFIG_BROKEN_ON_SMP=y -+CONFIG_INIT_ENV_ARG_LIMIT=32 -+ -+# -+# General setup -+# -+CONFIG_LOCALVERSION="" -+# CONFIG_LOCALVERSION_AUTO is not set -+# CONFIG_SWAP is not set -+CONFIG_SYSVIPC=y -+# CONFIG_IPC_NS is not set -+# CONFIG_POSIX_MQUEUE is not set -+# CONFIG_BSD_PROCESS_ACCT is not set -+# CONFIG_TASKSTATS is not set -+# CONFIG_UTS_NS is not set -+# CONFIG_AUDIT is not set -+# CONFIG_IKCONFIG is not set -+# CONFIG_RELAY is not set -+CONFIG_INITRAMFS_SOURCE="" -+CONFIG_CC_OPTIMIZE_FOR_SIZE=y -+CONFIG_SYSCTL=y -+# CONFIG_EMBEDDED is not set -+CONFIG_UID16=y -+CONFIG_SYSCTL_SYSCALL=y -+CONFIG_KALLSYMS=y -+# CONFIG_KALLSYMS_ALL is not set -+# CONFIG_KALLSYMS_EXTRA_PASS is not set -+CONFIG_HOTPLUG=y -+CONFIG_PRINTK=y -+CONFIG_BUG=y -+CONFIG_ELF_CORE=y -+CONFIG_BASE_FULL=y -+CONFIG_FUTEX=y -+CONFIG_EPOLL=y -+CONFIG_SHMEM=y -+CONFIG_SLAB=y -+CONFIG_VM_EVENT_COUNTERS=y -+CONFIG_RT_MUTEXES=y -+# CONFIG_TINY_SHMEM is not set -+CONFIG_BASE_SMALL=0 -+# CONFIG_SLOB is not set -+ -+# -+# Loadable module support -+# -+CONFIG_MODULES=y -+CONFIG_MODULE_UNLOAD=y -+# CONFIG_MODULE_FORCE_UNLOAD is not set -+# CONFIG_MODVERSIONS is not set -+# CONFIG_MODULE_SRCVERSION_ALL is not set -+CONFIG_KMOD=y -+ -+# -+# Block layer -+# -+CONFIG_BLOCK=y -+# CONFIG_BLK_DEV_IO_TRACE is not set -+ -+# -+# IO Schedulers -+# -+CONFIG_IOSCHED_NOOP=y -+CONFIG_IOSCHED_AS=y -+# CONFIG_IOSCHED_DEADLINE is not set -+# CONFIG_IOSCHED_CFQ is not set -+CONFIG_DEFAULT_AS=y -+# CONFIG_DEFAULT_DEADLINE is not set -+# CONFIG_DEFAULT_CFQ is not set -+# CONFIG_DEFAULT_NOOP is not set -+CONFIG_DEFAULT_IOSCHED="anticipatory" -+ -+# -+# System Type -+# -+# CONFIG_ARCH_AAEC2000 is not set -+# CONFIG_ARCH_INTEGRATOR is not set -+# CONFIG_ARCH_REALVIEW is not set -+# CONFIG_ARCH_VERSATILE is not set -+CONFIG_ARCH_AT91=y -+# CONFIG_ARCH_CLPS7500 is not set -+# CONFIG_ARCH_CLPS711X is not set -+# CONFIG_ARCH_CO285 is not set -+# CONFIG_ARCH_EBSA110 is not set -+# CONFIG_ARCH_EP93XX is not set -+# CONFIG_ARCH_FOOTBRIDGE is not set -+# CONFIG_ARCH_NETX is not set -+# CONFIG_ARCH_H720X is not set -+# CONFIG_ARCH_IMX is not set -+# CONFIG_ARCH_IOP32X is not set -+# CONFIG_ARCH_IOP33X is not set -+# CONFIG_ARCH_IXP4XX is not set -+# CONFIG_ARCH_IXP2000 is not set -+# CONFIG_ARCH_IXP23XX is not set -+# CONFIG_ARCH_L7200 is not set -+# CONFIG_ARCH_PNX4008 is not set -+# CONFIG_ARCH_PXA is not set -+# CONFIG_ARCH_RPC is not set -+# CONFIG_ARCH_SA1100 is not set -+# CONFIG_ARCH_S3C2410 is not set -+# CONFIG_ARCH_SHARK is not set -+# CONFIG_ARCH_LH7A40X is not set -+# CONFIG_ARCH_OMAP is not set -+ -+# -+# Atmel AT91 System-on-Chip -+# -+# CONFIG_ARCH_AT91RM9200 is not set -+CONFIG_ARCH_AT91SAM9260=y -+# CONFIG_ARCH_AT91SAM9261 is not set -+ -+# -+# AT91SAM9260 Board Type -+# -+CONFIG_MACH_AT91SAM9260EK=y -+ -+# -+# AT91 Board Options -+# -+# CONFIG_MTD_NAND_AT91_BUSWIDTH_16 is not set -+ -+# -+# AT91 Feature Selections -+# -+# CONFIG_AT91_PROGRAMMABLE_CLOCKS is not set -+ -+# -+# Processor Type -+# -+CONFIG_CPU_32=y -+CONFIG_CPU_ARM926T=y -+CONFIG_CPU_32v5=y -+CONFIG_CPU_ABRT_EV5TJ=y -+CONFIG_CPU_CACHE_VIVT=y -+CONFIG_CPU_COPY_V4WB=y -+CONFIG_CPU_TLB_V4WBI=y -+CONFIG_CPU_CP15=y -+CONFIG_CPU_CP15_MMU=y -+ -+# -+# Processor Features -+# -+# CONFIG_ARM_THUMB is not set -+# CONFIG_CPU_ICACHE_DISABLE is not set -+# CONFIG_CPU_DCACHE_DISABLE is not set -+# CONFIG_CPU_DCACHE_WRITETHROUGH is not set -+# CONFIG_CPU_CACHE_ROUND_ROBIN is not set -+ -+# -+# Bus support -+# -+ -+# -+# PCCARD (PCMCIA/CardBus) support -+# -+# CONFIG_PCCARD is not set -+ -+# -+# Kernel Features -+# -+# CONFIG_PREEMPT is not set -+# CONFIG_NO_IDLE_HZ is not set -+CONFIG_HZ=100 -+# CONFIG_AEABI is not set -+# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set -+CONFIG_SELECT_MEMORY_MODEL=y -+CONFIG_FLATMEM_MANUAL=y -+# CONFIG_DISCONTIGMEM_MANUAL is not set -+# CONFIG_SPARSEMEM_MANUAL is not set -+CONFIG_FLATMEM=y -+CONFIG_FLAT_NODE_MEM_MAP=y -+# CONFIG_SPARSEMEM_STATIC is not set -+CONFIG_SPLIT_PTLOCK_CPUS=4096 -+# CONFIG_RESOURCES_64BIT is not set -+# CONFIG_LEDS is not set -+CONFIG_ALIGNMENT_TRAP=y -+ -+# -+# Boot options -+# -+CONFIG_ZBOOT_ROM_TEXT=0x0 -+CONFIG_ZBOOT_ROM_BSS=0x0 -+CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw" -+# CONFIG_XIP_KERNEL is not set -+ -+# -+# Floating point emulation -+# -+ -+# -+# At least one emulation must be selected -+# -+CONFIG_FPE_NWFPE=y -+# CONFIG_FPE_NWFPE_XP is not set -+# CONFIG_FPE_FASTFPE is not set -+# CONFIG_VFP is not set -+ -+# -+# Userspace binary formats -+# -+CONFIG_BINFMT_ELF=y -+# CONFIG_BINFMT_AOUT is not set -+# CONFIG_BINFMT_MISC is not set -+# CONFIG_ARTHUR is not set -+ -+# -+# Power management options -+# -+# CONFIG_PM is not set -+# CONFIG_APM is not set -+ -+# -+# Networking -+# -+CONFIG_NET=y -+ -+# -+# Networking options -+# -+# CONFIG_NETDEBUG is not set -+CONFIG_PACKET=y -+# CONFIG_PACKET_MMAP is not set -+CONFIG_UNIX=y -+CONFIG_XFRM=y -+# CONFIG_XFRM_USER is not set -+# CONFIG_XFRM_SUB_POLICY is not set -+# CONFIG_NET_KEY is not set -+CONFIG_INET=y -+# CONFIG_IP_MULTICAST is not set -+# CONFIG_IP_ADVANCED_ROUTER is not set -+CONFIG_IP_FIB_HASH=y -+CONFIG_IP_PNP=y -+# CONFIG_IP_PNP_DHCP is not set -+CONFIG_IP_PNP_BOOTP=y -+# CONFIG_IP_PNP_RARP is not set -+# CONFIG_NET_IPIP is not set -+# CONFIG_NET_IPGRE is not set -+# CONFIG_ARPD is not set -+# CONFIG_SYN_COOKIES is not set -+# CONFIG_INET_AH is not set -+# CONFIG_INET_ESP is not set -+# CONFIG_INET_IPCOMP is not set -+# CONFIG_INET_XFRM_TUNNEL is not set -+# CONFIG_INET_TUNNEL is not set -+CONFIG_INET_XFRM_MODE_TRANSPORT=y -+CONFIG_INET_XFRM_MODE_TUNNEL=y -+CONFIG_INET_XFRM_MODE_BEET=y -+CONFIG_INET_DIAG=y -+CONFIG_INET_TCP_DIAG=y -+# CONFIG_TCP_CONG_ADVANCED is not set -+CONFIG_TCP_CONG_CUBIC=y -+CONFIG_DEFAULT_TCP_CONG="cubic" -+# CONFIG_IPV6 is not set -+# CONFIG_INET6_XFRM_TUNNEL is not set -+# CONFIG_INET6_TUNNEL is not set -+# CONFIG_NETWORK_SECMARK is not set -+# CONFIG_NETFILTER is not set -+ -+# -+# DCCP Configuration (EXPERIMENTAL) -+# -+# CONFIG_IP_DCCP is not set -+ -+# -+# SCTP Configuration (EXPERIMENTAL) -+# -+# CONFIG_IP_SCTP is not set -+ -+# -+# TIPC Configuration (EXPERIMENTAL) -+# -+# CONFIG_TIPC is not set -+# CONFIG_ATM is not set -+# CONFIG_BRIDGE is not set -+# CONFIG_VLAN_8021Q is not set -+# CONFIG_DECNET is not set -+# CONFIG_LLC2 is not set -+# CONFIG_IPX is not set -+# CONFIG_ATALK is not set -+# CONFIG_X25 is not set -+# CONFIG_LAPB is not set -+# CONFIG_ECONET is not set -+# CONFIG_WAN_ROUTER is not set -+ -+# -+# QoS and/or fair queueing -+# -+# CONFIG_NET_SCHED is not set -+ -+# -+# Network testing -+# -+# CONFIG_NET_PKTGEN is not set -+# CONFIG_HAMRADIO is not set -+# CONFIG_IRDA is not set -+# CONFIG_BT is not set -+# CONFIG_IEEE80211 is not set -+ -+# -+# Device Drivers -+# -+ -+# -+# Generic Driver Options -+# -+CONFIG_STANDALONE=y -+CONFIG_PREVENT_FIRMWARE_BUILD=y -+# CONFIG_FW_LOADER is not set -+# CONFIG_DEBUG_DRIVER is not set -+# CONFIG_SYS_HYPERVISOR is not set -+ -+# -+# Connector - unified userspace <-> kernelspace linker -+# -+# CONFIG_CONNECTOR is not set -+ -+# -+# Memory Technology Devices (MTD) -+# -+# CONFIG_MTD is not set -+ -+# -+# Parallel port support -+# -+# CONFIG_PARPORT is not set -+ -+# -+# Plug and Play support -+# -+ -+# -+# Block devices -+# -+# CONFIG_BLK_DEV_COW_COMMON is not set -+# CONFIG_BLK_DEV_LOOP is not set -+# CONFIG_BLK_DEV_NBD is not set -+# CONFIG_BLK_DEV_UB is not set -+CONFIG_BLK_DEV_RAM=y -+CONFIG_BLK_DEV_RAM_COUNT=16 -+CONFIG_BLK_DEV_RAM_SIZE=8192 -+CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 -+CONFIG_BLK_DEV_INITRD=y -+# CONFIG_CDROM_PKTCDVD is not set -+# CONFIG_ATA_OVER_ETH is not set -+ -+# -+# SCSI device support -+# -+# CONFIG_RAID_ATTRS is not set -+CONFIG_SCSI=y -+# CONFIG_SCSI_NETLINK is not set -+CONFIG_SCSI_PROC_FS=y -+ -+# -+# SCSI support type (disk, tape, CD-ROM) -+# -+CONFIG_BLK_DEV_SD=y -+# CONFIG_CHR_DEV_ST is not set -+# CONFIG_CHR_DEV_OSST is not set -+# CONFIG_BLK_DEV_SR is not set -+# CONFIG_CHR_DEV_SG is not set -+# CONFIG_CHR_DEV_SCH is not set -+ -+# -+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs -+# -+CONFIG_SCSI_MULTI_LUN=y -+# CONFIG_SCSI_CONSTANTS is not set -+# CONFIG_SCSI_LOGGING is not set -+ -+# -+# SCSI Transports -+# -+# CONFIG_SCSI_SPI_ATTRS is not set -+# CONFIG_SCSI_FC_ATTRS is not set -+# CONFIG_SCSI_ISCSI_ATTRS is not set -+# CONFIG_SCSI_SAS_ATTRS is not set -+# CONFIG_SCSI_SAS_LIBSAS is not set -+ -+# -+# SCSI low-level drivers -+# -+# CONFIG_ISCSI_TCP is not set -+# CONFIG_SCSI_DEBUG is not set -+ -+# -+# Multi-device support (RAID and LVM) -+# -+# CONFIG_MD is not set -+ -+# -+# Fusion MPT device support -+# -+# CONFIG_FUSION is not set -+ -+# -+# IEEE 1394 (FireWire) support -+# -+ -+# -+# I2O device support -+# -+ -+# -+# Network device support -+# -+# CONFIG_NETDEVICES is not set -+# CONFIG_NETPOLL is not set -+# CONFIG_NET_POLL_CONTROLLER is not set -+ -+# -+# ISDN subsystem -+# -+# CONFIG_ISDN is not set -+ -+# -+# Input device support -+# -+CONFIG_INPUT=y -+# CONFIG_INPUT_FF_MEMLESS is not set -+ -+# -+# Userland interfaces -+# -+CONFIG_INPUT_MOUSEDEV=y -+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set -+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 -+# CONFIG_INPUT_JOYDEV is not set -+# CONFIG_INPUT_TSDEV is not set -+# CONFIG_INPUT_EVDEV is not set -+# CONFIG_INPUT_EVBUG is not set -+ -+# -+# Input Device Drivers -+# -+# CONFIG_INPUT_KEYBOARD is not set -+# CONFIG_INPUT_MOUSE is not set -+# CONFIG_INPUT_JOYSTICK is not set -+# CONFIG_INPUT_TOUCHSCREEN is not set -+# CONFIG_INPUT_MISC is not set -+ -+# -+# Hardware I/O ports -+# -+# CONFIG_SERIO is not set -+# CONFIG_GAMEPORT is not set -+ -+# -+# Character devices -+# -+CONFIG_VT=y -+CONFIG_VT_CONSOLE=y -+CONFIG_HW_CONSOLE=y -+# CONFIG_VT_HW_CONSOLE_BINDING is not set -+# CONFIG_SERIAL_NONSTANDARD is not set -+ -+# -+# Serial drivers -+# -+# CONFIG_SERIAL_8250 is not set -+ -+# -+# Non-8250 serial port support -+# -+CONFIG_SERIAL_ATMEL=y -+CONFIG_SERIAL_ATMEL_CONSOLE=y -+# CONFIG_SERIAL_ATMEL_TTYAT is not set -+CONFIG_SERIAL_CORE=y -+CONFIG_SERIAL_CORE_CONSOLE=y -+CONFIG_UNIX98_PTYS=y -+CONFIG_LEGACY_PTYS=y -+CONFIG_LEGACY_PTY_COUNT=256 -+ -+# -+# IPMI -+# -+# CONFIG_IPMI_HANDLER is not set -+ -+# -+# Watchdog Cards -+# -+CONFIG_WATCHDOG=y -+CONFIG_WATCHDOG_NOWAYOUT=y -+ -+# -+# Watchdog Device Drivers -+# -+# CONFIG_SOFT_WATCHDOG is not set -+ -+# -+# USB-based Watchdog Cards -+# -+# CONFIG_USBPCWATCHDOG is not set -+CONFIG_HW_RANDOM=y -+# CONFIG_NVRAM is not set -+# CONFIG_DTLK is not set -+# CONFIG_R3964 is not set -+ -+# -+# Ftape, the floppy tape device driver -+# -+# CONFIG_RAW_DRIVER is not set -+ -+# -+# TPM devices -+# -+# CONFIG_TCG_TPM is not set -+ -+# -+# I2C support -+# -+# CONFIG_I2C is not set -+ -+# -+# SPI support -+# -+# CONFIG_SPI is not set -+# CONFIG_SPI_MASTER is not set -+ -+# -+# Dallas's 1-wire bus -+# -+# CONFIG_W1 is not set -+ -+# -+# Hardware Monitoring support -+# -+# CONFIG_HWMON is not set -+# CONFIG_HWMON_VID is not set -+ -+# -+# Misc devices -+# -+# CONFIG_TIFM_CORE is not set -+ -+# -+# LED devices -+# -+# CONFIG_NEW_LEDS is not set -+ -+# -+# LED drivers -+# -+ -+# -+# LED Triggers -+# -+ -+# -+# Multimedia devices -+# -+# CONFIG_VIDEO_DEV is not set -+ -+# -+# Digital Video Broadcasting Devices -+# -+# CONFIG_DVB is not set -+# CONFIG_USB_DABUSB is not set -+ -+# -+# Graphics support -+# -+# CONFIG_FIRMWARE_EDID is not set -+# CONFIG_FB is not set -+ -+# -+# Console display driver support -+# -+# CONFIG_VGA_CONSOLE is not set -+CONFIG_DUMMY_CONSOLE=y -+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set -+ -+# -+# Sound -+# -+# CONFIG_SOUND is not set -+ -+# -+# USB support -+# -+CONFIG_USB_ARCH_HAS_HCD=y -+CONFIG_USB_ARCH_HAS_OHCI=y -+# CONFIG_USB_ARCH_HAS_EHCI is not set -+CONFIG_USB=y -+# CONFIG_USB_DEBUG is not set -+ -+# -+# Miscellaneous USB options -+# -+CONFIG_USB_DEVICEFS=y -+# CONFIG_USB_BANDWIDTH is not set -+# CONFIG_USB_DYNAMIC_MINORS is not set -+# CONFIG_USB_OTG is not set -+ -+# -+# USB Host Controller Drivers -+# -+# CONFIG_USB_ISP116X_HCD is not set -+CONFIG_USB_OHCI_HCD=y -+# CONFIG_USB_OHCI_BIG_ENDIAN is not set -+CONFIG_USB_OHCI_LITTLE_ENDIAN=y -+# CONFIG_USB_SL811_HCD is not set -+ -+# -+# USB Device Class drivers -+# -+# CONFIG_USB_ACM is not set -+# CONFIG_USB_PRINTER is not set -+ -+# -+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' -+# -+ -+# -+# may also be needed; see USB_STORAGE Help for more information -+# -+CONFIG_USB_STORAGE=y -+CONFIG_USB_STORAGE_DEBUG=y -+# CONFIG_USB_STORAGE_DATAFAB is not set -+# CONFIG_USB_STORAGE_FREECOM is not set -+# CONFIG_USB_STORAGE_DPCM is not set -+# CONFIG_USB_STORAGE_USBAT is not set -+# CONFIG_USB_STORAGE_SDDR09 is not set -+# CONFIG_USB_STORAGE_SDDR55 is not set -+# CONFIG_USB_STORAGE_JUMPSHOT is not set -+# CONFIG_USB_STORAGE_ALAUDA is not set -+# CONFIG_USB_STORAGE_KARMA is not set -+# CONFIG_USB_LIBUSUAL is not set -+ -+# -+# USB Input Devices -+# -+# CONFIG_USB_HID is not set -+ -+# -+# USB HID Boot Protocol drivers -+# -+# CONFIG_USB_KBD is not set -+# CONFIG_USB_MOUSE is not set -+# CONFIG_USB_AIPTEK is not set -+# CONFIG_USB_WACOM is not set -+# CONFIG_USB_ACECAD is not set -+# CONFIG_USB_KBTAB is not set -+# CONFIG_USB_POWERMATE is not set -+# CONFIG_USB_TOUCHSCREEN is not set -+# CONFIG_USB_YEALINK is not set -+# CONFIG_USB_XPAD is not set -+# CONFIG_USB_ATI_REMOTE is not set -+# CONFIG_USB_ATI_REMOTE2 is not set -+# CONFIG_USB_KEYSPAN_REMOTE is not set -+# CONFIG_USB_APPLETOUCH is not set -+ -+# -+# USB Imaging devices -+# -+# CONFIG_USB_MDC800 is not set -+# CONFIG_USB_MICROTEK is not set -+ -+# -+# USB Network Adapters -+# -+# CONFIG_USB_CATC is not set -+# CONFIG_USB_KAWETH is not set -+# CONFIG_USB_PEGASUS is not set -+# CONFIG_USB_RTL8150 is not set -+# CONFIG_USB_USBNET_MII is not set -+# CONFIG_USB_USBNET is not set -+CONFIG_USB_MON=y -+ -+# -+# USB port drivers -+# -+ -+# -+# USB Serial Converter support -+# -+# CONFIG_USB_SERIAL is not set -+ -+# -+# USB Miscellaneous drivers -+# -+# CONFIG_USB_EMI62 is not set -+# CONFIG_USB_EMI26 is not set -+# CONFIG_USB_ADUTUX is not set -+# CONFIG_USB_AUERSWALD is not set -+# CONFIG_USB_RIO500 is not set -+# CONFIG_USB_LEGOTOWER is not set -+# CONFIG_USB_LCD is not set -+# CONFIG_USB_LED is not set -+# CONFIG_USB_CYPRESS_CY7C63 is not set -+# CONFIG_USB_CYTHERM is not set -+# CONFIG_USB_PHIDGET is not set -+# CONFIG_USB_IDMOUSE is not set -+# CONFIG_USB_FTDI_ELAN is not set -+# CONFIG_USB_APPLEDISPLAY is not set -+# CONFIG_USB_LD is not set -+# CONFIG_USB_TRANCEVIBRATOR is not set -+# CONFIG_USB_TEST is not set -+ -+# -+# USB DSL modem support -+# -+ -+# -+# USB Gadget Support -+# -+CONFIG_USB_GADGET=y -+# CONFIG_USB_GADGET_DEBUG_FILES is not set -+CONFIG_USB_GADGET_SELECTED=y -+# CONFIG_USB_GADGET_NET2280 is not set -+# CONFIG_USB_GADGET_PXA2XX is not set -+# CONFIG_USB_GADGET_GOKU is not set -+# CONFIG_USB_GADGET_LH7A40X is not set -+# CONFIG_USB_GADGET_OMAP is not set -+CONFIG_USB_GADGET_AT91=y -+CONFIG_USB_AT91=y -+# CONFIG_USB_GADGET_DUMMY_HCD is not set -+# CONFIG_USB_GADGET_DUALSPEED is not set -+CONFIG_USB_ZERO=m -+# CONFIG_USB_ETH is not set -+CONFIG_USB_GADGETFS=m -+CONFIG_USB_FILE_STORAGE=m -+# CONFIG_USB_FILE_STORAGE_TEST is not set -+CONFIG_USB_G_SERIAL=m -+# CONFIG_USB_MIDI_GADGET is not set -+ -+# -+# MMC/SD Card support -+# -+# CONFIG_MMC is not set -+ -+# -+# Real Time Clock -+# -+CONFIG_RTC_LIB=y -+# CONFIG_RTC_CLASS is not set -+ -+# -+# File systems -+# -+CONFIG_EXT2_FS=y -+# CONFIG_EXT2_FS_XATTR is not set -+# CONFIG_EXT2_FS_XIP is not set -+# CONFIG_EXT3_FS is not set -+# CONFIG_EXT4DEV_FS is not set -+# CONFIG_REISERFS_FS is not set -+# CONFIG_JFS_FS is not set -+# CONFIG_FS_POSIX_ACL is not set -+# CONFIG_XFS_FS is not set -+# CONFIG_GFS2_FS is not set -+# CONFIG_OCFS2_FS is not set -+# CONFIG_MINIX_FS is not set -+# CONFIG_ROMFS_FS is not set -+CONFIG_INOTIFY=y -+CONFIG_INOTIFY_USER=y -+# CONFIG_QUOTA is not set -+CONFIG_DNOTIFY=y -+# CONFIG_AUTOFS_FS is not set -+# CONFIG_AUTOFS4_FS is not set -+# CONFIG_FUSE_FS is not set -+ -+# -+# CD-ROM/DVD Filesystems -+# -+# CONFIG_ISO9660_FS is not set -+# CONFIG_UDF_FS is not set -+ -+# -+# DOS/FAT/NT Filesystems -+# -+CONFIG_FAT_FS=y -+# CONFIG_MSDOS_FS is not set -+CONFIG_VFAT_FS=y -+CONFIG_FAT_DEFAULT_CODEPAGE=437 -+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" -+# CONFIG_NTFS_FS is not set -+ -+# -+# Pseudo filesystems -+# -+CONFIG_PROC_FS=y -+CONFIG_PROC_SYSCTL=y -+CONFIG_SYSFS=y -+CONFIG_TMPFS=y -+# CONFIG_TMPFS_POSIX_ACL is not set -+# CONFIG_HUGETLB_PAGE is not set -+CONFIG_RAMFS=y -+# CONFIG_CONFIGFS_FS is not set -+ -+# -+# Miscellaneous filesystems -+# -+# CONFIG_ADFS_FS is not set -+# CONFIG_AFFS_FS is not set -+# CONFIG_HFS_FS is not set -+# CONFIG_HFSPLUS_FS is not set -+# CONFIG_BEFS_FS is not set -+# CONFIG_BFS_FS is not set -+# CONFIG_EFS_FS is not set -+CONFIG_CRAMFS=y -+# CONFIG_VXFS_FS is not set -+# CONFIG_HPFS_FS is not set -+# CONFIG_QNX4FS_FS is not set -+# CONFIG_SYSV_FS is not set -+# CONFIG_UFS_FS is not set -+ -+# -+# Network File Systems -+# -+# CONFIG_NFS_FS is not set -+# CONFIG_NFSD is not set -+# CONFIG_SMB_FS is not set -+# CONFIG_CIFS is not set -+# CONFIG_NCP_FS is not set -+# CONFIG_CODA_FS is not set -+# CONFIG_AFS_FS is not set -+# CONFIG_9P_FS is not set -+ -+# -+# Partition Types -+# -+# CONFIG_PARTITION_ADVANCED is not set -+CONFIG_MSDOS_PARTITION=y -+ -+# -+# Native Language Support -+# -+CONFIG_NLS=y -+CONFIG_NLS_DEFAULT="iso8859-1" -+CONFIG_NLS_CODEPAGE_437=y -+# CONFIG_NLS_CODEPAGE_737 is not set -+# CONFIG_NLS_CODEPAGE_775 is not set -+CONFIG_NLS_CODEPAGE_850=y -+# CONFIG_NLS_CODEPAGE_852 is not set -+# CONFIG_NLS_CODEPAGE_855 is not set -+# CONFIG_NLS_CODEPAGE_857 is not set -+# CONFIG_NLS_CODEPAGE_860 is not set -+# CONFIG_NLS_CODEPAGE_861 is not set -+# CONFIG_NLS_CODEPAGE_862 is not set -+# CONFIG_NLS_CODEPAGE_863 is not set -+# CONFIG_NLS_CODEPAGE_864 is not set -+# CONFIG_NLS_CODEPAGE_865 is not set -+# CONFIG_NLS_CODEPAGE_866 is not set -+# CONFIG_NLS_CODEPAGE_869 is not set -+# CONFIG_NLS_CODEPAGE_936 is not set -+# CONFIG_NLS_CODEPAGE_950 is not set -+# CONFIG_NLS_CODEPAGE_932 is not set -+# CONFIG_NLS_CODEPAGE_949 is not set -+# CONFIG_NLS_CODEPAGE_874 is not set -+# CONFIG_NLS_ISO8859_8 is not set -+# CONFIG_NLS_CODEPAGE_1250 is not set -+# CONFIG_NLS_CODEPAGE_1251 is not set -+# CONFIG_NLS_ASCII is not set -+CONFIG_NLS_ISO8859_1=y -+# CONFIG_NLS_ISO8859_2 is not set -+# CONFIG_NLS_ISO8859_3 is not set -+# CONFIG_NLS_ISO8859_4 is not set -+# CONFIG_NLS_ISO8859_5 is not set -+# CONFIG_NLS_ISO8859_6 is not set -+# CONFIG_NLS_ISO8859_7 is not set -+# CONFIG_NLS_ISO8859_9 is not set -+# CONFIG_NLS_ISO8859_13 is not set -+# CONFIG_NLS_ISO8859_14 is not set -+# CONFIG_NLS_ISO8859_15 is not set -+# CONFIG_NLS_KOI8_R is not set -+# CONFIG_NLS_KOI8_U is not set -+# CONFIG_NLS_UTF8 is not set -+ -+# -+# Profiling support -+# -+# CONFIG_PROFILING is not set -+ -+# -+# Kernel hacking -+# -+# CONFIG_PRINTK_TIME is not set -+CONFIG_ENABLE_MUST_CHECK=y -+# CONFIG_MAGIC_SYSRQ is not set -+# CONFIG_UNUSED_SYMBOLS is not set -+CONFIG_DEBUG_KERNEL=y -+CONFIG_LOG_BUF_SHIFT=14 -+CONFIG_DETECT_SOFTLOCKUP=y -+# CONFIG_SCHEDSTATS is not set -+# CONFIG_DEBUG_SLAB is not set -+# CONFIG_DEBUG_RT_MUTEXES is not set -+# CONFIG_RT_MUTEX_TESTER is not set -+# CONFIG_DEBUG_SPINLOCK is not set -+# CONFIG_DEBUG_MUTEXES is not set -+# CONFIG_DEBUG_RWSEMS is not set -+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set -+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set -+# CONFIG_DEBUG_KOBJECT is not set -+CONFIG_DEBUG_BUGVERBOSE=y -+# CONFIG_DEBUG_INFO is not set -+# CONFIG_DEBUG_FS is not set -+# CONFIG_DEBUG_VM is not set -+# CONFIG_DEBUG_LIST is not set -+CONFIG_FRAME_POINTER=y -+CONFIG_FORCED_INLINING=y -+# CONFIG_HEADERS_CHECK is not set -+# CONFIG_RCU_TORTURE_TEST is not set -+CONFIG_DEBUG_USER=y -+# CONFIG_DEBUG_WAITQ is not set -+# CONFIG_DEBUG_ERRORS is not set -+CONFIG_DEBUG_LL=y -+# CONFIG_DEBUG_ICEDCC is not set -+ -+# -+# Security options -+# -+# CONFIG_KEYS is not set -+# CONFIG_SECURITY is not set -+ -+# -+# Cryptographic options -+# -+# CONFIG_CRYPTO is not set -+ -+# -+# Library routines -+# -+# CONFIG_CRC_CCITT is not set -+# CONFIG_CRC16 is not set -+CONFIG_CRC32=y -+# CONFIG_LIBCRC32C is not set -+CONFIG_ZLIB_INFLATE=y -+CONFIG_PLIST=y -diff -urN -x CVS linux-2.6.19-final/arch/arm/configs/at91sam9261ek_defconfig linux-2.6.19/arch/arm/configs/at91sam9261ek_defconfig ---- linux-2.6.19-final/arch/arm/configs/at91sam9261ek_defconfig Thu Jan 1 02:00:00 1970 -+++ linux-2.6.19/arch/arm/configs/at91sam9261ek_defconfig Mon Nov 20 10:51:08 2006 -@@ -0,0 +1,1106 @@ -+# -+# Automatically generated make config: don't edit -+# Linux kernel version: 2.6.19-rc6 -+# Fri Nov 17 18:00:38 2006 -+# -+CONFIG_ARM=y -+# CONFIG_GENERIC_TIME is not set -+CONFIG_MMU=y -+CONFIG_GENERIC_HARDIRQS=y -+CONFIG_TRACE_IRQFLAGS_SUPPORT=y -+CONFIG_HARDIRQS_SW_RESEND=y -+CONFIG_GENERIC_IRQ_PROBE=y -+CONFIG_RWSEM_GENERIC_SPINLOCK=y -+CONFIG_GENERIC_HWEIGHT=y -+CONFIG_GENERIC_CALIBRATE_DELAY=y -+CONFIG_VECTORS_BASE=0xffff0000 -+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" -+ -+# -+# Code maturity level options -+# -+CONFIG_EXPERIMENTAL=y -+CONFIG_BROKEN_ON_SMP=y -+CONFIG_INIT_ENV_ARG_LIMIT=32 -+ -+# -+# General setup -+# -+CONFIG_LOCALVERSION="" -+# CONFIG_LOCALVERSION_AUTO is not set -+# CONFIG_SWAP is not set -+CONFIG_SYSVIPC=y -+# CONFIG_IPC_NS is not set -+# CONFIG_POSIX_MQUEUE is not set -+# CONFIG_BSD_PROCESS_ACCT is not set -+# CONFIG_TASKSTATS is not set -+# CONFIG_UTS_NS is not set -+# CONFIG_AUDIT is not set -+# CONFIG_IKCONFIG is not set -+# CONFIG_RELAY is not set -+CONFIG_INITRAMFS_SOURCE="" -+CONFIG_CC_OPTIMIZE_FOR_SIZE=y -+CONFIG_SYSCTL=y -+# CONFIG_EMBEDDED is not set -+CONFIG_UID16=y -+CONFIG_SYSCTL_SYSCALL=y -+CONFIG_KALLSYMS=y -+# CONFIG_KALLSYMS_ALL is not set -+# CONFIG_KALLSYMS_EXTRA_PASS is not set -+CONFIG_HOTPLUG=y -+CONFIG_PRINTK=y -+CONFIG_BUG=y -+CONFIG_ELF_CORE=y -+CONFIG_BASE_FULL=y -+CONFIG_FUTEX=y -+CONFIG_EPOLL=y -+CONFIG_SHMEM=y -+CONFIG_SLAB=y -+CONFIG_VM_EVENT_COUNTERS=y -+CONFIG_RT_MUTEXES=y -+# CONFIG_TINY_SHMEM is not set -+CONFIG_BASE_SMALL=0 -+# CONFIG_SLOB is not set -+ -+# -+# Loadable module support -+# -+CONFIG_MODULES=y -+CONFIG_MODULE_UNLOAD=y -+# CONFIG_MODULE_FORCE_UNLOAD is not set -+# CONFIG_MODVERSIONS is not set -+# CONFIG_MODULE_SRCVERSION_ALL is not set -+CONFIG_KMOD=y -+ -+# -+# Block layer -+# -+CONFIG_BLOCK=y -+# CONFIG_BLK_DEV_IO_TRACE is not set -+ -+# -+# IO Schedulers -+# -+CONFIG_IOSCHED_NOOP=y -+CONFIG_IOSCHED_AS=y -+# CONFIG_IOSCHED_DEADLINE is not set -+# CONFIG_IOSCHED_CFQ is not set -+CONFIG_DEFAULT_AS=y -+# CONFIG_DEFAULT_DEADLINE is not set -+# CONFIG_DEFAULT_CFQ is not set -+# CONFIG_DEFAULT_NOOP is not set -+CONFIG_DEFAULT_IOSCHED="anticipatory" -+ -+# -+# System Type -+# -+# CONFIG_ARCH_AAEC2000 is not set -+# CONFIG_ARCH_INTEGRATOR is not set -+# CONFIG_ARCH_REALVIEW is not set -+# CONFIG_ARCH_VERSATILE is not set -+CONFIG_ARCH_AT91=y -+# CONFIG_ARCH_CLPS7500 is not set -+# CONFIG_ARCH_CLPS711X is not set -+# CONFIG_ARCH_CO285 is not set -+# CONFIG_ARCH_EBSA110 is not set -+# CONFIG_ARCH_EP93XX is not set -+# CONFIG_ARCH_FOOTBRIDGE is not set -+# CONFIG_ARCH_NETX is not set -+# CONFIG_ARCH_H720X is not set -+# CONFIG_ARCH_IMX is not set -+# CONFIG_ARCH_IOP32X is not set -+# CONFIG_ARCH_IOP33X is not set -+# CONFIG_ARCH_IXP4XX is not set -+# CONFIG_ARCH_IXP2000 is not set -+# CONFIG_ARCH_IXP23XX is not set -+# CONFIG_ARCH_L7200 is not set -+# CONFIG_ARCH_PNX4008 is not set -+# CONFIG_ARCH_PXA is not set -+# CONFIG_ARCH_RPC is not set -+# CONFIG_ARCH_SA1100 is not set -+# CONFIG_ARCH_S3C2410 is not set -+# CONFIG_ARCH_SHARK is not set -+# CONFIG_ARCH_LH7A40X is not set -+# CONFIG_ARCH_OMAP is not set -+ -+# -+# Atmel AT91 System-on-Chip -+# -+# CONFIG_ARCH_AT91RM9200 is not set -+# CONFIG_ARCH_AT91SAM9260 is not set -+CONFIG_ARCH_AT91SAM9261=y -+ -+# -+# AT91SAM9261 Board Type -+# -+CONFIG_MACH_AT91SAM9261EK=y -+ -+# -+# AT91 Board Options -+# -+# CONFIG_MTD_NAND_AT91_BUSWIDTH_16 is not set -+ -+# -+# AT91 Feature Selections -+# -+# CONFIG_AT91_PROGRAMMABLE_CLOCKS is not set -+ -+# -+# Processor Type -+# -+CONFIG_CPU_32=y -+CONFIG_CPU_ARM926T=y -+CONFIG_CPU_32v5=y -+CONFIG_CPU_ABRT_EV5TJ=y -+CONFIG_CPU_CACHE_VIVT=y -+CONFIG_CPU_COPY_V4WB=y -+CONFIG_CPU_TLB_V4WBI=y -+CONFIG_CPU_CP15=y -+CONFIG_CPU_CP15_MMU=y -+ -+# -+# Processor Features -+# -+# CONFIG_ARM_THUMB is not set -+# CONFIG_CPU_ICACHE_DISABLE is not set -+# CONFIG_CPU_DCACHE_DISABLE is not set -+# CONFIG_CPU_DCACHE_WRITETHROUGH is not set -+# CONFIG_CPU_CACHE_ROUND_ROBIN is not set -+ -+# -+# Bus support -+# -+ -+# -+# PCCARD (PCMCIA/CardBus) support -+# -+# CONFIG_PCCARD is not set -+ -+# -+# Kernel Features -+# -+# CONFIG_PREEMPT is not set -+# CONFIG_NO_IDLE_HZ is not set -+CONFIG_HZ=100 -+# CONFIG_AEABI is not set -+# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set -+CONFIG_SELECT_MEMORY_MODEL=y -+CONFIG_FLATMEM_MANUAL=y -+# CONFIG_DISCONTIGMEM_MANUAL is not set -+# CONFIG_SPARSEMEM_MANUAL is not set -+CONFIG_FLATMEM=y -+CONFIG_FLAT_NODE_MEM_MAP=y -+# CONFIG_SPARSEMEM_STATIC is not set -+CONFIG_SPLIT_PTLOCK_CPUS=4096 -+# CONFIG_RESOURCES_64BIT is not set -+# CONFIG_LEDS is not set -+CONFIG_ALIGNMENT_TRAP=y -+ -+# -+# Boot options -+# -+CONFIG_ZBOOT_ROM_TEXT=0x0 -+CONFIG_ZBOOT_ROM_BSS=0x0 -+CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw" -+# CONFIG_XIP_KERNEL is not set -+ -+# -+# Floating point emulation -+# -+ -+# -+# At least one emulation must be selected -+# -+CONFIG_FPE_NWFPE=y -+# CONFIG_FPE_NWFPE_XP is not set -+# CONFIG_FPE_FASTFPE is not set -+# CONFIG_VFP is not set -+ -+# -+# Userspace binary formats -+# -+CONFIG_BINFMT_ELF=y -+# CONFIG_BINFMT_AOUT is not set -+# CONFIG_BINFMT_MISC is not set -+# CONFIG_ARTHUR is not set -+ -+# -+# Power management options -+# -+# CONFIG_PM is not set -+# CONFIG_APM is not set -+ -+# -+# Networking -+# -+CONFIG_NET=y -+ -+# -+# Networking options -+# -+# CONFIG_NETDEBUG is not set -+CONFIG_PACKET=y -+# CONFIG_PACKET_MMAP is not set -+CONFIG_UNIX=y -+CONFIG_XFRM=y -+# CONFIG_XFRM_USER is not set -+# CONFIG_XFRM_SUB_POLICY is not set -+# CONFIG_NET_KEY is not set -+CONFIG_INET=y -+# CONFIG_IP_MULTICAST is not set -+# CONFIG_IP_ADVANCED_ROUTER is not set -+CONFIG_IP_FIB_HASH=y -+CONFIG_IP_PNP=y -+# CONFIG_IP_PNP_DHCP is not set -+CONFIG_IP_PNP_BOOTP=y -+# CONFIG_IP_PNP_RARP is not set -+# CONFIG_NET_IPIP is not set -+# CONFIG_NET_IPGRE is not set -+# CONFIG_ARPD is not set -+# CONFIG_SYN_COOKIES is not set -+# CONFIG_INET_AH is not set -+# CONFIG_INET_ESP is not set -+# CONFIG_INET_IPCOMP is not set -+# CONFIG_INET_XFRM_TUNNEL is not set -+# CONFIG_INET_TUNNEL is not set -+CONFIG_INET_XFRM_MODE_TRANSPORT=y -+CONFIG_INET_XFRM_MODE_TUNNEL=y -+CONFIG_INET_XFRM_MODE_BEET=y -+CONFIG_INET_DIAG=y -+CONFIG_INET_TCP_DIAG=y -+# CONFIG_TCP_CONG_ADVANCED is not set -+CONFIG_TCP_CONG_CUBIC=y -+CONFIG_DEFAULT_TCP_CONG="cubic" -+# CONFIG_IPV6 is not set -+# CONFIG_INET6_XFRM_TUNNEL is not set -+# CONFIG_INET6_TUNNEL is not set -+# CONFIG_NETWORK_SECMARK is not set -+# CONFIG_NETFILTER is not set -+ -+# -+# DCCP Configuration (EXPERIMENTAL) -+# -+# CONFIG_IP_DCCP is not set -+ -+# -+# SCTP Configuration (EXPERIMENTAL) -+# -+# CONFIG_IP_SCTP is not set -+ -+# -+# TIPC Configuration (EXPERIMENTAL) -+# -+# CONFIG_TIPC is not set -+# CONFIG_ATM is not set -+# CONFIG_BRIDGE is not set -+# CONFIG_VLAN_8021Q is not set -+# CONFIG_DECNET is not set -+# CONFIG_LLC2 is not set -+# CONFIG_IPX is not set -+# CONFIG_ATALK is not set -+# CONFIG_X25 is not set -+# CONFIG_LAPB is not set -+# CONFIG_ECONET is not set -+# CONFIG_WAN_ROUTER is not set -+ -+# -+# QoS and/or fair queueing -+# -+# CONFIG_NET_SCHED is not set -+ -+# -+# Network testing -+# -+# CONFIG_NET_PKTGEN is not set -+# CONFIG_HAMRADIO is not set -+# CONFIG_IRDA is not set -+# CONFIG_BT is not set -+# CONFIG_IEEE80211 is not set -+ -+# -+# Device Drivers -+# -+ -+# -+# Generic Driver Options -+# -+CONFIG_STANDALONE=y -+CONFIG_PREVENT_FIRMWARE_BUILD=y -+# CONFIG_FW_LOADER is not set -+# CONFIG_DEBUG_DRIVER is not set -+# CONFIG_SYS_HYPERVISOR is not set -+ -+# -+# Connector - unified userspace <-> kernelspace linker -+# -+# CONFIG_CONNECTOR is not set -+ -+# -+# Memory Technology Devices (MTD) -+# -+CONFIG_MTD=y -+# CONFIG_MTD_DEBUG is not set -+# CONFIG_MTD_CONCAT is not set -+CONFIG_MTD_PARTITIONS=y -+# CONFIG_MTD_REDBOOT_PARTS is not set -+CONFIG_MTD_CMDLINE_PARTS=y -+# CONFIG_MTD_AFS_PARTS is not set -+ -+# -+# User Modules And Translation Layers -+# -+# CONFIG_MTD_CHAR is not set -+CONFIG_MTD_BLOCK=y -+# CONFIG_FTL is not set -+# CONFIG_NFTL is not set -+# CONFIG_INFTL is not set -+# CONFIG_RFD_FTL is not set -+# CONFIG_SSFDC is not set -+ -+# -+# RAM/ROM/Flash chip drivers -+# -+# CONFIG_MTD_CFI is not set -+# CONFIG_MTD_JEDECPROBE is not set -+CONFIG_MTD_MAP_BANK_WIDTH_1=y -+CONFIG_MTD_MAP_BANK_WIDTH_2=y -+CONFIG_MTD_MAP_BANK_WIDTH_4=y -+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set -+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set -+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set -+CONFIG_MTD_CFI_I1=y -+CONFIG_MTD_CFI_I2=y -+# CONFIG_MTD_CFI_I4 is not set -+# CONFIG_MTD_CFI_I8 is not set -+# CONFIG_MTD_RAM is not set -+# CONFIG_MTD_ROM is not set -+# CONFIG_MTD_ABSENT is not set -+# CONFIG_MTD_OBSOLETE_CHIPS is not set -+ -+# -+# Mapping drivers for chip access -+# -+# CONFIG_MTD_COMPLEX_MAPPINGS is not set -+# CONFIG_MTD_PLATRAM is not set -+ -+# -+# Self-contained MTD device drivers -+# -+# CONFIG_MTD_SLRAM is not set -+# CONFIG_MTD_PHRAM is not set -+# CONFIG_MTD_MTDRAM is not set -+# CONFIG_MTD_BLOCK2MTD is not set -+ -+# -+# Disk-On-Chip Device Drivers -+# -+# CONFIG_MTD_DOC2000 is not set -+# CONFIG_MTD_DOC2001 is not set -+# CONFIG_MTD_DOC2001PLUS is not set -+ -+# -+# NAND Flash Device Drivers -+# -+CONFIG_MTD_NAND=y -+# CONFIG_MTD_NAND_VERIFY_WRITE is not set -+# CONFIG_MTD_NAND_ECC_SMC is not set -+CONFIG_MTD_NAND_IDS=y -+# CONFIG_MTD_NAND_DISKONCHIP is not set -+CONFIG_MTD_NAND_AT91=y -+# CONFIG_MTD_NAND_NANDSIM is not set -+ -+# -+# OneNAND Flash Device Drivers -+# -+# CONFIG_MTD_ONENAND is not set -+ -+# -+# Parallel port support -+# -+# CONFIG_PARPORT is not set -+ -+# -+# Plug and Play support -+# -+ -+# -+# Block devices -+# -+# CONFIG_BLK_DEV_COW_COMMON is not set -+# CONFIG_BLK_DEV_LOOP is not set -+# CONFIG_BLK_DEV_NBD is not set -+# CONFIG_BLK_DEV_UB is not set -+CONFIG_BLK_DEV_RAM=y -+CONFIG_BLK_DEV_RAM_COUNT=16 -+CONFIG_BLK_DEV_RAM_SIZE=8192 -+CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 -+CONFIG_BLK_DEV_INITRD=y -+# CONFIG_CDROM_PKTCDVD is not set -+# CONFIG_ATA_OVER_ETH is not set -+ -+# -+# SCSI device support -+# -+# CONFIG_RAID_ATTRS is not set -+CONFIG_SCSI=y -+# CONFIG_SCSI_NETLINK is not set -+CONFIG_SCSI_PROC_FS=y -+ -+# -+# SCSI support type (disk, tape, CD-ROM) -+# -+CONFIG_BLK_DEV_SD=y -+# CONFIG_CHR_DEV_ST is not set -+# CONFIG_CHR_DEV_OSST is not set -+# CONFIG_BLK_DEV_SR is not set -+# CONFIG_CHR_DEV_SG is not set -+# CONFIG_CHR_DEV_SCH is not set -+ -+# -+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs -+# -+CONFIG_SCSI_MULTI_LUN=y -+# CONFIG_SCSI_CONSTANTS is not set -+# CONFIG_SCSI_LOGGING is not set -+ -+# -+# SCSI Transports -+# -+# CONFIG_SCSI_SPI_ATTRS is not set -+# CONFIG_SCSI_FC_ATTRS is not set -+# CONFIG_SCSI_ISCSI_ATTRS is not set -+# CONFIG_SCSI_SAS_ATTRS is not set -+# CONFIG_SCSI_SAS_LIBSAS is not set -+ -+# -+# SCSI low-level drivers -+# -+# CONFIG_ISCSI_TCP is not set -+# CONFIG_SCSI_DEBUG is not set -+ -+# -+# Multi-device support (RAID and LVM) -+# -+# CONFIG_MD is not set -+ -+# -+# Fusion MPT device support -+# -+# CONFIG_FUSION is not set -+ -+# -+# IEEE 1394 (FireWire) support -+# -+ -+# -+# I2O device support -+# -+ -+# -+# Network device support -+# -+CONFIG_NETDEVICES=y -+# CONFIG_DUMMY is not set -+# CONFIG_BONDING is not set -+# CONFIG_EQUALIZER is not set -+# CONFIG_TUN is not set -+ -+# -+# PHY device support -+# -+# CONFIG_PHYLIB is not set -+ -+# -+# Ethernet (10 or 100Mbit) -+# -+CONFIG_NET_ETHERNET=y -+CONFIG_MII=y -+# CONFIG_SMC91X is not set -+CONFIG_DM9000=y -+ -+# -+# Ethernet (1000 Mbit) -+# -+ -+# -+# Ethernet (10000 Mbit) -+# -+ -+# -+# Token Ring devices -+# -+ -+# -+# Wireless LAN (non-hamradio) -+# -+# CONFIG_NET_RADIO is not set -+ -+# -+# Wan interfaces -+# -+# CONFIG_WAN is not set -+# CONFIG_PPP is not set -+# CONFIG_SLIP is not set -+# CONFIG_SHAPER is not set -+# CONFIG_NETCONSOLE is not set -+# CONFIG_NETPOLL is not set -+# CONFIG_NET_POLL_CONTROLLER is not set -+ -+# -+# ISDN subsystem -+# -+# CONFIG_ISDN is not set -+ -+# -+# Input device support -+# -+CONFIG_INPUT=y -+# CONFIG_INPUT_FF_MEMLESS is not set -+ -+# -+# Userland interfaces -+# -+CONFIG_INPUT_MOUSEDEV=y -+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set -+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 -+# CONFIG_INPUT_JOYDEV is not set -+# CONFIG_INPUT_TSDEV is not set -+# CONFIG_INPUT_EVDEV is not set -+# CONFIG_INPUT_EVBUG is not set -+ -+# -+# Input Device Drivers -+# -+# CONFIG_INPUT_KEYBOARD is not set -+# CONFIG_INPUT_MOUSE is not set -+# CONFIG_INPUT_JOYSTICK is not set -+# CONFIG_INPUT_TOUCHSCREEN is not set -+# CONFIG_INPUT_MISC is not set -+ -+# -+# Hardware I/O ports -+# -+# CONFIG_SERIO is not set -+# CONFIG_GAMEPORT is not set -+ -+# -+# Character devices -+# -+CONFIG_VT=y -+CONFIG_VT_CONSOLE=y -+CONFIG_HW_CONSOLE=y -+# CONFIG_VT_HW_CONSOLE_BINDING is not set -+# CONFIG_SERIAL_NONSTANDARD is not set -+ -+# -+# Serial drivers -+# -+# CONFIG_SERIAL_8250 is not set -+ -+# -+# Non-8250 serial port support -+# -+CONFIG_SERIAL_ATMEL=y -+CONFIG_SERIAL_ATMEL_CONSOLE=y -+# CONFIG_SERIAL_ATMEL_TTYAT is not set -+CONFIG_SERIAL_CORE=y -+CONFIG_SERIAL_CORE_CONSOLE=y -+CONFIG_UNIX98_PTYS=y -+CONFIG_LEGACY_PTYS=y -+CONFIG_LEGACY_PTY_COUNT=256 -+ -+# -+# IPMI -+# -+# CONFIG_IPMI_HANDLER is not set -+ -+# -+# Watchdog Cards -+# -+CONFIG_WATCHDOG=y -+CONFIG_WATCHDOG_NOWAYOUT=y -+ -+# -+# Watchdog Device Drivers -+# -+# CONFIG_SOFT_WATCHDOG is not set -+ -+# -+# USB-based Watchdog Cards -+# -+# CONFIG_USBPCWATCHDOG is not set -+CONFIG_HW_RANDOM=y -+# CONFIG_NVRAM is not set -+# CONFIG_DTLK is not set -+# CONFIG_R3964 is not set -+ -+# -+# Ftape, the floppy tape device driver -+# -+# CONFIG_RAW_DRIVER is not set -+ -+# -+# TPM devices -+# -+# CONFIG_TCG_TPM is not set -+ -+# -+# I2C support -+# -+CONFIG_I2C=y -+CONFIG_I2C_CHARDEV=y -+ -+# -+# I2C Algorithms -+# -+# CONFIG_I2C_ALGOBIT is not set -+# CONFIG_I2C_ALGOPCF is not set -+# CONFIG_I2C_ALGOPCA is not set -+ -+# -+# I2C Hardware Bus support -+# -+CONFIG_I2C_AT91=y -+# CONFIG_I2C_OCORES is not set -+# CONFIG_I2C_PARPORT_LIGHT is not set -+# CONFIG_I2C_STUB is not set -+# CONFIG_I2C_PCA is not set -+# CONFIG_I2C_PCA_ISA is not set -+ -+# -+# Miscellaneous I2C Chip support -+# -+# CONFIG_SENSORS_DS1337 is not set -+# CONFIG_SENSORS_DS1374 is not set -+# CONFIG_SENSORS_EEPROM is not set -+# CONFIG_SENSORS_PCF8574 is not set -+# CONFIG_SENSORS_PCA9539 is not set -+# CONFIG_SENSORS_PCF8591 is not set -+# CONFIG_SENSORS_MAX6875 is not set -+# CONFIG_I2C_DEBUG_CORE is not set -+# CONFIG_I2C_DEBUG_ALGO is not set -+# CONFIG_I2C_DEBUG_BUS is not set -+# CONFIG_I2C_DEBUG_CHIP is not set -+ -+# -+# SPI support -+# -+# CONFIG_SPI is not set -+# CONFIG_SPI_MASTER is not set -+ -+# -+# Dallas's 1-wire bus -+# -+# CONFIG_W1 is not set -+ -+# -+# Hardware Monitoring support -+# -+# CONFIG_HWMON is not set -+# CONFIG_HWMON_VID is not set -+ -+# -+# Misc devices -+# -+# CONFIG_TIFM_CORE is not set -+ -+# -+# LED devices -+# -+# CONFIG_NEW_LEDS is not set -+ -+# -+# LED drivers -+# -+ -+# -+# LED Triggers -+# -+ -+# -+# Multimedia devices -+# -+# CONFIG_VIDEO_DEV is not set -+ -+# -+# Digital Video Broadcasting Devices -+# -+# CONFIG_DVB is not set -+# CONFIG_USB_DABUSB is not set -+ -+# -+# Graphics support -+# -+# CONFIG_FIRMWARE_EDID is not set -+# CONFIG_FB is not set -+ -+# -+# Console display driver support -+# -+# CONFIG_VGA_CONSOLE is not set -+CONFIG_DUMMY_CONSOLE=y -+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set -+ -+# -+# Sound -+# -+# CONFIG_SOUND is not set -+ -+# -+# USB support -+# -+CONFIG_USB_ARCH_HAS_HCD=y -+CONFIG_USB_ARCH_HAS_OHCI=y -+# CONFIG_USB_ARCH_HAS_EHCI is not set -+CONFIG_USB=y -+# CONFIG_USB_DEBUG is not set -+ -+# -+# Miscellaneous USB options -+# -+CONFIG_USB_DEVICEFS=y -+# CONFIG_USB_BANDWIDTH is not set -+# CONFIG_USB_DYNAMIC_MINORS is not set -+# CONFIG_USB_OTG is not set -+ -+# -+# USB Host Controller Drivers -+# -+# CONFIG_USB_ISP116X_HCD is not set -+CONFIG_USB_OHCI_HCD=y -+# CONFIG_USB_OHCI_BIG_ENDIAN is not set -+CONFIG_USB_OHCI_LITTLE_ENDIAN=y -+# CONFIG_USB_SL811_HCD is not set -+ -+# -+# USB Device Class drivers -+# -+# CONFIG_USB_ACM is not set -+# CONFIG_USB_PRINTER is not set -+ -+# -+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' -+# -+ -+# -+# may also be needed; see USB_STORAGE Help for more information -+# -+CONFIG_USB_STORAGE=y -+CONFIG_USB_STORAGE_DEBUG=y -+# CONFIG_USB_STORAGE_DATAFAB is not set -+# CONFIG_USB_STORAGE_FREECOM is not set -+# CONFIG_USB_STORAGE_DPCM is not set -+# CONFIG_USB_STORAGE_USBAT is not set -+# CONFIG_USB_STORAGE_SDDR09 is not set -+# CONFIG_USB_STORAGE_SDDR55 is not set -+# CONFIG_USB_STORAGE_JUMPSHOT is not set -+# CONFIG_USB_STORAGE_ALAUDA is not set -+# CONFIG_USB_STORAGE_KARMA is not set -+# CONFIG_USB_LIBUSUAL is not set -+ -+# -+# USB Input Devices -+# -+# CONFIG_USB_HID is not set -+ -+# -+# USB HID Boot Protocol drivers -+# -+# CONFIG_USB_KBD is not set -+# CONFIG_USB_MOUSE is not set -+# CONFIG_USB_AIPTEK is not set -+# CONFIG_USB_WACOM is not set -+# CONFIG_USB_ACECAD is not set -+# CONFIG_USB_KBTAB is not set -+# CONFIG_USB_POWERMATE is not set -+# CONFIG_USB_TOUCHSCREEN is not set -+# CONFIG_USB_YEALINK is not set -+# CONFIG_USB_XPAD is not set -+# CONFIG_USB_ATI_REMOTE is not set -+# CONFIG_USB_ATI_REMOTE2 is not set -+# CONFIG_USB_KEYSPAN_REMOTE is not set -+# CONFIG_USB_APPLETOUCH is not set -+ -+# -+# USB Imaging devices -+# -+# CONFIG_USB_MDC800 is not set -+# CONFIG_USB_MICROTEK is not set -+ -+# -+# USB Network Adapters -+# -+# CONFIG_USB_CATC is not set -+# CONFIG_USB_KAWETH is not set -+# CONFIG_USB_PEGASUS is not set -+# CONFIG_USB_RTL8150 is not set -+# CONFIG_USB_USBNET_MII is not set -+# CONFIG_USB_USBNET is not set -+CONFIG_USB_MON=y -+ -+# -+# USB port drivers -+# -+ -+# -+# USB Serial Converter support -+# -+# CONFIG_USB_SERIAL is not set -+ -+# -+# USB Miscellaneous drivers -+# -+# CONFIG_USB_EMI62 is not set -+# CONFIG_USB_EMI26 is not set -+# CONFIG_USB_ADUTUX is not set -+# CONFIG_USB_AUERSWALD is not set -+# CONFIG_USB_RIO500 is not set -+# CONFIG_USB_LEGOTOWER is not set -+# CONFIG_USB_LCD is not set -+# CONFIG_USB_LED is not set -+# CONFIG_USB_CYPRESS_CY7C63 is not set -+# CONFIG_USB_CYTHERM is not set -+# CONFIG_USB_PHIDGET is not set -+# CONFIG_USB_IDMOUSE is not set -+# CONFIG_USB_FTDI_ELAN is not set -+# CONFIG_USB_APPLEDISPLAY is not set -+# CONFIG_USB_LD is not set -+# CONFIG_USB_TRANCEVIBRATOR is not set -+# CONFIG_USB_TEST is not set -+ -+# -+# USB DSL modem support -+# -+ -+# -+# USB Gadget Support -+# -+CONFIG_USB_GADGET=y -+# CONFIG_USB_GADGET_DEBUG_FILES is not set -+CONFIG_USB_GADGET_SELECTED=y -+# CONFIG_USB_GADGET_NET2280 is not set -+# CONFIG_USB_GADGET_PXA2XX is not set -+# CONFIG_USB_GADGET_GOKU is not set -+# CONFIG_USB_GADGET_LH7A40X is not set -+# CONFIG_USB_GADGET_OMAP is not set -+CONFIG_USB_GADGET_AT91=y -+CONFIG_USB_AT91=y -+# CONFIG_USB_GADGET_DUMMY_HCD is not set -+# CONFIG_USB_GADGET_DUALSPEED is not set -+CONFIG_USB_ZERO=m -+# CONFIG_USB_ETH is not set -+CONFIG_USB_GADGETFS=m -+CONFIG_USB_FILE_STORAGE=m -+# CONFIG_USB_FILE_STORAGE_TEST is not set -+CONFIG_USB_G_SERIAL=m -+# CONFIG_USB_MIDI_GADGET is not set -+ -+# -+# MMC/SD Card support -+# -+CONFIG_MMC=y -+# CONFIG_MMC_DEBUG is not set -+CONFIG_MMC_BLOCK=y -+CONFIG_MMC_AT91=m -+# CONFIG_MMC_TIFM_SD is not set -+ -+# -+# Real Time Clock -+# -+CONFIG_RTC_LIB=y -+# CONFIG_RTC_CLASS is not set -+ -+# -+# File systems -+# -+CONFIG_EXT2_FS=y -+# CONFIG_EXT2_FS_XATTR is not set -+# CONFIG_EXT2_FS_XIP is not set -+# CONFIG_EXT3_FS is not set -+# CONFIG_EXT4DEV_FS is not set -+# CONFIG_REISERFS_FS is not set -+# CONFIG_JFS_FS is not set -+# CONFIG_FS_POSIX_ACL is not set -+# CONFIG_XFS_FS is not set -+# CONFIG_GFS2_FS is not set -+# CONFIG_OCFS2_FS is not set -+# CONFIG_MINIX_FS is not set -+# CONFIG_ROMFS_FS is not set -+CONFIG_INOTIFY=y -+CONFIG_INOTIFY_USER=y -+# CONFIG_QUOTA is not set -+CONFIG_DNOTIFY=y -+# CONFIG_AUTOFS_FS is not set -+# CONFIG_AUTOFS4_FS is not set -+# CONFIG_FUSE_FS is not set -+ -+# -+# CD-ROM/DVD Filesystems -+# -+# CONFIG_ISO9660_FS is not set -+# CONFIG_UDF_FS is not set -+ -+# -+# DOS/FAT/NT Filesystems -+# -+CONFIG_FAT_FS=y -+# CONFIG_MSDOS_FS is not set -+CONFIG_VFAT_FS=y -+CONFIG_FAT_DEFAULT_CODEPAGE=437 -+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" -+# CONFIG_NTFS_FS is not set -+ -+# -+# Pseudo filesystems -+# -+CONFIG_PROC_FS=y -+CONFIG_PROC_SYSCTL=y -+CONFIG_SYSFS=y -+CONFIG_TMPFS=y -+# CONFIG_TMPFS_POSIX_ACL is not set -+# CONFIG_HUGETLB_PAGE is not set -+CONFIG_RAMFS=y -+# CONFIG_CONFIGFS_FS is not set -+ -+# -+# Miscellaneous filesystems -+# -+# CONFIG_ADFS_FS is not set -+# CONFIG_AFFS_FS is not set -+# CONFIG_HFS_FS is not set -+# CONFIG_HFSPLUS_FS is not set -+# CONFIG_BEFS_FS is not set -+# CONFIG_BFS_FS is not set -+# CONFIG_EFS_FS is not set -+# CONFIG_JFFS_FS is not set -+# CONFIG_JFFS2_FS is not set -+CONFIG_CRAMFS=y -+# CONFIG_VXFS_FS is not set -+# CONFIG_HPFS_FS is not set -+# CONFIG_QNX4FS_FS is not set -+# CONFIG_SYSV_FS is not set -+# CONFIG_UFS_FS is not set -+ -+# -+# Network File Systems -+# -+# CONFIG_NFS_FS is not set -+# CONFIG_NFSD is not set -+# CONFIG_SMB_FS is not set -+# CONFIG_CIFS is not set -+# CONFIG_NCP_FS is not set -+# CONFIG_CODA_FS is not set -+# CONFIG_AFS_FS is not set -+# CONFIG_9P_FS is not set -+ -+# -+# Partition Types -+# -+# CONFIG_PARTITION_ADVANCED is not set -+CONFIG_MSDOS_PARTITION=y -+ -+# -+# Native Language Support -+# -+CONFIG_NLS=y -+CONFIG_NLS_DEFAULT="iso8859-1" -+CONFIG_NLS_CODEPAGE_437=y -+# CONFIG_NLS_CODEPAGE_737 is not set -+# CONFIG_NLS_CODEPAGE_775 is not set -+CONFIG_NLS_CODEPAGE_850=y -+# CONFIG_NLS_CODEPAGE_852 is not set -+# CONFIG_NLS_CODEPAGE_855 is not set -+# CONFIG_NLS_CODEPAGE_857 is not set -+# CONFIG_NLS_CODEPAGE_860 is not set -+# CONFIG_NLS_CODEPAGE_861 is not set -+# CONFIG_NLS_CODEPAGE_862 is not set -+# CONFIG_NLS_CODEPAGE_863 is not set -+# CONFIG_NLS_CODEPAGE_864 is not set -+# CONFIG_NLS_CODEPAGE_865 is not set -+# CONFIG_NLS_CODEPAGE_866 is not set -+# CONFIG_NLS_CODEPAGE_869 is not set -+# CONFIG_NLS_CODEPAGE_936 is not set -+# CONFIG_NLS_CODEPAGE_950 is not set -+# CONFIG_NLS_CODEPAGE_932 is not set -+# CONFIG_NLS_CODEPAGE_949 is not set -+# CONFIG_NLS_CODEPAGE_874 is not set -+# CONFIG_NLS_ISO8859_8 is not set -+# CONFIG_NLS_CODEPAGE_1250 is not set -+# CONFIG_NLS_CODEPAGE_1251 is not set -+# CONFIG_NLS_ASCII is not set -+CONFIG_NLS_ISO8859_1=y -+# CONFIG_NLS_ISO8859_2 is not set -+# CONFIG_NLS_ISO8859_3 is not set -+# CONFIG_NLS_ISO8859_4 is not set -+# CONFIG_NLS_ISO8859_5 is not set -+# CONFIG_NLS_ISO8859_6 is not set -+# CONFIG_NLS_ISO8859_7 is not set -+# CONFIG_NLS_ISO8859_9 is not set -+# CONFIG_NLS_ISO8859_13 is not set -+# CONFIG_NLS_ISO8859_14 is not set -+# CONFIG_NLS_ISO8859_15 is not set -+# CONFIG_NLS_KOI8_R is not set -+# CONFIG_NLS_KOI8_U is not set -+# CONFIG_NLS_UTF8 is not set -+ -+# -+# Profiling support -+# -+# CONFIG_PROFILING is not set -+ -+# -+# Kernel hacking -+# -+# CONFIG_PRINTK_TIME is not set -+CONFIG_ENABLE_MUST_CHECK=y -+# CONFIG_MAGIC_SYSRQ is not set -+# CONFIG_UNUSED_SYMBOLS is not set -+CONFIG_DEBUG_KERNEL=y -+CONFIG_LOG_BUF_SHIFT=14 -+CONFIG_DETECT_SOFTLOCKUP=y -+# CONFIG_SCHEDSTATS is not set -+# CONFIG_DEBUG_SLAB is not set -+# CONFIG_DEBUG_RT_MUTEXES is not set -+# CONFIG_RT_MUTEX_TESTER is not set -+# CONFIG_DEBUG_SPINLOCK is not set -+# CONFIG_DEBUG_MUTEXES is not set -+# CONFIG_DEBUG_RWSEMS is not set -+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set -+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set -+# CONFIG_DEBUG_KOBJECT is not set -+CONFIG_DEBUG_BUGVERBOSE=y -+# CONFIG_DEBUG_INFO is not set -+# CONFIG_DEBUG_FS is not set -+# CONFIG_DEBUG_VM is not set -+# CONFIG_DEBUG_LIST is not set -+CONFIG_FRAME_POINTER=y -+CONFIG_FORCED_INLINING=y -+# CONFIG_HEADERS_CHECK is not set -+# CONFIG_RCU_TORTURE_TEST is not set -+CONFIG_DEBUG_USER=y -+# CONFIG_DEBUG_WAITQ is not set -+# CONFIG_DEBUG_ERRORS is not set -+CONFIG_DEBUG_LL=y -+# CONFIG_DEBUG_ICEDCC is not set -+ -+# -+# Security options -+# -+# CONFIG_KEYS is not set -+# CONFIG_SECURITY is not set -+ -+# -+# Cryptographic options -+# -+# CONFIG_CRYPTO is not set -+ -+# -+# Library routines -+# -+# CONFIG_CRC_CCITT is not set -+# CONFIG_CRC16 is not set -+CONFIG_CRC32=y -+# CONFIG_LIBCRC32C is not set -+CONFIG_ZLIB_INFLATE=y -+CONFIG_PLIST=y -diff -urN -x CVS linux-2.6.19-final/arch/arm/configs/carmeva_defconfig linux-2.6.19/arch/arm/configs/carmeva_defconfig ---- linux-2.6.19-final/arch/arm/configs/carmeva_defconfig Mon Dec 4 16:39:29 2006 -+++ linux-2.6.19/arch/arm/configs/carmeva_defconfig Thu Oct 12 17:07:38 2006 -@@ -474,7 +474,7 @@ - # CONFIG_WATCHDOG is not set - # CONFIG_NVRAM is not set - # CONFIG_RTC is not set --# CONFIG_AT91_RTC is not set -+# CONFIG_AT91RM9200_RTC is not set - # CONFIG_DTLK is not set - # CONFIG_R3964 is not set - -diff -urN -x CVS linux-2.6.19-final/arch/arm/configs/csb637_defconfig linux-2.6.19/arch/arm/configs/csb637_defconfig ---- linux-2.6.19-final/arch/arm/configs/csb637_defconfig Mon Dec 4 16:39:29 2006 -+++ linux-2.6.19/arch/arm/configs/csb637_defconfig Thu Oct 12 17:07:38 2006 -@@ -623,7 +623,7 @@ - # CONFIG_USBPCWATCHDOG is not set - # CONFIG_NVRAM is not set - CONFIG_RTC=y --# CONFIG_AT91_RTC is not set -+# CONFIG_AT91RM9200_RTC is not set - # CONFIG_DTLK is not set - # CONFIG_R3964 is not set - -diff -urN -x CVS linux-2.6.19-final/arch/arm/configs/kb9202_defconfig linux-2.6.19/arch/arm/configs/kb9202_defconfig ---- linux-2.6.19-final/arch/arm/configs/kb9202_defconfig Mon Dec 4 16:39:29 2006 -+++ linux-2.6.19/arch/arm/configs/kb9202_defconfig Thu Oct 12 17:07:38 2006 -@@ -437,7 +437,7 @@ - # CONFIG_WATCHDOG is not set - # CONFIG_NVRAM is not set - # CONFIG_RTC is not set --# CONFIG_AT91_RTC is not set -+# CONFIG_AT91RM9200_RTC is not set - # CONFIG_DTLK is not set - # CONFIG_R3964 is not set - -diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/Kconfig linux-2.6.19/arch/arm/mach-at91rm9200/Kconfig ---- linux-2.6.19-final/arch/arm/mach-at91rm9200/Kconfig Mon Dec 4 16:32:44 2006 -+++ linux-2.6.19/arch/arm/mach-at91rm9200/Kconfig Wed Nov 22 09:24:11 2006 -@@ -2,7 +2,8 @@ +diff -urN -x CVS linux-2.6.21/arch/arm/boot/compressed/head-at91rm9200.S linux-2.6-stable/arch/arm/boot/compressed/head-at91rm9200.S +--- linux-2.6.21/arch/arm/boot/compressed/head-at91rm9200.S Thu Apr 26 05:08:32 2007 ++++ linux-2.6-stable/arch/arm/boot/compressed/head-at91rm9200.S Tue May 8 12:13:30 2007 +@@ -67,6 +67,12 @@ + cmp r7, r3 + beq 99f + ++ @ Promwad Chub : 1181 ++ mov r3, #(MACH_TYPE_CHUB & 0xff) ++ orr r3, r3, #(MACH_TYPE_CHUB & 0xff00) ++ cmp r7, r3 ++ beq 99f ++ + @ Unknown board, use the AT91RM9200DK board + @ mov r7, #MACH_TYPE_AT91RM9200 + mov r7, #(MACH_TYPE_AT91RM9200DK & 0xff) +diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/Kconfig linux-2.6-stable/arch/arm/mach-at91/Kconfig +--- linux-2.6.21/arch/arm/mach-at91/Kconfig Thu Apr 26 05:08:32 2007 ++++ linux-2.6-stable/arch/arm/mach-at91/Kconfig Wed May 9 10:20:54 2007 +@@ -17,6 +17,9 @@ + config ARCH_AT91SAM9263 + bool "AT91SAM9263" + ++config ARCH_AT91SAM9RL ++ bool "AT91SAM9RL" ++ + endchoice - menu "Atmel AT91 System-on-Chip" - --comment "Atmel AT91 Processors" -+choice -+ prompt "Atmel AT91 Processor" - - config ARCH_AT91RM9200 - bool "AT91RM9200" -@@ -13,6 +14,8 @@ - config ARCH_AT91SAM9261 - bool "AT91SAM9261" - -+endchoice -+ # ---------------------------------------------------------- +@@ -87,6 +90,12 @@ + help + Select this if you are using Sperry-Sun's KAFA board. - if ARCH_AT91RM9200 -@@ -33,7 +36,6 @@ - Select this if you are using Atmel's AT91RM9200-DK Development board. - (Discontinued) - -- - config MACH_AT91RM9200EK - bool "Atmel AT91RM9200-EK Evaluation Kit" - depends on ARCH_AT91RM9200 -@@ -90,6 +92,13 @@ ++config MACH_CHUB ++ bool "Promwad Chub board" ++ depends on ARCH_AT91RM9200 ++ help ++ Select this if you are using Promwad's Chub board. ++ + endif - comment "AT91SAM9260 Board Type" + # ---------------------------------------------------------- +@@ -111,6 +120,13 @@ + Select this if you are using Atmel's AT91SAM9260-EK or AT91SAM9XE Evaluation Kit + <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3933> -+config MACH_AT91SAM9260EK -+ bool "Atmel AT91SAM9260-EK Evaluation Kit" ++config MACH_CAM60 ++ bool "KwikByte CAM60 board" + depends on ARCH_AT91SAM9260 + help -+ Select this if you are using Atmel's AT91SAM9260-EK Evaluation Kit. -+ <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3933> ++ Select this if you are using KwikByte's CAM60 board based on the Atmel AT91SAM9260. ++ <http://www.kwikbyte.com> + endif # ---------------------------------------------------------- -@@ -98,8 +107,31 @@ +@@ -145,6 +161,20 @@ - comment "AT91SAM9261 Board Type" + # ---------------------------------------------------------- -+config MACH_AT91SAM9261EK -+ bool "Atmel AT91SAM9261-EK Evaluation Kit" -+ depends on ARCH_AT91SAM9261 ++if ARCH_AT91SAM9RL ++ ++comment "AT91SAM9RL Board Type" ++ ++config MACH_AT91SAM9RLEK ++ bool "Atmel AT91SAM9RL-EK Evaluation Kit" ++ depends on ARCH_AT91SAM9RL + help -+ Select this if you are using Atmel's AT91SAM9261-EK Evaluation Kit. -+ <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3820> ++ Select this if you are using Atmel's AT91SAM9RL-EK Evaluation Kit. + - endif - -+# ---------------------------------------------------------- ++endif + -+comment "AT91 Board Options" ++# ---------------------------------------------------------- + -+config MTD_AT91_DATAFLASH_CARD -+ bool "Enable DataFlash Card support" -+ depends on (ARCH_AT91RM9200DK || MACH_AT91RM9200EK || MACH_AT91SAM9260EK || MACH_AT91SAM9261EK) + comment "AT91 Board Options" + + config MTD_AT91_DATAFLASH_CARD +@@ -160,6 +190,20 @@ + On AT91SAM926x boards both types of NAND flash can be present + (8 and 16 bit data bus width). + ++config CSB300_WAKE_SW0 ++ bool "CSB300 SW0 irq0 wakeup" ++ depends on MACH_CSB337 && PM + help -+ Enable support for the DataFlash card. ++ If you have a CSB300 connected to your CSB337, this lets ++ SW0 serve as a wakeup button. It uses IRQ0. + -+config MTD_NAND_AT91_BUSWIDTH_16 -+ bool "Enable 16-bit data bus interface to NAND flash" -+ depends on (MACH_AT91SAM9261EK || MACH_AT91SAM9260EK) ++config CSB300_WAKE_SW1 ++ bool "CSB300 SW1 gpio wakeup" ++ depends on MACH_CSB337 && PM + help -+ On AT91SAM926x boards both types of NAND flash can be present -+ (8 and 16 bit data bus width). - ++ If you have a CSB300 connected to your CSB337, this lets ++ SW1 serve as a wakeup button. It uses GPIO. ++ # ---------------------------------------------------------- -@@ -111,6 +143,13 @@ + comment "AT91 Feature Selections" +@@ -170,6 +214,20 @@ Select this if you need to program one or more of the PCK0..PCK3 programmable clock outputs. ++config ATMEL_TCLIB ++ bool "Timer/Counter Library" ++ help ++ Select this if you want a library to allocate the Timer/Counter ++ blocks found on many Atmel processors. This facilitates using ++ these modules despite processor differences. ++ +config AT91_SLOW_CLOCK + bool "Suspend-to-RAM uses slow clock mode (EXPERIMENTAL)" + depends on PM && EXPERIMENTAL @@ -2254,47 +117,52 @@ diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/Kconfig linux-2.6.1 endmenu endif -diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/Makefile linux-2.6.19/arch/arm/mach-at91rm9200/Makefile ---- linux-2.6.19-final/arch/arm/mach-at91rm9200/Makefile Mon Dec 4 16:32:44 2006 -+++ linux-2.6.19/arch/arm/mach-at91rm9200/Makefile Thu Nov 16 11:45:54 2006 -@@ -2,19 +2,20 @@ - # Makefile for the linux kernel. - # - --obj-y := clock.o irq.o gpio.o devices.o -+obj-y := clock.o irq.o gpio.o - obj-m := - obj-n := +diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/Makefile linux-2.6-stable/arch/arm/mach-at91/Makefile +--- linux-2.6.21/arch/arm/mach-at91/Makefile Thu Apr 26 05:08:32 2007 ++++ linux-2.6-stable/arch/arm/mach-at91/Makefile Wed May 9 12:37:19 2007 +@@ -8,12 +8,15 @@ obj- := obj-$(CONFIG_PM) += pm.o +obj-$(CONFIG_AT91_SLOW_CLOCK) += pm_slowclock.o ++obj-$(CONFIG_ATMEL_TCLIB) += tclib.o # CPU-specific support --obj-$(CONFIG_ARCH_AT91RM9200) += at91rm9200.o at91rm9200_time.o --obj-$(CONFIG_ARCH_AT91SAM9260) += --obj-$(CONFIG_ARCH_AT91SAM9261) += -+obj-$(CONFIG_ARCH_AT91RM9200) += at91rm9200.o at91rm9200_time.o at91rm9200_devices.o -+obj-$(CONFIG_ARCH_AT91SAM9260) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o -+obj-$(CONFIG_ARCH_AT91SAM9261) += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o + obj-$(CONFIG_ARCH_AT91RM9200) += at91rm9200.o at91rm9200_time.o at91rm9200_devices.o + obj-$(CONFIG_ARCH_AT91SAM9260) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o + obj-$(CONFIG_ARCH_AT91SAM9261) += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o + obj-$(CONFIG_ARCH_AT91SAM9263) += at91sam9263.o at91sam926x_time.o at91sam9263_devices.o ++obj-$(CONFIG_ARCH_AT91SAM9RL) += at91sam9rl.o at91sam926x_time.o at91sam9rl_devices.o --# AT91RM9200 Board-specific support -+# AT91RM9200 board-specific support + # AT91RM9200 board-specific support obj-$(CONFIG_MACH_ONEARM) += board-1arm.o - obj-$(CONFIG_ARCH_AT91RM9200DK) += board-dk.o - obj-$(CONFIG_MACH_AT91RM9200EK) += board-ek.o -@@ -26,8 +27,10 @@ +@@ -25,9 +28,11 @@ + obj-$(CONFIG_MACH_KB9200) += board-kb9202.o + obj-$(CONFIG_MACH_ATEB9200) += board-eb9200.o obj-$(CONFIG_MACH_KAFA) += board-kafa.o ++obj-$(CONFIG_MACH_CHUB) += board-chub.o # AT91SAM9260 board-specific support -+obj-$(CONFIG_MACH_AT91SAM9260EK) += board-sam9260ek.o + obj-$(CONFIG_MACH_AT91SAM9260EK) += board-sam9260ek.o ++obj-$(CONFIG_MACH_CAM60) += board-cam60.o # AT91SAM9261 board-specific support -+obj-$(CONFIG_MACH_AT91SAM9261EK) += board-sam9261ek.o + obj-$(CONFIG_MACH_AT91SAM9261EK) += board-sam9261ek.o +@@ -35,9 +40,13 @@ + # AT91SAM9263 board-specific support + obj-$(CONFIG_MACH_AT91SAM9263EK) += board-sam9263ek.o ++# AT91SAM9RL board-specific support ++obj-$(CONFIG_MACH_AT91SAM9RLEK) += board-sam9rlek.o ++ # LEDs support led-$(CONFIG_ARCH_AT91RM9200DK) += leds.o -@@ -39,7 +42,7 @@ + led-$(CONFIG_MACH_AT91RM9200EK) += leds.o ++led-$(CONFIG_MACH_AT91SAM9261EK)+= leds.o + led-$(CONFIG_MACH_CSB337) += leds.o + led-$(CONFIG_MACH_CSB637) += leds.o + led-$(CONFIG_MACH_KB9200) += leds.o +@@ -45,7 +54,7 @@ obj-$(CONFIG_LEDS) += $(led-y) # VGA support @@ -2303,693 +171,515 @@ diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/Makefile linux-2.6. ifeq ($(CONFIG_PM_DEBUG),y) -diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/at91rm9200.c linux-2.6.19/arch/arm/mach-at91rm9200/at91rm9200.c ---- linux-2.6.19-final/arch/arm/mach-at91rm9200/at91rm9200.c Mon Dec 4 16:39:29 2006 -+++ linux-2.6.19/arch/arm/mach-at91rm9200/at91rm9200.c Fri Nov 3 19:22:15 2006 -@@ -14,8 +14,10 @@ - - #include <asm/mach/arch.h> - #include <asm/mach/map.h> -+#include <asm/arch/at91rm9200.h> -+#include <asm/arch/at91_pmc.h> -+#include <asm/arch/at91_st.h> - --#include <asm/hardware.h> - #include "generic.h" - #include "clock.h" - -@@ -26,32 +28,12 @@ - .length = SZ_4K, - .type = MT_DEVICE, - }, { -- .virtual = AT91_VA_BASE_SPI, -- .pfn = __phys_to_pfn(AT91RM9200_BASE_SPI), -- .length = SZ_16K, -- .type = MT_DEVICE, -- }, { - .virtual = AT91_VA_BASE_EMAC, - .pfn = __phys_to_pfn(AT91RM9200_BASE_EMAC), - .length = SZ_16K, - .type = MT_DEVICE, - }, { -- .virtual = AT91_VA_BASE_TWI, -- .pfn = __phys_to_pfn(AT91RM9200_BASE_TWI), -- .length = SZ_16K, -- .type = MT_DEVICE, -- }, { -- .virtual = AT91_VA_BASE_MCI, -- .pfn = __phys_to_pfn(AT91RM9200_BASE_MCI), -- .length = SZ_16K, -- .type = MT_DEVICE, -- }, { -- .virtual = AT91_VA_BASE_UDP, -- .pfn = __phys_to_pfn(AT91RM9200_BASE_UDP), -- .length = SZ_16K, -- .type = MT_DEVICE, -- }, { -- .virtual = AT91_SRAM_VIRT_BASE, -+ .virtual = AT91_IO_VIRT_BASE - AT91RM9200_SRAM_SIZE, - .pfn = __phys_to_pfn(AT91RM9200_SRAM_BASE), - .length = AT91RM9200_SRAM_SIZE, - .type = MT_DEVICE, -@@ -222,6 +204,16 @@ - } +diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/at91rm9200.c linux-2.6-stable/arch/arm/mach-at91/at91rm9200.c +--- linux-2.6.21/arch/arm/mach-at91/at91rm9200.c Thu Apr 26 05:08:32 2007 ++++ linux-2.6-stable/arch/arm/mach-at91/at91rm9200.c Tue May 8 12:13:30 2007 +@@ -117,6 +117,21 @@ + .pmc_mask = 1 << AT91RM9200_ID_PIOD, + .type = CLK_TYPE_PERIPHERAL, }; ++static struct clk ssc0_clk = { ++ .name = "ssc0_clk", ++ .pmc_mask = 1 << AT91RM9200_ID_SSC0, ++ .type = CLK_TYPE_PERIPHERAL, ++}; ++static struct clk ssc1_clk = { ++ .name = "ssc1_clk", ++ .pmc_mask = 1 << AT91RM9200_ID_SSC1, ++ .type = CLK_TYPE_PERIPHERAL, ++}; ++static struct clk ssc2_clk = { ++ .name = "ssc2_clk", ++ .pmc_mask = 1 << AT91RM9200_ID_SSC2, ++ .type = CLK_TYPE_PERIPHERAL, ++}; + static struct clk tc0_clk = { + .name = "tc0_clk", + .pmc_mask = 1 << AT91RM9200_ID_TC0, +@@ -161,7 +176,9 @@ + &udc_clk, + &twi_clk, + &spi_clk, +- // ssc 0 .. ssc2 ++ &ssc0_clk, ++ &ssc1_clk, ++ &ssc2_clk, + &tc0_clk, + &tc1_clk, + &tc2_clk, +@@ -250,6 +267,33 @@ -+static void at91rm9200_reset(void) -+{ -+ /* -+ * Perform a hardware reset with the use of the Watchdog timer. -+ */ -+ at91_sys_write(AT91_ST_WDMR, AT91_ST_RSTEN | AT91_ST_EXTEN | 1); -+ at91_sys_write(AT91_ST_CR, AT91_ST_WDRST); -+} -+ -+ - /* -------------------------------------------------------------------- - * AT91RM9200 processor initialization - * -------------------------------------------------------------------- */ -@@ -230,6 +222,12 @@ - /* Map peripherals */ - iotable_init(at91rm9200_io_desc, ARRAY_SIZE(at91rm9200_io_desc)); - -+ at91_arch_reset = at91rm9200_reset; -+ at91_extern_irq = (1 << AT91RM9200_ID_IRQ0) | (1 << AT91RM9200_ID_IRQ1) -+ | (1 << AT91RM9200_ID_IRQ2) | (1 << AT91RM9200_ID_IRQ3) -+ | (1 << AT91RM9200_ID_IRQ4) | (1 << AT91RM9200_ID_IRQ5) -+ | (1 << AT91RM9200_ID_IRQ6); -+ - /* Init clock subsystem */ - at91_clock_init(main_clock); -diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/at91rm9200_devices.c linux-2.6.19/arch/arm/mach-at91rm9200/at91rm9200_devices.c ---- linux-2.6.19-final/arch/arm/mach-at91rm9200/at91rm9200_devices.c Thu Jan 1 02:00:00 1970 -+++ linux-2.6.19/arch/arm/mach-at91rm9200/at91rm9200_devices.c Fri Dec 1 16:10:47 2006 -@@ -0,0 +1,901 @@ -+/* -+ * arch/arm/mach-at91rm9200/at91rm9200_devices.c -+ * -+ * Copyright (C) 2005 Thibaut VARENE <varenet@parisc-linux.org> -+ * Copyright (C) 2005 David Brownell -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ */ -+#include <asm/mach/arch.h> -+#include <asm/mach/map.h> -+ -+#include <linux/platform_device.h> -+ -+#include <asm/arch/board.h> -+#include <asm/arch/gpio.h> -+#include <asm/arch/at91rm9200.h> -+#include <asm/arch/at91rm9200_mc.h> -+ -+#include "generic.h" -+ -+#define SZ_512 0x00000200 -+#define SZ_256 0x00000100 -+#define SZ_16 0x00000010 -+ -+/* -------------------------------------------------------------------- -+ * USB Host + /* -------------------------------------------------------------------- ++ * Timer/Counter library initialization + * -------------------------------------------------------------------- */ ++#ifdef CONFIG_ATMEL_TCLIB + -+#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) -+static u64 ohci_dmamask = 0xffffffffUL; -+static struct at91_usbh_data usbh_data; ++#include "tclib.h" + -+static struct resource usbh_resources[] = { ++static struct atmel_tcblock at91rm9200_tcblocks[] = { + [0] = { -+ .start = AT91RM9200_UHP_BASE, -+ .end = AT91RM9200_UHP_BASE + SZ_1M - 1, -+ .flags = IORESOURCE_MEM, ++ .physaddr = AT91RM9200_BASE_TCB0, ++ .irq = { AT91RM9200_ID_TC0, AT91RM9200_ID_TC1, AT91RM9200_ID_TC2 }, ++ .clk = { &tc0_clk, &tc1_clk, &tc2_clk }, + }, + [1] = { -+ .start = AT91RM9200_ID_UHP, -+ .end = AT91RM9200_ID_UHP, -+ .flags = IORESOURCE_IRQ, -+ }, -+}; -+ -+static struct platform_device at91rm9200_usbh_device = { -+ .name = "at91_ohci", -+ .id = -1, -+ .dev = { -+ .dma_mask = &ohci_dmamask, -+ .coherent_dma_mask = 0xffffffff, -+ .platform_data = &usbh_data, ++ .physaddr = AT91RM9200_BASE_TCB1, ++ .irq = { AT91RM9200_ID_TC3, AT91RM9200_ID_TC4, AT91RM9200_ID_TC5 }, ++ .clk = { &tc3_clk, &tc4_clk, &tc5_clk }, + }, -+ .resource = usbh_resources, -+ .num_resources = ARRAY_SIZE(usbh_resources), +}; + -+void __init at91_add_device_usbh(struct at91_usbh_data *data) -+{ -+ if (!data) -+ return; ++#define at91rm9200_tc_init() atmel_tc_init(at91rm9200_tcblocks, ARRAY_SIZE(at91rm9200_tcblocks)) + -+ usbh_data = *data; -+ platform_device_register(&at91rm9200_usbh_device); -+} +#else -+void __init at91_add_device_usbh(struct at91_usbh_data *data) {} ++#define at91rm9200_tc_init() do {} while(0) +#endif + + +/* -------------------------------------------------------------------- -+ * USB Device (Gadget) -+ * -------------------------------------------------------------------- */ -+ -+#ifdef CONFIG_USB_GADGET_AT91 -+static struct at91_udc_data udc_data; -+ -+static struct resource udc_resources[] = { -+ [0] = { -+ .start = AT91RM9200_BASE_UDP, -+ .end = AT91RM9200_BASE_UDP + SZ_16K - 1, -+ .flags = IORESOURCE_MEM, -+ }, -+ [1] = { -+ .start = AT91RM9200_ID_UDP, -+ .end = AT91RM9200_ID_UDP, -+ .flags = IORESOURCE_IRQ, -+ }, -+}; + * AT91RM9200 processor initialization + * -------------------------------------------------------------------- */ + void __init at91rm9200_initialize(unsigned long main_clock, unsigned short banks) +@@ -271,6 +315,9 @@ + + /* Initialize GPIO subsystem */ + at91_gpio_init(at91rm9200_gpio, banks); + -+static struct platform_device at91rm9200_udc_device = { -+ .name = "at91_udc", -+ .id = -1, -+ .dev = { -+ .platform_data = &udc_data, -+ }, -+ .resource = udc_resources, -+ .num_resources = ARRAY_SIZE(udc_resources), -+}; ++ /* Initialize the Timer/Counter blocks */ ++ at91rm9200_tc_init(); + } + + +@@ -284,28 +331,28 @@ + static unsigned int at91rm9200_default_irq_priority[NR_AIC_IRQS] __initdata = { + 7, /* Advanced Interrupt Controller (FIQ) */ + 7, /* System Peripherals */ +- 0, /* Parallel IO Controller A */ +- 0, /* Parallel IO Controller B */ +- 0, /* Parallel IO Controller C */ +- 0, /* Parallel IO Controller D */ +- 6, /* USART 0 */ +- 6, /* USART 1 */ +- 6, /* USART 2 */ +- 6, /* USART 3 */ ++ 1, /* Parallel IO Controller A */ ++ 1, /* Parallel IO Controller B */ ++ 1, /* Parallel IO Controller C */ ++ 1, /* Parallel IO Controller D */ ++ 5, /* USART 0 */ ++ 5, /* USART 1 */ ++ 5, /* USART 2 */ ++ 5, /* USART 3 */ + 0, /* Multimedia Card Interface */ +- 4, /* USB Device Port */ +- 0, /* Two-Wire Interface */ +- 6, /* Serial Peripheral Interface */ +- 5, /* Serial Synchronous Controller 0 */ +- 5, /* Serial Synchronous Controller 1 */ +- 5, /* Serial Synchronous Controller 2 */ ++ 2, /* USB Device Port */ ++ 6, /* Two-Wire Interface */ ++ 5, /* Serial Peripheral Interface */ ++ 4, /* Serial Synchronous Controller 0 */ ++ 4, /* Serial Synchronous Controller 1 */ ++ 4, /* Serial Synchronous Controller 2 */ + 0, /* Timer Counter 0 */ + 0, /* Timer Counter 1 */ + 0, /* Timer Counter 2 */ + 0, /* Timer Counter 3 */ + 0, /* Timer Counter 4 */ + 0, /* Timer Counter 5 */ +- 3, /* USB Host port */ ++ 2, /* USB Host port */ + 3, /* Ethernet MAC */ + 0, /* Advanced Interrupt Controller (IRQ0) */ + 0, /* Advanced Interrupt Controller (IRQ1) */ +diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/at91rm9200_devices.c linux-2.6-stable/arch/arm/mach-at91/at91rm9200_devices.c +--- linux-2.6.21/arch/arm/mach-at91/at91rm9200_devices.c Thu Apr 26 05:08:32 2007 ++++ linux-2.6-stable/arch/arm/mach-at91/at91rm9200_devices.c Tue May 8 12:13:30 2007 +@@ -480,7 +480,18 @@ + * SPI + * -------------------------------------------------------------------- */ + +-#if defined(CONFIG_SPI_AT91) || defined(CONFIG_SPI_AT91_MODULE) || defined(CONFIG_AT91_SPI) || defined(CONFIG_AT91_SPI_MODULE) ++#if defined(CONFIG_AT91_SPI) || defined(CONFIG_AT91_SPI_MODULE) /* legacy SPI driver */ ++#define SPI_DEVNAME "at91_spi" + -+void __init at91_add_device_udc(struct at91_udc_data *data) -+{ -+ if (!data) -+ return; ++#elif defined(CONFIG_SPI_AT91) || defined(CONFIG_SPI_AT91_MODULE) /* SPI bitbanging driver */ ++#define SPI_DEVNAME "at91_spi" + -+ if (data->vbus_pin) { -+ at91_set_gpio_input(data->vbus_pin, 0); -+ at91_set_deglitch(data->vbus_pin, 1); -+ } -+ if (data->pullup_pin) -+ at91_set_gpio_output(data->pullup_pin, 0); ++#elif defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE) /* new SPI driver */ ++#define SPI_DEVNAME "atmel_spi" + -+ udc_data = *data; -+ platform_device_register(&at91rm9200_udc_device); -+} -+#else -+void __init at91_add_device_udc(struct at91_udc_data *data) {} +#endif + ++#ifdef SPI_DEVNAME + static u64 spi_dmamask = 0xffffffffUL; + + static struct resource spi_resources[] = { +@@ -497,7 +508,7 @@ + }; + + static struct platform_device at91rm9200_spi_device = { +- .name = "at91_spi", ++ .name = SPI_DEVNAME, + .id = 0, + .dev = { + .dma_mask = &spi_dmamask, +@@ -606,6 +617,32 @@ + #endif + + ++#if defined(CONFIG_NEW_LEDS) + -+/* -------------------------------------------------------------------- -+ * Ethernet -+ * -------------------------------------------------------------------- */ -+ -+#if defined(CONFIG_ARM_AT91_ETHER) || defined(CONFIG_ARM_AT91_ETHER_MODULE) -+static u64 eth_dmamask = 0xffffffffUL; -+static struct eth_platform_data eth_data; -+ -+static struct resource eth_resources[] = { -+ [0] = { -+ .start = AT91_VA_BASE_EMAC, -+ .end = AT91_VA_BASE_EMAC + SZ_16K - 1, -+ .flags = IORESOURCE_MEM, -+ }, -+ [1] = { -+ .start = AT91RM9200_ID_EMAC, -+ .end = AT91RM9200_ID_EMAC, -+ .flags = IORESOURCE_IRQ, -+ }, -+}; -+ -+static struct platform_device at91rm9200_eth_device = { -+ .name = "at91_ether", ++static struct platform_device at91_leds = { ++ .name = "at91_leds", + .id = -1, -+ .dev = { -+ .dma_mask = ð_dmamask, -+ .coherent_dma_mask = 0xffffffff, -+ .platform_data = ð_data, -+ }, -+ .resource = eth_resources, -+ .num_resources = ARRAY_SIZE(eth_resources), +}; + -+void __init at91_add_device_eth(struct eth_platform_data *data) ++void __init at91_gpio_leds(struct at91_gpio_led *leds, int nr) +{ -+ if (!data) ++ if (!nr) + return; + -+ if (data->phy_irq_pin) { -+ at91_set_gpio_input(data->phy_irq_pin, 0); -+ at91_set_deglitch(data->phy_irq_pin, 1); -+ } ++ at91_leds.dev.platform_data = leds; + -+ /* Pins used for MII and RMII */ -+ at91_set_A_periph(AT91_PIN_PA16, 0); /* EMDIO */ -+ at91_set_A_periph(AT91_PIN_PA15, 0); /* EMDC */ -+ at91_set_A_periph(AT91_PIN_PA14, 0); /* ERXER */ -+ at91_set_A_periph(AT91_PIN_PA13, 0); /* ERX1 */ -+ at91_set_A_periph(AT91_PIN_PA12, 0); /* ERX0 */ -+ at91_set_A_periph(AT91_PIN_PA11, 0); /* ECRS_ECRSDV */ -+ at91_set_A_periph(AT91_PIN_PA10, 0); /* ETX1 */ -+ at91_set_A_periph(AT91_PIN_PA9, 0); /* ETX0 */ -+ at91_set_A_periph(AT91_PIN_PA8, 0); /* ETXEN */ -+ at91_set_A_periph(AT91_PIN_PA7, 0); /* ETXCK_EREFCK */ -+ -+ if (!data->is_rmii) { -+ at91_set_B_periph(AT91_PIN_PB19, 0); /* ERXCK */ -+ at91_set_B_periph(AT91_PIN_PB18, 0); /* ECOL */ -+ at91_set_B_periph(AT91_PIN_PB17, 0); /* ERXDV */ -+ at91_set_B_periph(AT91_PIN_PB16, 0); /* ERX3 */ -+ at91_set_B_periph(AT91_PIN_PB15, 0); /* ERX2 */ -+ at91_set_B_periph(AT91_PIN_PB14, 0); /* ETXER */ -+ at91_set_B_periph(AT91_PIN_PB13, 0); /* ETX3 */ -+ at91_set_B_periph(AT91_PIN_PB12, 0); /* ETX2 */ ++ for ( ; nr; nr--, leds++) { ++ leds->index = nr; /* first record stores number of leds */ ++ at91_set_gpio_output(leds->gpio, (leds->flags & 1) == 0); + } + -+ eth_data = *data; -+ platform_device_register(&at91rm9200_eth_device); ++ platform_device_register(&at91_leds); +} +#else -+void __init at91_add_device_eth(struct eth_platform_data *data) {} ++void __init at91_gpio_leds(struct at91_gpio_led *leds, int nr) {} +#endif + + -+/* -------------------------------------------------------------------- -+ * Compact Flash / PCMCIA -+ * -------------------------------------------------------------------- */ -+ -+#if defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE) -+static struct at91_cf_data cf_data; -+ -+#define CF_BASE AT91_CHIPSELECT_4 -+ -+static struct resource cf_resources[] = { -+ [0] = { -+ .start = CF_BASE, -+ /* ties up CS4, CS5 and CS6 */ -+ .end = CF_BASE + (0x30000000 - 1), -+ .flags = IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT, -+ }, -+}; -+ -+static struct platform_device at91rm9200_cf_device = { -+ .name = "at91_cf", -+ .id = -1, -+ .dev = { -+ .platform_data = &cf_data, -+ }, -+ .resource = cf_resources, -+ .num_resources = ARRAY_SIZE(cf_resources), + /* -------------------------------------------------------------------- + * UART + * -------------------------------------------------------------------- */ +diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/at91sam9260.c linux-2.6-stable/arch/arm/mach-at91/at91sam9260.c +--- linux-2.6.21/arch/arm/mach-at91/at91sam9260.c Thu Apr 26 05:08:32 2007 ++++ linux-2.6-stable/arch/arm/mach-at91/at91sam9260.c Tue May 8 12:13:30 2007 +@@ -119,6 +119,11 @@ + .pmc_mask = 1 << AT91SAM9260_ID_SPI1, + .type = CLK_TYPE_PERIPHERAL, + }; ++static struct clk ssc_clk = { ++ .name = "ssc_clk", ++ .pmc_mask = 1 << AT91SAM9260_ID_SSC, ++ .type = CLK_TYPE_PERIPHERAL, +}; -+ -+void __init at91_add_device_cf(struct at91_cf_data *data) -+{ -+ unsigned int csa; -+ -+ if (!data) -+ return; -+ -+ data->chipselect = 4; /* can only use EBI ChipSelect 4 */ -+ -+ /* CF takes over CS4, CS5, CS6 */ -+ csa = at91_sys_read(AT91_EBI_CSA); -+ at91_sys_write(AT91_EBI_CSA, csa | AT91_EBI_CS4A_SMC_COMPACTFLASH); -+ -+ /* -+ * Static memory controller timing adjustments. -+ * REVISIT: these timings are in terms of MCK cycles, so -+ * when MCK changes (cpufreq etc) so must these values... -+ */ -+ at91_sys_write(AT91_SMC_CSR(4), -+ AT91_SMC_ACSS_STD -+ | AT91_SMC_DBW_16 -+ | AT91_SMC_BAT -+ | AT91_SMC_WSEN -+ | AT91_SMC_NWS_(32) /* wait states */ -+ | AT91_SMC_RWSETUP_(6) /* setup time */ -+ | AT91_SMC_RWHOLD_(4) /* hold time */ -+ ); -+ -+ /* input/irq */ -+ if (data->irq_pin) { -+ at91_set_gpio_input(data->irq_pin, 1); -+ at91_set_deglitch(data->irq_pin, 1); -+ } -+ at91_set_gpio_input(data->det_pin, 1); -+ at91_set_deglitch(data->det_pin, 1); -+ -+ /* outputs, initially off */ -+ if (data->vcc_pin) -+ at91_set_gpio_output(data->vcc_pin, 0); -+ at91_set_gpio_output(data->rst_pin, 0); -+ -+ /* force poweron defaults for these pins ... */ -+ at91_set_A_periph(AT91_PIN_PC9, 0); /* A25/CFRNW */ -+ at91_set_A_periph(AT91_PIN_PC10, 0); /* NCS4/CFCS */ -+ at91_set_A_periph(AT91_PIN_PC11, 0); /* NCS5/CFCE1 */ -+ at91_set_A_periph(AT91_PIN_PC12, 0); /* NCS6/CFCE2 */ -+ -+ /* nWAIT is _not_ a default setting */ -+ at91_set_A_periph(AT91_PIN_PC6, 1); /* nWAIT */ -+ -+ cf_data = *data; -+ platform_device_register(&at91rm9200_cf_device); -+} -+#else -+void __init at91_add_device_cf(struct at91_cf_data *data) {} -+#endif -+ -+ -+/* -------------------------------------------------------------------- -+ * MMC / SD + static struct clk tc0_clk = { + .name = "tc0_clk", + .pmc_mask = 1 << AT91SAM9260_ID_TC0, +@@ -193,7 +198,7 @@ + &twi_clk, + &spi0_clk, + &spi1_clk, +- // ssc ++ &ssc_clk, + &tc0_clk, + &tc1_clk, + &tc2_clk, +@@ -264,6 +269,33 @@ + + + /* -------------------------------------------------------------------- ++ * Timer/Counter library initialization + * -------------------------------------------------------------------- */ ++#ifdef CONFIG_ATMEL_TCLIB + -+#if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE) -+static u64 mmc_dmamask = 0xffffffffUL; -+static struct at91_mmc_data mmc_data; ++#include "tclib.h" + -+static struct resource mmc_resources[] = { ++static struct atmel_tcblock at91sam9260_tcblocks[] = { + [0] = { -+ .start = AT91RM9200_BASE_MCI, -+ .end = AT91RM9200_BASE_MCI + SZ_16K - 1, -+ .flags = IORESOURCE_MEM, ++ .physaddr = AT91SAM9260_BASE_TCB0, ++ .irq = { AT91SAM9260_ID_TC0, AT91SAM9260_ID_TC1, AT91SAM9260_ID_TC2 }, ++ .clk = { &tc0_clk, &tc1_clk, &tc2_clk }, + }, + [1] = { -+ .start = AT91RM9200_ID_MCI, -+ .end = AT91RM9200_ID_MCI, -+ .flags = IORESOURCE_IRQ, -+ }, -+}; -+ -+static struct platform_device at91rm9200_mmc_device = { -+ .name = "at91_mci", -+ .id = -1, -+ .dev = { -+ .dma_mask = &mmc_dmamask, -+ .coherent_dma_mask = 0xffffffff, -+ .platform_data = &mmc_data, ++ .physaddr = AT91SAM9260_BASE_TCB1, ++ .irq = { AT91SAM9260_ID_TC3, AT91SAM9260_ID_TC4, AT91SAM9260_ID_TC5 }, ++ .clk = { &tc3_clk, &tc4_clk, &tc5_clk }, + }, -+ .resource = mmc_resources, -+ .num_resources = ARRAY_SIZE(mmc_resources), +}; + -+void __init at91_add_device_mmc(struct at91_mmc_data *data) -+{ -+ if (!data) -+ return; -+ -+ /* input/irq */ -+ if (data->det_pin) { -+ at91_set_gpio_input(data->det_pin, 1); -+ at91_set_deglitch(data->det_pin, 1); -+ } -+ if (data->wp_pin) -+ at91_set_gpio_input(data->wp_pin, 1); -+ if (data->vcc_pin) -+ at91_set_gpio_output(data->vcc_pin, 0); -+ -+ /* CLK */ -+ at91_set_A_periph(AT91_PIN_PA27, 0); -+ -+ if (data->slot_b) { -+ /* CMD */ -+ at91_set_B_periph(AT91_PIN_PA8, 1); -+ -+ /* DAT0, maybe DAT1..DAT3 */ -+ at91_set_B_periph(AT91_PIN_PA9, 1); -+ if (data->wire4) { -+ at91_set_B_periph(AT91_PIN_PA10, 1); -+ at91_set_B_periph(AT91_PIN_PA11, 1); -+ at91_set_B_periph(AT91_PIN_PA12, 1); -+ } -+ } else { -+ /* CMD */ -+ at91_set_A_periph(AT91_PIN_PA28, 1); -+ -+ /* DAT0, maybe DAT1..DAT3 */ -+ at91_set_A_periph(AT91_PIN_PA29, 1); -+ if (data->wire4) { -+ at91_set_B_periph(AT91_PIN_PB3, 1); -+ at91_set_B_periph(AT91_PIN_PB4, 1); -+ at91_set_B_periph(AT91_PIN_PB5, 1); -+ } -+ } ++#define at91sam9260_tc_init() atmel_tc_init(at91sam9260_tcblocks, ARRAY_SIZE(at91sam9260_tcblocks)) + -+ mmc_data = *data; -+ platform_device_register(&at91rm9200_mmc_device); -+} +#else -+void __init at91_add_device_mmc(struct at91_mmc_data *data) {} ++#define at91sam9260_tc_init() do {} while(0) +#endif + + +/* -------------------------------------------------------------------- -+ * NAND / SmartMedia -+ * -------------------------------------------------------------------- */ -+ -+#if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE) -+static struct at91_nand_data nand_data; -+ -+#define NAND_BASE AT91_CHIPSELECT_3 + * AT91SAM9260 processor initialization + * -------------------------------------------------------------------- */ + +@@ -310,6 +342,9 @@ + + /* Register GPIO subsystem */ + at91_gpio_init(at91sam9260_gpio, 3); + -+static struct resource nand_resources[] = { -+ { -+ .start = NAND_BASE, -+ .end = NAND_BASE + SZ_8M - 1, -+ .flags = IORESOURCE_MEM, -+ } -+}; ++ /* Initialize the Timer/Counter blocks */ ++ at91sam9260_tc_init(); + } + + /* -------------------------------------------------------------------- +@@ -322,30 +357,30 @@ + static unsigned int at91sam9260_default_irq_priority[NR_AIC_IRQS] __initdata = { + 7, /* Advanced Interrupt Controller */ + 7, /* System Peripherals */ +- 0, /* Parallel IO Controller A */ +- 0, /* Parallel IO Controller B */ +- 0, /* Parallel IO Controller C */ ++ 1, /* Parallel IO Controller A */ ++ 1, /* Parallel IO Controller B */ ++ 1, /* Parallel IO Controller C */ + 0, /* Analog-to-Digital Converter */ +- 6, /* USART 0 */ +- 6, /* USART 1 */ +- 6, /* USART 2 */ ++ 5, /* USART 0 */ ++ 5, /* USART 1 */ ++ 5, /* USART 2 */ + 0, /* Multimedia Card Interface */ +- 4, /* USB Device Port */ +- 0, /* Two-Wire Interface */ +- 6, /* Serial Peripheral Interface 0 */ +- 6, /* Serial Peripheral Interface 1 */ ++ 2, /* USB Device Port */ ++ 6, /* Two-Wire Interface */ ++ 5, /* Serial Peripheral Interface 0 */ ++ 5, /* Serial Peripheral Interface 1 */ + 5, /* Serial Synchronous Controller */ + 0, + 0, + 0, /* Timer Counter 0 */ + 0, /* Timer Counter 1 */ + 0, /* Timer Counter 2 */ +- 3, /* USB Host port */ ++ 2, /* USB Host port */ + 3, /* Ethernet */ + 0, /* Image Sensor Interface */ +- 6, /* USART 3 */ +- 6, /* USART 4 */ +- 6, /* USART 5 */ ++ 5, /* USART 3 */ ++ 5, /* USART 4 */ ++ 5, /* USART 5 */ + 0, /* Timer Counter 3 */ + 0, /* Timer Counter 4 */ + 0, /* Timer Counter 5 */ +diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/at91sam9260_devices.c linux-2.6-stable/arch/arm/mach-at91/at91sam9260_devices.c +--- linux-2.6.21/arch/arm/mach-at91/at91sam9260_devices.c Thu Apr 26 05:08:32 2007 ++++ linux-2.6-stable/arch/arm/mach-at91/at91sam9260_devices.c Tue May 8 12:13:30 2007 +@@ -527,6 +527,32 @@ + #endif + + ++#if defined(CONFIG_NEW_LEDS) + -+static struct platform_device at91rm9200_nand_device = { -+ .name = "at91_nand", ++static struct platform_device at91_leds = { ++ .name = "at91_leds", + .id = -1, -+ .dev = { -+ .platform_data = &nand_data, -+ }, -+ .resource = nand_resources, -+ .num_resources = ARRAY_SIZE(nand_resources), +}; + -+void __init at91_add_device_nand(struct at91_nand_data *data) ++void __init at91_gpio_leds(struct at91_gpio_led *leds, int nr) +{ -+ unsigned int csa; -+ -+ if (!data) ++ if (!nr) + return; + -+ /* enable the address range of CS3 */ -+ csa = at91_sys_read(AT91_EBI_CSA); -+ at91_sys_write(AT91_EBI_CSA, csa | AT91_EBI_CS3A_SMC_SMARTMEDIA); -+ -+ /* set the bus interface characteristics */ -+ at91_sys_write(AT91_SMC_CSR(3), AT91_SMC_ACSS_STD | AT91_SMC_DBW_8 | AT91_SMC_WSEN -+ | AT91_SMC_NWS_(5) -+ | AT91_SMC_TDF_(1) -+ | AT91_SMC_RWSETUP_(0) /* tDS Data Set up Time 30 - ns */ -+ | AT91_SMC_RWHOLD_(1) /* tDH Data Hold Time 20 - ns */ -+ ); -+ -+ /* enable pin */ -+ if (data->enable_pin) -+ at91_set_gpio_output(data->enable_pin, 1); -+ -+ /* ready/busy pin */ -+ if (data->rdy_pin) -+ at91_set_gpio_input(data->rdy_pin, 1); -+ -+ /* card detect pin */ -+ if (data->det_pin) -+ at91_set_gpio_input(data->det_pin, 1); ++ at91_leds.dev.platform_data = leds; + -+ at91_set_A_periph(AT91_PIN_PC1, 0); /* SMOE */ -+ at91_set_A_periph(AT91_PIN_PC3, 0); /* SMWE */ ++ for ( ; nr; nr--, leds++) { ++ leds->index = nr; /* first record stores number of leds */ ++ at91_set_gpio_output(leds->gpio, (leds->flags & 1) == 0); ++ } + -+ nand_data = *data; -+ platform_device_register(&at91rm9200_nand_device); ++ platform_device_register(&at91_leds); +} +#else -+void __init at91_add_device_nand(struct at91_nand_data *data) {} ++void __init at91_gpio_leds(struct at91_gpio_led *leds, int nr) {} +#endif + + -+/* -------------------------------------------------------------------- -+ * TWI (i2c) -+ * -------------------------------------------------------------------- */ -+ -+#if defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE) -+ -+static struct resource twi_resources[] = { -+ [0] = { -+ .start = AT91RM9200_BASE_TWI, -+ .end = AT91RM9200_BASE_TWI + SZ_16K - 1, -+ .flags = IORESOURCE_MEM, -+ }, -+ [1] = { -+ .start = AT91RM9200_ID_TWI, -+ .end = AT91RM9200_ID_TWI, -+ .flags = IORESOURCE_IRQ, -+ }, + /* -------------------------------------------------------------------- + * UART + * -------------------------------------------------------------------- */ +diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/at91sam9261.c linux-2.6-stable/arch/arm/mach-at91/at91sam9261.c +--- linux-2.6.21/arch/arm/mach-at91/at91sam9261.c Thu Apr 26 05:08:32 2007 ++++ linux-2.6-stable/arch/arm/mach-at91/at91sam9261.c Tue May 8 12:13:30 2007 +@@ -97,6 +97,21 @@ + .pmc_mask = 1 << AT91SAM9261_ID_SPI1, + .type = CLK_TYPE_PERIPHERAL, + }; ++static struct clk ssc0_clk = { ++ .name = "ssc0_clk", ++ .pmc_mask = 1 << AT91SAM9261_ID_SSC0, ++ .type = CLK_TYPE_PERIPHERAL, +}; -+ -+static struct platform_device at91rm9200_twi_device = { -+ .name = "at91_i2c", -+ .id = -1, -+ .resource = twi_resources, -+ .num_resources = ARRAY_SIZE(twi_resources), ++static struct clk ssc1_clk = { ++ .name = "ssc1_clk", ++ .pmc_mask = 1 << AT91SAM9261_ID_SSC1, ++ .type = CLK_TYPE_PERIPHERAL, +}; -+ -+void __init at91_add_device_i2c(void) -+{ -+ /* pins used for TWI interface */ -+ at91_set_A_periph(AT91_PIN_PA25, 0); /* TWD */ -+ at91_set_multi_drive(AT91_PIN_PA25, 1); -+ -+ at91_set_A_periph(AT91_PIN_PA26, 0); /* TWCK */ -+ at91_set_multi_drive(AT91_PIN_PA26, 1); -+ -+ platform_device_register(&at91rm9200_twi_device); -+} -+#else -+void __init at91_add_device_i2c(void) {} -+#endif -+ -+ -+/* -------------------------------------------------------------------- -+ * SPI ++static struct clk ssc2_clk = { ++ .name = "ssc2_clk", ++ .pmc_mask = 1 << AT91SAM9261_ID_SSC2, ++ .type = CLK_TYPE_PERIPHERAL, ++}; + static struct clk tc0_clk = { + .name = "tc0_clk", + .pmc_mask = 1 << AT91SAM9261_ID_TC0, +@@ -135,7 +150,9 @@ + &twi_clk, + &spi0_clk, + &spi1_clk, +- // ssc 0 .. ssc2 ++ &ssc0_clk, ++ &ssc1_clk, ++ &ssc2_clk, + &tc0_clk, + &tc1_clk, + &tc2_clk, +@@ -230,6 +247,28 @@ + + + /* -------------------------------------------------------------------- ++ * Timer/Counter library initialization + * -------------------------------------------------------------------- */ ++#ifdef CONFIG_ATMEL_TCLIB + -+#if defined(CONFIG_SPI_AT91) || defined(CONFIG_SPI_AT91_MODULE) || defined(CONFIG_AT91_SPI) || defined(CONFIG_AT91_SPI_MODULE) -+static u64 spi_dmamask = 0xffffffffUL; ++#include "tclib.h" + -+static struct resource spi_resources[] = { ++static struct atmel_tcblock at91sam9261_tcblocks[] = { + [0] = { -+ .start = AT91RM9200_BASE_SPI, -+ .end = AT91RM9200_BASE_SPI + SZ_16K - 1, -+ .flags = IORESOURCE_MEM, -+ }, -+ [1] = { -+ .start = AT91RM9200_ID_SPI, -+ .end = AT91RM9200_ID_SPI, -+ .flags = IORESOURCE_IRQ, -+ }, -+}; -+ -+static struct platform_device at91rm9200_spi_device = { -+ .name = "at91_spi", -+ .id = 0, -+ .dev = { -+ .dma_mask = &spi_dmamask, -+ .coherent_dma_mask = 0xffffffff, -+ }, -+ .resource = spi_resources, -+ .num_resources = ARRAY_SIZE(spi_resources), -+}; -+ -+static const unsigned spi_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PA5, AT91_PIN_PA6 }; -+ -+void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) -+{ -+ int i; -+ unsigned long cs_pin; -+ -+ at91_set_A_periph(AT91_PIN_PA0, 0); /* MISO */ -+ at91_set_A_periph(AT91_PIN_PA1, 0); /* MOSI */ -+ at91_set_A_periph(AT91_PIN_PA2, 0); /* SPCK */ -+ -+ /* Enable SPI chip-selects */ -+ for (i = 0; i < nr_devices; i++) { -+ if (devices[i].controller_data) -+ cs_pin = (unsigned long) devices[i].controller_data; -+ else -+ cs_pin = spi_standard_cs[devices[i].chip_select]; -+ -+#ifdef CONFIG_SPI_AT91_MANUAL_CS -+ at91_set_gpio_output(cs_pin, 1); -+#else -+ at91_set_A_periph(cs_pin, 0); -+#endif -+ -+ /* pass chip-select pin to driver */ -+ devices[i].controller_data = (void *) cs_pin; ++ .physaddr = AT91SAM9261_BASE_TCB0, ++ .irq = { AT91SAM9261_ID_TC0, AT91SAM9261_ID_TC1, AT91SAM9261_ID_TC2 }, ++ .clk = { &tc0_clk, &tc1_clk, &tc2_clk }, + } -+ -+ spi_register_board_info(devices, nr_devices); -+ at91_clock_associate("spi_clk", &at91rm9200_spi_device.dev, "spi"); -+ platform_device_register(&at91rm9200_spi_device); -+} -+#else -+void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {} -+#endif -+ -+ -+/* -------------------------------------------------------------------- -+ * RTC -+ * -------------------------------------------------------------------- */ -+ -+#if defined(CONFIG_RTC_DRV_AT91RM9200) || defined(CONFIG_RTC_DRV_AT91RM9200_MODULE) -+static struct platform_device at91rm9200_rtc_device = { -+ .name = "at91_rtc", -+ .id = -1, -+ .num_resources = 0, +}; + -+static void __init at91_add_device_rtc(void) -+{ -+ platform_device_register(&at91rm9200_rtc_device); -+} -+#else -+static void __init at91_add_device_rtc(void) {} -+#endif ++#define at91sam9261_tc_init() atmel_tc_init(at91sam9261_tcblocks, ARRAY_SIZE(at91sam9261_tcblocks)) + -+ -+/* -------------------------------------------------------------------- -+ * Watchdog -+ * -------------------------------------------------------------------- */ -+ -+#if defined(CONFIG_AT91RM9200_WATCHDOG) || defined(CONFIG_AT91RM9200_WATCHDOG_MODULE) -+static struct platform_device at91rm9200_wdt_device = { -+ .name = "at91_wdt", -+ .id = -1, -+ .num_resources = 0, -+}; -+ -+static void __init at91_add_device_watchdog(void) -+{ -+ platform_device_register(&at91rm9200_wdt_device); -+} +#else -+static void __init at91_add_device_watchdog(void) {} ++#define at91sam9261_tc_init() do {} while(0) +#endif + + +/* -------------------------------------------------------------------- -+ * LEDs -+ * -------------------------------------------------------------------- */ -+ -+#if defined(CONFIG_LEDS) -+u8 at91_leds_cpu; -+u8 at91_leds_timer; -+ -+void __init at91_init_leds(u8 cpu_led, u8 timer_led) -+{ -+ at91_leds_cpu = cpu_led; -+ at91_leds_timer = timer_led; -+} -+#else -+void __init at91_init_leds(u8 cpu_led, u8 timer_led) {} -+#endif + * AT91SAM9261 processor initialization + * -------------------------------------------------------------------- */ + +@@ -250,6 +289,9 @@ + + /* Register GPIO subsystem */ + at91_gpio_init(at91sam9261_gpio, 3); + ++ /* Initialize the Timer/Counter blocks */ ++ at91sam9261_tc_init(); + } + + /* -------------------------------------------------------------------- +@@ -262,25 +304,25 @@ + static unsigned int at91sam9261_default_irq_priority[NR_AIC_IRQS] __initdata = { + 7, /* Advanced Interrupt Controller */ + 7, /* System Peripherals */ +- 0, /* Parallel IO Controller A */ +- 0, /* Parallel IO Controller B */ +- 0, /* Parallel IO Controller C */ ++ 1, /* Parallel IO Controller A */ ++ 1, /* Parallel IO Controller B */ ++ 1, /* Parallel IO Controller C */ + 0, +- 6, /* USART 0 */ +- 6, /* USART 1 */ +- 6, /* USART 2 */ ++ 5, /* USART 0 */ ++ 5, /* USART 1 */ ++ 5, /* USART 2 */ + 0, /* Multimedia Card Interface */ +- 4, /* USB Device Port */ +- 0, /* Two-Wire Interface */ +- 6, /* Serial Peripheral Interface 0 */ +- 6, /* Serial Peripheral Interface 1 */ +- 5, /* Serial Synchronous Controller 0 */ +- 5, /* Serial Synchronous Controller 1 */ +- 5, /* Serial Synchronous Controller 2 */ ++ 2, /* USB Device Port */ ++ 6, /* Two-Wire Interface */ ++ 5, /* Serial Peripheral Interface 0 */ ++ 5, /* Serial Peripheral Interface 1 */ ++ 4, /* Serial Synchronous Controller 0 */ ++ 4, /* Serial Synchronous Controller 1 */ ++ 4, /* Serial Synchronous Controller 2 */ + 0, /* Timer Counter 0 */ + 0, /* Timer Counter 1 */ + 0, /* Timer Counter 2 */ +- 3, /* USB Host port */ ++ 2, /* USB Host port */ + 3, /* LCD Controller */ + 0, + 0, +diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/at91sam9261_devices.c linux-2.6-stable/arch/arm/mach-at91/at91sam9261_devices.c +--- linux-2.6.21/arch/arm/mach-at91/at91sam9261_devices.c Thu Apr 26 05:08:32 2007 ++++ linux-2.6-stable/arch/arm/mach-at91/at91sam9261_devices.c Tue May 8 12:56:33 2007 +@@ -14,6 +14,9 @@ + #include <asm/mach/map.h> + + #include <linux/platform_device.h> ++#include <linux/fb.h> + ++#include <video/atmel_lcdc.h> + + #include <asm/arch/board.h> + #include <asm/arch/gpio.h> +@@ -430,9 +433,9 @@ + * LCD Controller + * -------------------------------------------------------------------- */ + +-#if defined(CONFIG_FB_AT91) || defined(CONFIG_FB_AT91_MODULE) ++#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE) + static u64 lcdc_dmamask = 0xffffffffUL; +-static struct at91fb_info lcdc_data; ++static struct atmel_lcdfb_info lcdc_data; + + static struct resource lcdc_resources[] = { + [0] = { +@@ -455,7 +458,7 @@ + }; + + static struct platform_device at91_lcdc_device = { +- .name = "at91-fb", ++ .name = "atmel_lcdfb", + .id = 0, + .dev = { + .dma_mask = &lcdc_dmamask, +@@ -466,7 +469,7 @@ + .num_resources = ARRAY_SIZE(lcdc_resources), + }; + +-void __init at91_add_device_lcdc(struct at91fb_info *data) ++void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) + { + if (!data) { + return; +@@ -499,7 +502,7 @@ + platform_device_register(&at91_lcdc_device); + } + #else +-void __init at91_add_device_lcdc(struct at91fb_info *data) {} ++void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {} + #endif + + +@@ -525,6 +528,32 @@ + #endif + + +#if defined(CONFIG_NEW_LEDS) + +static struct platform_device at91_leds = { @@ -3008,7 +698,7 @@ diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/at91rm9200_devices. + leds->index = nr; /* first record stores number of leds */ + at91_set_gpio_output(leds->gpio, (leds->flags & 1) == 0); + } -+ ++ + platform_device_register(&at91_leds); +} +#else @@ -3016,1125 +706,386 @@ diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/at91rm9200_devices. +#endif + + -+/* -------------------------------------------------------------------- -+ * UART -+ * -------------------------------------------------------------------- */ -+ -+#if defined(CONFIG_SERIAL_ATMEL) -+static struct resource dbgu_resources[] = { -+ [0] = { -+ .start = AT91_VA_BASE_SYS + AT91_DBGU, -+ .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1, -+ .flags = IORESOURCE_MEM, -+ }, -+ [1] = { -+ .start = AT91_ID_SYS, -+ .end = AT91_ID_SYS, -+ .flags = IORESOURCE_IRQ, -+ }, -+}; -+ -+static struct atmel_uart_data dbgu_data = { -+ .use_dma_tx = 0, -+ .use_dma_rx = 0, /* DBGU not capable of receive DMA */ -+ .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU), -+}; -+ -+static struct platform_device at91rm9200_dbgu_device = { -+ .name = "atmel_usart", -+ .id = 0, -+ .dev = { -+ .platform_data = &dbgu_data, -+ .coherent_dma_mask = 0xffffffff, -+ }, -+ .resource = dbgu_resources, -+ .num_resources = ARRAY_SIZE(dbgu_resources), -+}; -+ -+static inline void configure_dbgu_pins(void) -+{ -+ at91_set_A_periph(AT91_PIN_PA30, 0); /* DRXD */ -+ at91_set_A_periph(AT91_PIN_PA31, 1); /* DTXD */ -+} -+ -+static struct resource uart0_resources[] = { -+ [0] = { -+ .start = AT91RM9200_BASE_US0, -+ .end = AT91RM9200_BASE_US0 + SZ_16K - 1, -+ .flags = IORESOURCE_MEM, -+ }, -+ [1] = { -+ .start = AT91RM9200_ID_US0, -+ .end = AT91RM9200_ID_US0, -+ .flags = IORESOURCE_IRQ, -+ }, -+}; -+ -+static struct atmel_uart_data uart0_data = { -+ .use_dma_tx = 1, -+ .use_dma_rx = 1, -+}; -+ -+static struct platform_device at91rm9200_uart0_device = { -+ .name = "atmel_usart", -+ .id = 1, -+ .dev = { -+ .platform_data = &uart0_data, -+ .coherent_dma_mask = 0xffffffff, -+ }, -+ .resource = uart0_resources, -+ .num_resources = ARRAY_SIZE(uart0_resources), -+}; -+ -+static inline void configure_usart0_pins(void) -+{ -+ at91_set_A_periph(AT91_PIN_PA17, 1); /* TXD0 */ -+ at91_set_A_periph(AT91_PIN_PA18, 0); /* RXD0 */ -+ at91_set_A_periph(AT91_PIN_PA20, 0); /* CTS0 */ -+ -+ /* -+ * AT91RM9200 Errata #39 - RTS0 is not internally connected to PA21. -+ * We need to drive the pin manually. Default is off (RTS is active low). -+ */ -+ at91_set_gpio_output(AT91_PIN_PA21, 1); -+} -+ -+static struct resource uart1_resources[] = { -+ [0] = { -+ .start = AT91RM9200_BASE_US1, -+ .end = AT91RM9200_BASE_US1 + SZ_16K - 1, -+ .flags = IORESOURCE_MEM, -+ }, -+ [1] = { -+ .start = AT91RM9200_ID_US1, -+ .end = AT91RM9200_ID_US1, -+ .flags = IORESOURCE_IRQ, -+ }, -+}; -+ -+static struct atmel_uart_data uart1_data = { -+ .use_dma_tx = 1, -+ .use_dma_rx = 1, -+}; -+ -+static struct platform_device at91rm9200_uart1_device = { -+ .name = "atmel_usart", -+ .id = 2, -+ .dev = { -+ .platform_data = &uart1_data, -+ .coherent_dma_mask = 0xffffffff, -+ }, -+ .resource = uart1_resources, -+ .num_resources = ARRAY_SIZE(uart1_resources), -+}; -+ -+static inline void configure_usart1_pins(void) -+{ -+ at91_set_A_periph(AT91_PIN_PB18, 0); /* RI1 */ -+ at91_set_A_periph(AT91_PIN_PB19, 0); /* DTR1 */ -+ at91_set_A_periph(AT91_PIN_PB20, 1); /* TXD1 */ -+ at91_set_A_periph(AT91_PIN_PB21, 0); /* RXD1 */ -+ at91_set_A_periph(AT91_PIN_PB23, 0); /* DCD1 */ -+ at91_set_A_periph(AT91_PIN_PB24, 0); /* CTS1 */ -+ at91_set_A_periph(AT91_PIN_PB25, 0); /* DSR1 */ -+ at91_set_A_periph(AT91_PIN_PB26, 0); /* RTS1 */ -+} -+ -+static struct resource uart2_resources[] = { -+ [0] = { -+ .start = AT91RM9200_BASE_US2, -+ .end = AT91RM9200_BASE_US2 + SZ_16K - 1, -+ .flags = IORESOURCE_MEM, -+ }, -+ [1] = { -+ .start = AT91RM9200_ID_US2, -+ .end = AT91RM9200_ID_US2, -+ .flags = IORESOURCE_IRQ, -+ }, -+}; -+ -+static struct atmel_uart_data uart2_data = { -+ .use_dma_tx = 1, -+ .use_dma_rx = 1, -+}; -+ -+static struct platform_device at91rm9200_uart2_device = { -+ .name = "atmel_usart", -+ .id = 3, -+ .dev = { -+ .platform_data = &uart2_data, -+ .coherent_dma_mask = 0xffffffff, -+ }, -+ .resource = uart2_resources, -+ .num_resources = ARRAY_SIZE(uart2_resources), -+}; -+ -+static inline void configure_usart2_pins(void) -+{ -+ at91_set_A_periph(AT91_PIN_PA22, 0); /* RXD2 */ -+ at91_set_A_periph(AT91_PIN_PA23, 1); /* TXD2 */ -+} -+ -+static struct resource uart3_resources[] = { -+ [0] = { -+ .start = AT91RM9200_BASE_US3, -+ .end = AT91RM9200_BASE_US3 + SZ_16K - 1, -+ .flags = IORESOURCE_MEM, -+ }, -+ [1] = { -+ .start = AT91RM9200_ID_US3, -+ .end = AT91RM9200_ID_US3, -+ .flags = IORESOURCE_IRQ, -+ }, -+}; -+ -+static struct atmel_uart_data uart3_data = { -+ .use_dma_tx = 1, -+ .use_dma_rx = 1, -+}; -+ -+static struct platform_device at91rm9200_uart3_device = { -+ .name = "atmel_usart", -+ .id = 4, -+ .dev = { -+ .platform_data = &uart3_data, -+ .coherent_dma_mask = 0xffffffff, -+ }, -+ .resource = uart3_resources, -+ .num_resources = ARRAY_SIZE(uart3_resources), -+}; -+ -+static inline void configure_usart3_pins(void) -+{ -+ at91_set_B_periph(AT91_PIN_PA5, 1); /* TXD3 */ -+ at91_set_B_periph(AT91_PIN_PA6, 0); /* RXD3 */ -+} -+ -+struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */ -+struct platform_device *atmel_default_console_device; /* the serial console device */ -+ -+void __init at91_init_serial(struct at91_uart_config *config) -+{ -+ int i; -+ -+ /* Fill in list of supported UARTs */ -+ for (i = 0; i < config->nr_tty; i++) { -+ switch (config->tty_map[i]) { -+ case 0: -+ configure_usart0_pins(); -+ at91_uarts[i] = &at91rm9200_uart0_device; -+ at91_clock_associate("usart0_clk", &at91rm9200_uart0_device.dev, "usart"); -+ break; -+ case 1: -+ configure_usart1_pins(); -+ at91_uarts[i] = &at91rm9200_uart1_device; -+ at91_clock_associate("usart1_clk", &at91rm9200_uart1_device.dev, "usart"); -+ break; -+ case 2: -+ configure_usart2_pins(); -+ at91_uarts[i] = &at91rm9200_uart2_device; -+ at91_clock_associate("usart2_clk", &at91rm9200_uart2_device.dev, "usart"); -+ break; -+ case 3: -+ configure_usart3_pins(); -+ at91_uarts[i] = &at91rm9200_uart3_device; -+ at91_clock_associate("usart3_clk", &at91rm9200_uart3_device.dev, "usart"); -+ break; -+ case 4: -+ configure_dbgu_pins(); -+ at91_uarts[i] = &at91rm9200_dbgu_device; -+ at91_clock_associate("mck", &at91rm9200_dbgu_device.dev, "usart"); -+ break; -+ default: -+ continue; -+ } -+ at91_uarts[i]->id = i; /* update ID number to mapped ID */ -+ } -+ -+ /* Set serial console device */ -+ if (config->console_tty < ATMEL_MAX_UART) -+ atmel_default_console_device = at91_uarts[config->console_tty]; -+ if (!atmel_default_console_device) -+ printk(KERN_INFO "AT91: No default serial console defined.\n"); -+} -+ -+void __init at91_add_device_serial(void) -+{ -+ int i; -+ -+ for (i = 0; i < ATMEL_MAX_UART; i++) { -+ if (at91_uarts[i]) -+ platform_device_register(at91_uarts[i]); -+ } -+} -+#else -+void __init at91_init_serial(struct at91_uart_config *config) {} -+void __init at91_add_device_serial(void) {} -+#endif -+ -+ -+/* -------------------------------------------------------------------- */ -+ -+/* -+ * These devices are always present and don't need any board-specific -+ * setup. -+ */ -+static int __init at91_add_standard_devices(void) -+{ -+ at91_add_device_rtc(); -+ at91_add_device_watchdog(); -+ return 0; -+} -+ -+arch_initcall(at91_add_standard_devices); -diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/at91rm9200_time.c linux-2.6.19/arch/arm/mach-at91rm9200/at91rm9200_time.c ---- linux-2.6.19-final/arch/arm/mach-at91rm9200/at91rm9200_time.c Mon Dec 4 16:39:29 2006 -+++ linux-2.6.19/arch/arm/mach-at91rm9200/at91rm9200_time.c Thu Nov 16 11:41:09 2006 -@@ -30,6 +30,8 @@ - #include <asm/io.h> - #include <asm/mach/time.h> - -+#include <asm/arch/at91_st.h> -+ - static unsigned long last_crtr; - - /* -@@ -99,6 +101,9 @@ - /* Set Period Interval timer */ - at91_sys_write(AT91_ST_PIMR, LATCH); - -+ /* Clear any pending interrupts */ -+ (void) at91_sys_read(AT91_ST_SR); -+ - /* Enable Period Interval Timer interrupt */ - at91_sys_write(AT91_ST_IER, AT91_ST_PITS); - } -diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/at91sam9260.c linux-2.6.19/arch/arm/mach-at91rm9200/at91sam9260.c ---- linux-2.6.19-final/arch/arm/mach-at91rm9200/at91sam9260.c Thu Jan 1 02:00:00 1970 -+++ linux-2.6.19/arch/arm/mach-at91rm9200/at91sam9260.c Mon Nov 20 10:52:16 2006 -@@ -0,0 +1,294 @@ -+/* -+ * arch/arm/mach-at91rm9200/at91sam9260.c -+ * -+ * Copyright (C) 2006 SAN People -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ */ -+ -+#include <linux/module.h> -+ -+#include <asm/mach/arch.h> -+#include <asm/mach/map.h> -+#include <asm/arch/at91sam9260.h> -+#include <asm/arch/at91_pmc.h> -+ -+#include "generic.h" -+#include "clock.h" -+ -+static struct map_desc at91sam9260_io_desc[] __initdata = { -+ { -+ .virtual = AT91_VA_BASE_SYS, -+ .pfn = __phys_to_pfn(AT91_BASE_SYS), -+ .length = SZ_16K, -+ .type = MT_DEVICE, -+ }, { -+ .virtual = AT91_IO_VIRT_BASE - AT91SAM9260_SRAM0_SIZE, -+ .pfn = __phys_to_pfn(AT91SAM9260_SRAM0_BASE), -+ .length = AT91SAM9260_SRAM0_SIZE, -+ .type = MT_DEVICE, -+ }, { -+ .virtual = AT91_IO_VIRT_BASE - AT91SAM9260_SRAM0_SIZE - AT91SAM9260_SRAM1_SIZE, -+ .pfn = __phys_to_pfn(AT91SAM9260_SRAM1_BASE), -+ .length = AT91SAM9260_SRAM1_SIZE, -+ .type = MT_DEVICE, -+ }, -+}; -+ -+/* -------------------------------------------------------------------- -+ * Clocks -+ * -------------------------------------------------------------------- */ -+ -+/* -+ * The peripheral clocks. -+ */ -+static struct clk pioA_clk = { -+ .name = "pioA_clk", -+ .pmc_mask = 1 << AT91SAM9260_ID_PIOA, -+ .type = CLK_TYPE_PERIPHERAL, -+}; -+static struct clk pioB_clk = { -+ .name = "pioB_clk", -+ .pmc_mask = 1 << AT91SAM9260_ID_PIOB, -+ .type = CLK_TYPE_PERIPHERAL, -+}; -+static struct clk pioC_clk = { -+ .name = "pioC_clk", -+ .pmc_mask = 1 << AT91SAM9260_ID_PIOC, -+ .type = CLK_TYPE_PERIPHERAL, -+}; -+static struct clk adc_clk = { -+ .name = "adc_clk", -+ .pmc_mask = 1 << AT91SAM9260_ID_ADC, -+ .type = CLK_TYPE_PERIPHERAL, -+}; -+static struct clk usart0_clk = { -+ .name = "usart0_clk", -+ .pmc_mask = 1 << AT91SAM9260_ID_US0, -+ .type = CLK_TYPE_PERIPHERAL, -+}; -+static struct clk usart1_clk = { -+ .name = "usart1_clk", -+ .pmc_mask = 1 << AT91SAM9260_ID_US1, -+ .type = CLK_TYPE_PERIPHERAL, -+}; -+static struct clk usart2_clk = { -+ .name = "usart2_clk", -+ .pmc_mask = 1 << AT91SAM9260_ID_US2, -+ .type = CLK_TYPE_PERIPHERAL, -+}; -+static struct clk mmc_clk = { -+ .name = "mci_clk", -+ .pmc_mask = 1 << AT91SAM9260_ID_MCI, -+ .type = CLK_TYPE_PERIPHERAL, -+}; -+static struct clk udc_clk = { -+ .name = "udc_clk", -+ .pmc_mask = 1 << AT91SAM9260_ID_UDP, -+ .type = CLK_TYPE_PERIPHERAL, -+}; -+static struct clk twi_clk = { -+ .name = "twi_clk", -+ .pmc_mask = 1 << AT91SAM9260_ID_TWI, -+ .type = CLK_TYPE_PERIPHERAL, -+}; -+static struct clk spi0_clk = { -+ .name = "spi0_clk", -+ .pmc_mask = 1 << AT91SAM9260_ID_SPI0, -+ .type = CLK_TYPE_PERIPHERAL, -+}; -+static struct clk spi1_clk = { -+ .name = "spi1_clk", -+ .pmc_mask = 1 << AT91SAM9260_ID_SPI1, + /* -------------------------------------------------------------------- + * UART + * -------------------------------------------------------------------- */ +diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/at91sam9263.c linux-2.6-stable/arch/arm/mach-at91/at91sam9263.c +--- linux-2.6.21/arch/arm/mach-at91/at91sam9263.c Thu Apr 26 05:08:32 2007 ++++ linux-2.6-stable/arch/arm/mach-at91/at91sam9263.c Tue May 8 12:13:30 2007 +@@ -87,6 +87,11 @@ + .pmc_mask = 1 << AT91SAM9263_ID_MCI1, + .type = CLK_TYPE_PERIPHERAL, + }; ++static struct clk can_clk = { ++ .name = "can_clk", ++ .pmc_mask = 1 << AT91SAM9263_ID_CAN, + .type = CLK_TYPE_PERIPHERAL, +}; -+static struct clk ohci_clk = { -+ .name = "ohci_clk", -+ .pmc_mask = 1 << AT91SAM9260_ID_UHP, + static struct clk twi_clk = { + .name = "twi_clk", + .pmc_mask = 1 << AT91SAM9263_ID_TWI, +@@ -102,16 +107,46 @@ + .pmc_mask = 1 << AT91SAM9263_ID_SPI1, + .type = CLK_TYPE_PERIPHERAL, + }; ++static struct clk ssc0_clk = { ++ .name = "ssc0_clk", ++ .pmc_mask = 1 << AT91SAM9263_ID_SSC0, + .type = CLK_TYPE_PERIPHERAL, +}; -+static struct clk ether_clk = { -+ .name = "ether_clk", -+ .pmc_mask = 1 << AT91SAM9260_ID_EMAC, ++static struct clk ssc1_clk = { ++ .name = "ssc1_clk", ++ .pmc_mask = 1 << AT91SAM9263_ID_SSC1, + .type = CLK_TYPE_PERIPHERAL, +}; -+static struct clk isi_clk = { -+ .name = "isi_clk", -+ .pmc_mask = 1 << AT91SAM9260_ID_ISI, ++static struct clk ac97_clk = { ++ .name = "ac97_clk", ++ .pmc_mask = 1 << AT91SAM9263_ID_AC97C, + .type = CLK_TYPE_PERIPHERAL, +}; -+static struct clk usart3_clk = { -+ .name = "usart3_clk", -+ .pmc_mask = 1 << AT91SAM9260_ID_US3, + static struct clk tcb_clk = { + .name = "tcb_clk", + .pmc_mask = 1 << AT91SAM9263_ID_TCB, + .type = CLK_TYPE_PERIPHERAL, + }; ++static struct clk pwmc_clk = { ++ .name = "pwmc_clk", ++ .pmc_mask = 1 << AT91SAM9263_ID_PWMC, + .type = CLK_TYPE_PERIPHERAL, +}; -+static struct clk usart4_clk = { -+ .name = "usart4_clk", -+ .pmc_mask = 1 << AT91SAM9260_ID_US4, + static struct clk macb_clk = { + .name = "macb_clk", + .pmc_mask = 1 << AT91SAM9263_ID_EMAC, + .type = CLK_TYPE_PERIPHERAL, + }; ++static struct clk dma_clk = { ++ .name = "dma_clk", ++ .pmc_mask = 1 << AT91SAM9263_ID_DMA, + .type = CLK_TYPE_PERIPHERAL, +}; -+static struct clk usart5_clk = { -+ .name = "usart5_clk", -+ .pmc_mask = 1 << AT91SAM9260_ID_US5, ++static struct clk twodge_clk = { ++ .name = "2dge_clk", ++ .pmc_mask = 1 << AT91SAM9263_ID_2DGE, + .type = CLK_TYPE_PERIPHERAL, +}; -+ -+static struct clk *periph_clocks[] __initdata = { -+ &pioA_clk, -+ &pioB_clk, -+ &pioC_clk, -+ &adc_clk, -+ &usart0_clk, -+ &usart1_clk, -+ &usart2_clk, -+ &mmc_clk, -+ &udc_clk, -+ &twi_clk, -+ &spi0_clk, -+ &spi1_clk, -+ // ssc -+ // tc0 .. tc2 -+ &ohci_clk, -+ ðer_clk, -+ &isi_clk, -+ &usart3_clk, -+ &usart4_clk, -+ &usart5_clk, -+ // tc3 .. tc5 -+ // irq0 .. irq2 -+}; -+ -+/* -+ * The two programmable clocks. -+ * You must configure pin multiplexing to bring these signals out. -+ */ -+static struct clk pck0 = { -+ .name = "pck0", -+ .pmc_mask = AT91_PMC_PCK0, -+ .type = CLK_TYPE_PROGRAMMABLE, -+ .id = 0, -+}; -+static struct clk pck1 = { -+ .name = "pck1", -+ .pmc_mask = AT91_PMC_PCK1, -+ .type = CLK_TYPE_PROGRAMMABLE, -+ .id = 1, -+}; -+ -+static void __init at91sam9260_register_clocks(void) -+{ -+ int i; -+ -+ for (i = 0; i < ARRAY_SIZE(periph_clocks); i++) -+ clk_register(periph_clocks[i]); -+ -+ clk_register(&pck0); -+ clk_register(&pck1); -+} -+ -+/* -------------------------------------------------------------------- -+ * GPIO -+ * -------------------------------------------------------------------- */ -+ -+static struct at91_gpio_bank at91sam9260_gpio[] = { -+ { -+ .id = AT91SAM9260_ID_PIOA, -+ .offset = AT91_PIOA, -+ .clock = &pioA_clk, -+ }, { -+ .id = AT91SAM9260_ID_PIOB, -+ .offset = AT91_PIOB, -+ .clock = &pioB_clk, -+ }, { -+ .id = AT91SAM9260_ID_PIOC, -+ .offset = AT91_PIOC, -+ .clock = &pioC_clk, -+ } -+}; -+ -+static void at91sam9260_reset(void) -+{ -+#warning "Implement CPU reset" -+} -+ -+ -+/* -------------------------------------------------------------------- -+ * AT91SAM9260 processor initialization -+ * -------------------------------------------------------------------- */ -+ -+void __init at91sam9260_initialize(unsigned long main_clock) -+{ -+ /* Map peripherals */ -+ iotable_init(at91sam9260_io_desc, ARRAY_SIZE(at91sam9260_io_desc)); -+ -+ at91_arch_reset = at91sam9260_reset; -+ at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1) -+ | (1 << AT91SAM9260_ID_IRQ2); -+ -+ /* Init clock subsystem */ -+ at91_clock_init(main_clock); -+ -+ /* Register the processor-specific clocks */ -+ at91sam9260_register_clocks(); -+ -+ /* Register GPIO subsystem */ -+ at91_gpio_init(at91sam9260_gpio, 3); -+} -+ -+/* -------------------------------------------------------------------- -+ * Interrupt initialization -+ * -------------------------------------------------------------------- */ -+ -+/* -+ * The default interrupt priority levels (0 = lowest, 7 = highest). -+ */ -+static unsigned int at91sam9260_default_irq_priority[NR_AIC_IRQS] __initdata = { -+ 7, /* Advanced Interrupt Controller */ -+ 7, /* System Peripherals */ -+ 0, /* Parallel IO Controller A */ -+ 0, /* Parallel IO Controller B */ -+ 0, /* Parallel IO Controller C */ -+ 0, /* Analog-to-Digital Converter */ -+ 6, /* USART 0 */ -+ 6, /* USART 1 */ -+ 6, /* USART 2 */ -+ 0, /* Multimedia Card Interface */ -+ 4, /* USB Device Port */ -+ 0, /* Two-Wire Interface */ -+ 6, /* Serial Peripheral Interface 0 */ -+ 6, /* Serial Peripheral Interface 1 */ -+ 5, /* Serial Synchronous Controller */ -+ 0, -+ 0, -+ 0, /* Timer Counter 0 */ -+ 0, /* Timer Counter 1 */ -+ 0, /* Timer Counter 2 */ -+ 3, /* USB Host port */ -+ 3, /* Ethernet */ -+ 0, /* Image Sensor Interface */ -+ 6, /* USART 3 */ -+ 6, /* USART 4 */ -+ 6, /* USART 5 */ -+ 0, /* Timer Counter 3 */ -+ 0, /* Timer Counter 4 */ -+ 0, /* Timer Counter 5 */ -+ 0, /* Advanced Interrupt Controller */ -+ 0, /* Advanced Interrupt Controller */ -+ 0, /* Advanced Interrupt Controller */ -+}; -+ -+void __init at91sam9260_init_interrupts(unsigned int priority[NR_AIC_IRQS]) -+{ -+ if (!priority) -+ priority = at91sam9260_default_irq_priority; -+ -+ /* Initialize the AIC interrupt controller */ -+ at91_aic_init(priority); -+ -+ /* Enable GPIO interrupts */ -+ at91_gpio_irq_setup(); -+} -diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/at91sam9260_devices.c linux-2.6.19/arch/arm/mach-at91rm9200/at91sam9260_devices.c ---- linux-2.6.19-final/arch/arm/mach-at91rm9200/at91sam9260_devices.c Thu Jan 1 02:00:00 1970 -+++ linux-2.6.19/arch/arm/mach-at91rm9200/at91sam9260_devices.c Thu Nov 23 16:37:24 2006 -@@ -0,0 +1,892 @@ -+/* -+ * arch/arm/mach-at91rm9200/at91sam9260_devices.c -+ * -+ * Copyright (C) 2006 Atmel -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ */ -+#include <asm/mach/arch.h> -+#include <asm/mach/map.h> -+ -+#include <linux/platform_device.h> -+ -+#include <asm/arch/board.h> -+#include <asm/arch/gpio.h> -+#include <asm/arch/at91sam9260.h> -+#include <asm/arch/at91sam926x_mc.h> -+ -+#include "generic.h" -+ -+#define SZ_512 0x00000200 -+#define SZ_256 0x00000100 -+#define SZ_16 0x00000010 -+ -+/* -------------------------------------------------------------------- -+ * USB Host -+ * -------------------------------------------------------------------- */ -+ -+#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) -+static u64 ohci_dmamask = 0xffffffffUL; -+static struct at91_usbh_data usbh_data; -+ -+static struct resource usbh_resources[] = { -+ [0] = { -+ .start = AT91SAM9260_UHP_BASE, -+ .end = AT91SAM9260_UHP_BASE + SZ_1M - 1, -+ .flags = IORESOURCE_MEM, -+ }, -+ [1] = { -+ .start = AT91SAM9260_ID_UHP, -+ .end = AT91SAM9260_ID_UHP, -+ .flags = IORESOURCE_IRQ, -+ }, -+}; -+ -+static struct platform_device at91_usbh_device = { -+ .name = "at91_ohci", -+ .id = -1, -+ .dev = { -+ .dma_mask = &ohci_dmamask, -+ .coherent_dma_mask = 0xffffffff, -+ .platform_data = &usbh_data, -+ }, -+ .resource = usbh_resources, -+ .num_resources = ARRAY_SIZE(usbh_resources), -+}; -+ -+void __init at91_add_device_usbh(struct at91_usbh_data *data) -+{ -+ if (!data) -+ return; -+ -+ usbh_data = *data; -+ platform_device_register(&at91_usbh_device); -+} -+#else -+void __init at91_add_device_usbh(struct at91_usbh_data *data) {} -+#endif -+ -+ -+/* -------------------------------------------------------------------- -+ * USB Device (Gadget) + static struct clk udc_clk = { + .name = "udc_clk", + .pmc_mask = 1 << AT91SAM9263_ID_UDP, +@@ -142,20 +177,21 @@ + &usart2_clk, + &mmc0_clk, + &mmc1_clk, +- // can ++ &can_clk, + &twi_clk, + &spi0_clk, + &spi1_clk, +- // ssc0 .. ssc1 +- // ac97 ++ &ssc0_clk, ++ &ssc1_clk, ++ &ac97_clk, + &tcb_clk, +- // pwmc ++ &pwmc_clk, + &macb_clk, +- // 2dge ++ &twodge_clk, + &udc_clk, + &isi_clk, + &lcdc_clk, +- // dma ++ &dma_clk, + &ohci_clk, + // irq0 .. irq1 + }; +@@ -237,6 +273,28 @@ + + + /* -------------------------------------------------------------------- ++ * Timer/Counter library initialization + * -------------------------------------------------------------------- */ ++#ifdef CONFIG_ATMEL_TCLIB + -+#ifdef CONFIG_USB_GADGET_AT91 -+static struct at91_udc_data udc_data; ++#include "tclib.h" + -+static struct resource udc_resources[] = { ++static struct atmel_tcblock at91sam9263_tcblocks[] = { + [0] = { -+ .start = AT91SAM9260_BASE_UDP, -+ .end = AT91SAM9260_BASE_UDP + SZ_16K - 1, -+ .flags = IORESOURCE_MEM, -+ }, -+ [1] = { -+ .start = AT91SAM9260_ID_UDP, -+ .end = AT91SAM9260_ID_UDP, -+ .flags = IORESOURCE_IRQ, -+ }, -+}; -+ -+static struct platform_device at91_udc_device = { -+ .name = "at91_udc", -+ .id = -1, -+ .dev = { -+ .platform_data = &udc_data, -+ }, -+ .resource = udc_resources, -+ .num_resources = ARRAY_SIZE(udc_resources), -+}; -+ -+void __init at91_add_device_udc(struct at91_udc_data *data) -+{ -+ if (!data) -+ return; -+ -+ if (data->vbus_pin) { -+ at91_set_gpio_input(data->vbus_pin, 0); -+ at91_set_deglitch(data->vbus_pin, 1); ++ .physaddr = AT91SAM9263_BASE_TCB0, ++ .irq = { AT91SAM9263_ID_TCB, AT91SAM9263_ID_TCB, AT91SAM9263_ID_TCB }, ++ .clk = { &tcb_clk, &tcb_clk, &tcb_clk }, + } ++}; + -+ /* Pullup pin is handled internally by USB device peripheral */ ++#define at91sam9263_tc_init() atmel_tc_init(at91sam9263_tcblocks, ARRAY_SIZE(at91sam9263_tcblocks)) + -+ udc_data = *data; -+ platform_device_register(&at91_udc_device); -+} +#else -+void __init at91_add_device_udc(struct at91_udc_data *data) {} ++#define at91sam9263_tc_init() do {} while(0) +#endif + + +/* -------------------------------------------------------------------- -+ * Ethernet -+ * -------------------------------------------------------------------- */ -+ -+#if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE) -+static u64 eth_dmamask = 0xffffffffUL; -+static struct eth_platform_data eth_data; -+ -+static struct resource eth_resources[] = { -+ [0] = { -+ .start = AT91SAM9260_BASE_EMAC, -+ .end = AT91SAM9260_BASE_EMAC + SZ_16K - 1, -+ .flags = IORESOURCE_MEM, -+ }, -+ [1] = { -+ .start = AT91SAM9260_ID_EMAC, -+ .end = AT91SAM9260_ID_EMAC, -+ .flags = IORESOURCE_IRQ, -+ }, -+}; -+ -+static struct platform_device at91sam9260_eth_device = { -+ .name = "macb", -+ .id = -1, -+ .dev = { -+ .dma_mask = ð_dmamask, -+ .coherent_dma_mask = 0xffffffff, -+ .platform_data = ð_data, -+ }, -+ .resource = eth_resources, -+ .num_resources = ARRAY_SIZE(eth_resources), -+}; -+ -+void __init at91_add_device_eth(struct eth_platform_data *data) -+{ -+ if (!data) -+ return; -+ -+ if (data->phy_irq_pin) { -+ at91_set_gpio_input(data->phy_irq_pin, 0); -+ at91_set_deglitch(data->phy_irq_pin, 1); -+ } -+ -+ /* Pins used for MII and RMII */ -+ at91_set_A_periph(AT91_PIN_PA19, 0); /* ETXCK_EREFCK */ -+ at91_set_A_periph(AT91_PIN_PA17, 0); /* ERXDV */ -+ at91_set_A_periph(AT91_PIN_PA14, 0); /* ERX0 */ -+ at91_set_A_periph(AT91_PIN_PA15, 0); /* ERX1 */ -+ at91_set_A_periph(AT91_PIN_PA18, 0); /* ERXER */ -+ at91_set_A_periph(AT91_PIN_PA16, 0); /* ETXEN */ -+ at91_set_A_periph(AT91_PIN_PA12, 0); /* ETX0 */ -+ at91_set_A_periph(AT91_PIN_PA13, 0); /* ETX1 */ -+ at91_set_A_periph(AT91_PIN_PA21, 0); /* EMDIO */ -+ at91_set_A_periph(AT91_PIN_PA20, 0); /* EMDC */ -+ -+ if (!data->is_rmii) { -+ at91_set_B_periph(AT91_PIN_PA28, 0); /* ECRS */ -+ at91_set_B_periph(AT91_PIN_PA29, 0); /* ECOL */ -+ at91_set_B_periph(AT91_PIN_PA25, 0); /* ERX2 */ -+ at91_set_B_periph(AT91_PIN_PA26, 0); /* ERX3 */ -+ at91_set_B_periph(AT91_PIN_PA27, 0); /* ERXCK */ -+ at91_set_B_periph(AT91_PIN_PA23, 0); /* ETX2 */ -+ at91_set_B_periph(AT91_PIN_PA24, 0); /* ETX3 */ -+ at91_set_B_periph(AT91_PIN_PA22, 0); /* ETXER */ -+ } -+ -+ eth_data = *data; -+ platform_device_register(&at91sam9260_eth_device); -+} -+#else -+void __init at91_add_device_eth(struct eth_platform_data *data) {} -+#endif + * AT91SAM9263 processor initialization + * -------------------------------------------------------------------- */ + +@@ -256,6 +314,9 @@ + + /* Register GPIO subsystem */ + at91_gpio_init(at91sam9263_gpio, 5); + ++ /* Initialize the Timer/Counter blocks */ ++ at91sam9263_tc_init(); + } + + /* -------------------------------------------------------------------- +@@ -268,34 +329,34 @@ + static unsigned int at91sam9263_default_irq_priority[NR_AIC_IRQS] __initdata = { + 7, /* Advanced Interrupt Controller (FIQ) */ + 7, /* System Peripherals */ +- 0, /* Parallel IO Controller A */ +- 0, /* Parallel IO Controller B */ +- 0, /* Parallel IO Controller C, D and E */ ++ 1, /* Parallel IO Controller A */ ++ 1, /* Parallel IO Controller B */ ++ 1, /* Parallel IO Controller C, D and E */ + 0, + 0, +- 6, /* USART 0 */ +- 6, /* USART 1 */ +- 6, /* USART 2 */ ++ 5, /* USART 0 */ ++ 5, /* USART 1 */ ++ 5, /* USART 2 */ + 0, /* Multimedia Card Interface 0 */ + 0, /* Multimedia Card Interface 1 */ +- 4, /* CAN */ +- 0, /* Two-Wire Interface */ +- 6, /* Serial Peripheral Interface 0 */ +- 6, /* Serial Peripheral Interface 1 */ +- 5, /* Serial Synchronous Controller 0 */ +- 5, /* Serial Synchronous Controller 1 */ +- 6, /* AC97 Controller */ ++ 3, /* CAN */ ++ 6, /* Two-Wire Interface */ ++ 5, /* Serial Peripheral Interface 0 */ ++ 5, /* Serial Peripheral Interface 1 */ ++ 4, /* Serial Synchronous Controller 0 */ ++ 4, /* Serial Synchronous Controller 1 */ ++ 5, /* AC97 Controller */ + 0, /* Timer Counter 0, 1 and 2 */ + 0, /* Pulse Width Modulation Controller */ + 3, /* Ethernet */ + 0, + 0, /* 2D Graphic Engine */ +- 3, /* USB Device Port */ ++ 2, /* USB Device Port */ + 0, /* Image Sensor Interface */ + 3, /* LDC Controller */ + 0, /* DMA Controller */ + 0, +- 3, /* USB Host port */ ++ 2, /* USB Host port */ + 0, /* Advanced Interrupt Controller (IRQ0) */ + 0, /* Advanced Interrupt Controller (IRQ1) */ + }; +diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/at91sam9263_devices.c linux-2.6-stable/arch/arm/mach-at91/at91sam9263_devices.c +--- linux-2.6.21/arch/arm/mach-at91/at91sam9263_devices.c Thu Apr 26 05:08:32 2007 ++++ linux-2.6-stable/arch/arm/mach-at91/at91sam9263_devices.c Thu May 10 12:23:46 2007 +@@ -13,6 +13,9 @@ + #include <asm/mach/map.h> + + #include <linux/platform_device.h> ++#include <linux/fb.h> + -+/* -------------------------------------------------------------------- -+ * MMC / SD ++#include <video/atmel_lcdc.h> + + #include <asm/arch/board.h> + #include <asm/arch/gpio.h> +@@ -573,6 +576,180 @@ + + + /* -------------------------------------------------------------------- ++ * AC97 + * -------------------------------------------------------------------- */ + -+#if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE) -+static u64 mmc_dmamask = 0xffffffffUL; -+static struct at91_mmc_data mmc_data; ++#if defined(CONFIG_SND_AT91_AC97) || defined(CONFIG_SND_AT91_AC97_MODULE) ++static u64 ac97_dmamask = 0xffffffffUL; ++static struct atmel_ac97_data ac97_data; + -+static struct resource mmc_resources[] = { ++static struct resource ac97_resources[] = { + [0] = { -+ .start = AT91SAM9260_BASE_MCI, -+ .end = AT91SAM9260_BASE_MCI + SZ_16K - 1, ++ .start = AT91SAM9263_BASE_AC97C, ++ .end = AT91SAM9263_BASE_AC97C + SZ_16K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { -+ .start = AT91SAM9260_ID_MCI, -+ .end = AT91SAM9260_ID_MCI, ++ .start = AT91SAM9263_ID_AC97C, ++ .end = AT91SAM9263_ID_AC97C, + .flags = IORESOURCE_IRQ, + }, +}; + -+static struct platform_device at91sam9260_mmc_device = { -+ .name = "at91_mci", -+ .id = -1, ++static struct platform_device at91sam9263_ac97_device = { ++ .name = "ac97c", ++ .id = 1, + .dev = { -+ .dma_mask = &mmc_dmamask, ++ .dma_mask = &ac97_dmamask, + .coherent_dma_mask = 0xffffffff, -+ .platform_data = &mmc_data, ++ .platform_data = &ac97_data, + }, -+ .resource = mmc_resources, -+ .num_resources = ARRAY_SIZE(mmc_resources), ++ .resource = ac97_resources, ++ .num_resources = ARRAY_SIZE(ac97_resources), +}; + -+void __init at91_add_device_mmc(struct at91_mmc_data *data) ++void __init at91_add_device_ac97(struct atmel_ac97_data *data) +{ + if (!data) + return; + -+ /* input/irq */ -+ if (data->det_pin) { -+ at91_set_gpio_input(data->det_pin, 1); -+ at91_set_deglitch(data->det_pin, 1); -+ } -+ if (data->wp_pin) -+ at91_set_gpio_input(data->wp_pin, 1); -+ if (data->vcc_pin) -+ at91_set_gpio_output(data->vcc_pin, 0); -+ -+ /* CLK */ -+ at91_set_A_periph(AT91_PIN_PA8, 0); -+ -+ if (data->slot_b) { -+ /* CMD */ -+ at91_set_B_periph(AT91_PIN_PA1, 1); -+ -+ /* DAT0, maybe DAT1..DAT3 */ -+ at91_set_B_periph(AT91_PIN_PA0, 1); -+ if (data->wire4) { -+ at91_set_B_periph(AT91_PIN_PA5, 1); -+ at91_set_B_periph(AT91_PIN_PA4, 1); -+ at91_set_B_periph(AT91_PIN_PA3, 1); -+ } -+ } else { -+ /* CMD */ -+ at91_set_A_periph(AT91_PIN_PA7, 1); -+ -+ /* DAT0, maybe DAT1..DAT3 */ -+ at91_set_A_periph(AT91_PIN_PA6, 1); -+ if (data->wire4) { -+ at91_set_A_periph(AT91_PIN_PA9, 1); -+ at91_set_A_periph(AT91_PIN_PA10, 1); -+ at91_set_A_periph(AT91_PIN_PA11, 1); -+ } -+ } -+ -+ mmc_data = *data; -+ platform_device_register(&at91sam9260_mmc_device); -+} -+#else -+void __init at91_add_device_mmc(struct at91_mmc_data *data) {} -+#endif -+ -+ -+/* -------------------------------------------------------------------- -+ * NAND / SmartMedia -+ * -------------------------------------------------------------------- */ -+ -+#if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE) -+static struct at91_nand_data nand_data; -+ -+#define NAND_BASE AT91_CHIPSELECT_3 ++ at91_set_A_periph(AT91_PIN_PB0, 0); /* AC97FS */ ++ at91_set_A_periph(AT91_PIN_PB1, 0); /* AC97CK */ ++ at91_set_A_periph(AT91_PIN_PB2, 0); /* AC97TX */ ++ at91_set_A_periph(AT91_PIN_PB3, 0); /* AC97RX */ + -+static struct resource nand_resources[] = { -+ { -+ .start = NAND_BASE, -+ .end = NAND_BASE + SZ_8M - 1, -+ .flags = IORESOURCE_MEM, -+ } -+}; ++ /* reset */ ++ if (data->reset_pin) ++ at91_set_gpio_output(data->reset_pin, 0); + -+static struct platform_device at91sam9260_nand_device = { -+ .name = "at91_nand", -+ .id = -1, -+ .dev = { -+ .platform_data = &nand_data, -+ }, -+ .resource = nand_resources, -+ .num_resources = ARRAY_SIZE(nand_resources), -+}; -+ -+void __init at91_add_device_nand(struct at91_nand_data *data) -+{ -+ unsigned long csa, mode; -+ -+ if (!data) -+ return; -+ -+ csa = at91_sys_read(AT91_MATRIX_EBICSA); -+ at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC); -+ -+ /* set the bus interface characteristics */ -+ at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0) -+ | AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0)); -+ -+ at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(2) | AT91_SMC_NCS_WRPULSE_(5) -+ | AT91_SMC_NRDPULSE_(2) | AT91_SMC_NCS_RDPULSE_(5)); -+ -+ at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7)); -+ -+ if (data->bus_width_16) -+ mode = AT91_SMC_DBW_16; -+ else -+ mode = AT91_SMC_DBW_8; -+ at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(1)); -+ -+ /* enable pin */ -+ if (data->enable_pin) -+ at91_set_gpio_output(data->enable_pin, 1); -+ -+ /* ready/busy pin */ -+ if (data->rdy_pin) -+ at91_set_gpio_input(data->rdy_pin, 1); -+ -+ /* card detect pin */ -+ if (data->det_pin) -+ at91_set_gpio_input(data->det_pin, 1); -+ -+ nand_data = *data; -+ platform_device_register(&at91sam9260_nand_device); ++ ac97_data = *ek_data; ++ platform_device_register(&at91sam9263_ac97_device); +} +#else -+void __init at91_add_device_nand(struct at91_nand_data *data) {} ++void __init at91_add_device_ac97(struct atmel_ac97_data *data) {} +#endif + + +/* -------------------------------------------------------------------- -+ * TWI (i2c) ++ * Image Sensor Interface + * -------------------------------------------------------------------- */ + -+#if defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE) ++#if defined(CONFIG_VIDEO_AT91_ISI) || defined(CONFIG_VIDEO_AT91_ISI_MODULE) + -+static struct resource twi_resources[] = { ++struct resource isi_resources[] = { + [0] = { -+ .start = AT91SAM9260_BASE_TWI, -+ .end = AT91SAM9260_BASE_TWI + SZ_16K - 1, ++ .start = AT91SAM9263_BASE_ISI, ++ .end = AT91SAM9263_BASE_ISI + SZ_16K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { -+ .start = AT91SAM9260_ID_TWI, -+ .end = AT91SAM9260_ID_TWI, ++ .start = AT91SAM9263_ID_ISI, ++ .end = AT91SAM9263_ID_ISI, + .flags = IORESOURCE_IRQ, + }, +}; + -+static struct platform_device at91sam9260_twi_device = { -+ .name = "at91_i2c", ++static struct platform_device at91sam9263_isi_device = { ++ .name = "at91_isi", + .id = -1, -+ .resource = twi_resources, -+ .num_resources = ARRAY_SIZE(twi_resources), -+}; -+ -+void __init at91_add_device_i2c(void) -+{ -+ /* pins used for TWI interface */ -+ at91_set_A_periph(AT91_PIN_PA23, 0); /* TWD */ -+ at91_set_multi_drive(AT91_PIN_PA23, 1); -+ -+ at91_set_A_periph(AT91_PIN_PA24, 0); /* TWCK */ -+ at91_set_multi_drive(AT91_PIN_PA24, 1); -+ -+ platform_device_register(&at91sam9260_twi_device); ++ .resource = isi_resources, ++ .num_resources = ARRAY_SIZE(isi_resources), ++}; ++ ++void __init at91_add_device_isi(void) ++{ ++ at91_set_A_periph(AT91_PIN_PE0, 0); /* ISI_D0 */ ++ at91_set_A_periph(AT91_PIN_PE1, 0); /* ISI_D1 */ ++ at91_set_A_periph(AT91_PIN_PE2, 0); /* ISI_D2 */ ++ at91_set_A_periph(AT91_PIN_PE3, 0); /* ISI_D3 */ ++ at91_set_A_periph(AT91_PIN_PE4, 0); /* ISI_D4 */ ++ at91_set_A_periph(AT91_PIN_PE5, 0); /* ISI_D5 */ ++ at91_set_A_periph(AT91_PIN_PE6, 0); /* ISI_D6 */ ++ at91_set_A_periph(AT91_PIN_PE7, 0); /* ISI_D7 */ ++ at91_set_A_periph(AT91_PIN_PE8, 0); /* ISI_PCK */ ++ at91_set_A_periph(AT91_PIN_PE9, 0); /* ISI_HSYNC */ ++ at91_set_A_periph(AT91_PIN_PE10, 0); /* ISI_VSYNC */ ++ at91_set_B_periph(AT91_PIN_PE11, 0); /* ISI_MCK (PCK3) */ ++ at91_set_B_periph(AT91_PIN_PE12, 0); /* ISI_PD8 */ ++ at91_set_B_periph(AT91_PIN_PE13, 0); /* ISI_PD9 */ ++ at91_set_B_periph(AT91_PIN_PE14, 0); /* ISI_PD10 */ ++ at91_set_B_periph(AT91_PIN_PE15, 0); /* ISI_PD11 */ +} +#else -+void __init at91_add_device_i2c(void) {} ++void __init at91_add_device_isi(void) {} +#endif + + +/* -------------------------------------------------------------------- -+ * SPI ++ * LCD Controller + * -------------------------------------------------------------------- */ + -+#if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE) -+static u64 spi_dmamask = 0xffffffffUL; ++#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE) ++static u64 lcdc_dmamask = 0xffffffffUL; ++static struct atmel_lcdfb_info lcdc_data; + -+static struct resource spi0_resources[] = { ++static struct resource lcdc_resources[] = { + [0] = { -+ .start = AT91SAM9260_BASE_SPI0, -+ .end = AT91SAM9260_BASE_SPI0 + SZ_16K - 1, ++ .start = AT91SAM9263_LCDC_BASE, ++ .end = AT91SAM9263_LCDC_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { -+ .start = AT91SAM9260_ID_SPI0, -+ .end = AT91SAM9260_ID_SPI0, ++ .start = AT91SAM9263_ID_LCDC, ++ .end = AT91SAM9263_ID_LCDC, + .flags = IORESOURCE_IRQ, + }, +}; + -+static struct platform_device at91sam9260_spi0_device = { -+ .name = "atmel_spi", ++static struct platform_device at91_lcdc_device = { ++ .name = "atmel_lcdfb", + .id = 0, + .dev = { -+ .dma_mask = &spi_dmamask, -+ .coherent_dma_mask = 0xffffffff, -+ }, -+ .resource = spi0_resources, -+ .num_resources = ARRAY_SIZE(spi0_resources), -+}; -+ -+static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PC11, AT91_PIN_PC16, AT91_PIN_PC17 }; -+ -+static struct resource spi1_resources[] = { -+ [0] = { -+ .start = AT91SAM9260_BASE_SPI1, -+ .end = AT91SAM9260_BASE_SPI1 + SZ_16K - 1, -+ .flags = IORESOURCE_MEM, -+ }, -+ [1] = { -+ .start = AT91SAM9260_ID_SPI1, -+ .end = AT91SAM9260_ID_SPI1, -+ .flags = IORESOURCE_IRQ, -+ }, -+}; -+ -+static struct platform_device at91sam9260_spi1_device = { -+ .name = "atmel_spi", -+ .id = 1, -+ .dev = { -+ .dma_mask = &spi_dmamask, ++ .dma_mask = &lcdc_dmamask, + .coherent_dma_mask = 0xffffffff, ++ .platform_data = &lcdc_data, + }, -+ .resource = spi1_resources, -+ .num_resources = ARRAY_SIZE(spi1_resources), ++ .resource = lcdc_resources, ++ .num_resources = ARRAY_SIZE(lcdc_resources), +}; + -+static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB3, AT91_PIN_PC5, AT91_PIN_PC4, AT91_PIN_PC3 }; -+ -+void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) ++void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) +{ -+ int i; -+ unsigned long cs_pin; -+ short enable_spi0 = 0; -+ short enable_spi1 = 0; -+ -+ /* Choose SPI chip-selects */ -+ for (i = 0; i < nr_devices; i++) { -+ if (devices[i].controller_data) -+ cs_pin = (unsigned long) devices[i].controller_data; -+ else if (devices[i].bus_num == 0) -+ cs_pin = spi0_standard_cs[devices[i].chip_select]; -+ else -+ cs_pin = spi1_standard_cs[devices[i].chip_select]; -+ -+ if (devices[i].bus_num == 0) -+ enable_spi0 = 1; -+ else -+ enable_spi1 = 1; -+ -+ /* enable chip-select pin */ -+ at91_set_gpio_output(cs_pin, 1); -+ -+ /* pass chip-select pin to driver */ -+ devices[i].controller_data = (void *) cs_pin; -+ } -+ -+ spi_register_board_info(devices, nr_devices); -+ -+ /* Configure SPI bus(es) */ -+ if (enable_spi0) { -+ at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */ -+ at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */ -+ at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI1_SPCK */ ++ if (!data) ++ return; + -+ at91_clock_associate("spi0_clk", &at91sam9260_spi0_device.dev, "spi_clk"); -+ platform_device_register(&at91sam9260_spi0_device); -+ } -+ if (enable_spi1) { -+ at91_set_A_periph(AT91_PIN_PB0, 0); /* SPI1_MISO */ -+ at91_set_A_periph(AT91_PIN_PB1, 0); /* SPI1_MOSI */ -+ at91_set_A_periph(AT91_PIN_PB2, 0); /* SPI1_SPCK */ ++ at91_set_A_periph(AT91_PIN_PC1, 0); /* LCDHSYNC */ ++ at91_set_A_periph(AT91_PIN_PC2, 0); /* LCDDOTCK */ ++ at91_set_A_periph(AT91_PIN_PC3, 0); /* LCDDEN */ ++ at91_set_B_periph(AT91_PIN_PB9, 0); /* LCDCC */ ++ at91_set_A_periph(AT91_PIN_PC6, 0); /* LCDD2 */ ++ at91_set_A_periph(AT91_PIN_PC7, 0); /* LCDD3 */ ++ at91_set_A_periph(AT91_PIN_PC8, 0); /* LCDD4 */ ++ at91_set_A_periph(AT91_PIN_PC9, 0); /* LCDD5 */ ++ at91_set_A_periph(AT91_PIN_PC10, 0); /* LCDD6 */ ++ at91_set_A_periph(AT91_PIN_PC11, 0); /* LCDD7 */ ++ at91_set_A_periph(AT91_PIN_PC14, 0); /* LCDD10 */ ++ at91_set_A_periph(AT91_PIN_PC15, 0); /* LCDD11 */ ++ at91_set_A_periph(AT91_PIN_PC16, 0); /* LCDD12 */ ++ at91_set_B_periph(AT91_PIN_PC12, 0); /* LCDD13 */ ++ at91_set_A_periph(AT91_PIN_PC18, 0); /* LCDD14 */ ++ at91_set_A_periph(AT91_PIN_PC19, 0); /* LCDD15 */ ++ at91_set_A_periph(AT91_PIN_PC22, 0); /* LCDD18 */ ++ at91_set_A_periph(AT91_PIN_PC23, 0); /* LCDD19 */ ++ at91_set_A_periph(AT91_PIN_PC24, 0); /* LCDD20 */ ++ at91_set_B_periph(AT91_PIN_PC17, 0); /* LCDD21 */ ++ at91_set_A_periph(AT91_PIN_PC26, 0); /* LCDD22 */ ++ at91_set_A_periph(AT91_PIN_PC27, 0); /* LCDD23 */ + -+ at91_clock_associate("spi1_clk", &at91sam9260_spi1_device.dev, "spi_clk"); -+ platform_device_register(&at91sam9260_spi1_device); -+ } ++ lcdc_data = *data; ++ platform_device_register(&at91_lcdc_device); +} +#else -+void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {} ++void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {} +#endif + + +/* -------------------------------------------------------------------- -+ * LEDs -+ * -------------------------------------------------------------------- */ -+ -+#if defined(CONFIG_LEDS) -+u8 at91_leds_cpu; -+u8 at91_leds_timer; -+ -+void __init at91_init_leds(u8 cpu_led, u8 timer_led) -+{ -+ at91_leds_cpu = cpu_led; -+ at91_leds_timer = timer_led; -+} -+#else -+void __init at91_init_leds(u8 cpu_led, u8 timer_led) {} -+#endif -+ -+ + * LEDs + * -------------------------------------------------------------------- */ + +@@ -594,6 +771,32 @@ + #endif + + +#if defined(CONFIG_NEW_LEDS) + +static struct platform_device at91_leds = { @@ -4161,388 +1112,52 @@ diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/at91sam9260_devices +#endif + + -+/* -------------------------------------------------------------------- -+ * UART -+ * -------------------------------------------------------------------- */ -+#if defined(CONFIG_SERIAL_ATMEL) -+static struct resource dbgu_resources[] = { -+ [0] = { -+ .start = AT91_VA_BASE_SYS + AT91_DBGU, -+ .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1, -+ .flags = IORESOURCE_MEM, -+ }, -+ [1] = { -+ .start = AT91_ID_SYS, -+ .end = AT91_ID_SYS, -+ .flags = IORESOURCE_IRQ, -+ }, -+}; -+ -+static struct atmel_uart_data dbgu_data = { -+ .use_dma_tx = 0, -+ .use_dma_rx = 0, /* DBGU not capable of receive DMA */ -+ .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU), -+}; -+ -+static struct platform_device at91sam9260_dbgu_device = { -+ .name = "atmel_usart", -+ .id = 0, -+ .dev = { -+ .platform_data = &dbgu_data, -+ .coherent_dma_mask = 0xffffffff, -+ }, -+ .resource = dbgu_resources, -+ .num_resources = ARRAY_SIZE(dbgu_resources), -+}; -+ -+static inline void configure_dbgu_pins(void) -+{ -+ at91_set_A_periph(AT91_PIN_PB14, 0); /* DRXD */ -+ at91_set_A_periph(AT91_PIN_PB15, 1); /* DTXD */ -+} -+ -+static struct resource uart0_resources[] = { -+ [0] = { -+ .start = AT91SAM9260_BASE_US0, -+ .end = AT91SAM9260_BASE_US0 + SZ_16K - 1, -+ .flags = IORESOURCE_MEM, -+ }, -+ [1] = { -+ .start = AT91SAM9260_ID_US0, -+ .end = AT91SAM9260_ID_US0, -+ .flags = IORESOURCE_IRQ, -+ }, -+}; -+ -+static struct atmel_uart_data uart0_data = { -+ .use_dma_tx = 1, -+ .use_dma_rx = 1, -+}; -+ -+static struct platform_device at91sam9260_uart0_device = { -+ .name = "atmel_usart", -+ .id = 1, -+ .dev = { -+ .platform_data = &uart0_data, -+ .coherent_dma_mask = 0xffffffff, -+ }, -+ .resource = uart0_resources, -+ .num_resources = ARRAY_SIZE(uart0_resources), -+}; -+ -+static inline void configure_usart0_pins(void) -+{ -+ at91_set_A_periph(AT91_PIN_PB4, 1); /* TXD0 */ -+ at91_set_A_periph(AT91_PIN_PB5, 0); /* RXD0 */ -+ at91_set_A_periph(AT91_PIN_PB26, 0); /* RTS0 */ -+ at91_set_A_periph(AT91_PIN_PB27, 0); /* CTS0 */ -+ at91_set_A_periph(AT91_PIN_PB24, 0); /* DTR0 */ -+ at91_set_A_periph(AT91_PIN_PB22, 0); /* DSR0 */ -+ at91_set_A_periph(AT91_PIN_PB23, 0); /* DCD0 */ -+ at91_set_A_periph(AT91_PIN_PB25, 0); /* RI0 */ -+} -+ -+static struct resource uart1_resources[] = { -+ [0] = { -+ .start = AT91SAM9260_BASE_US1, -+ .end = AT91SAM9260_BASE_US1 + SZ_16K - 1, -+ .flags = IORESOURCE_MEM, -+ }, -+ [1] = { -+ .start = AT91SAM9260_ID_US1, -+ .end = AT91SAM9260_ID_US1, -+ .flags = IORESOURCE_IRQ, -+ }, -+}; -+ -+static struct atmel_uart_data uart1_data = { -+ .use_dma_tx = 1, -+ .use_dma_rx = 1, -+}; -+ -+static struct platform_device at91sam9260_uart1_device = { -+ .name = "atmel_usart", -+ .id = 2, -+ .dev = { -+ .platform_data = &uart1_data, -+ .coherent_dma_mask = 0xffffffff, -+ }, -+ .resource = uart1_resources, -+ .num_resources = ARRAY_SIZE(uart1_resources), -+}; -+ -+static inline void configure_usart1_pins(void) -+{ -+ at91_set_A_periph(AT91_PIN_PB6, 1); /* TXD1 */ -+ at91_set_A_periph(AT91_PIN_PB7, 0); /* RXD1 */ -+ at91_set_A_periph(AT91_PIN_PB28, 0); /* RTS1 */ -+ at91_set_A_periph(AT91_PIN_PB29, 0); /* CTS1 */ -+} -+ -+static struct resource uart2_resources[] = { -+ [0] = { -+ .start = AT91SAM9260_BASE_US2, -+ .end = AT91SAM9260_BASE_US2 + SZ_16K - 1, -+ .flags = IORESOURCE_MEM, -+ }, -+ [1] = { -+ .start = AT91SAM9260_ID_US2, -+ .end = AT91SAM9260_ID_US2, -+ .flags = IORESOURCE_IRQ, -+ }, -+}; -+ -+static struct atmel_uart_data uart2_data = { -+ .use_dma_tx = 1, -+ .use_dma_rx = 1, -+}; -+ -+static struct platform_device at91sam9260_uart2_device = { -+ .name = "atmel_usart", -+ .id = 3, -+ .dev = { -+ .platform_data = &uart2_data, -+ .coherent_dma_mask = 0xffffffff, -+ }, -+ .resource = uart2_resources, -+ .num_resources = ARRAY_SIZE(uart2_resources), -+}; -+ -+static inline void configure_usart2_pins(void) -+{ -+ at91_set_A_periph(AT91_PIN_PB8, 1); /* TXD2 */ -+ at91_set_A_periph(AT91_PIN_PB9, 0); /* RXD2 */ -+} -+ -+static struct resource uart3_resources[] = { -+ [0] = { -+ .start = AT91SAM9260_BASE_US3, -+ .end = AT91SAM9260_BASE_US3 + SZ_16K - 1, -+ .flags = IORESOURCE_MEM, -+ }, -+ [1] = { -+ .start = AT91SAM9260_ID_US3, -+ .end = AT91SAM9260_ID_US3, -+ .flags = IORESOURCE_IRQ, -+ }, -+}; -+ -+static struct atmel_uart_data uart3_data = { -+ .use_dma_tx = 1, -+ .use_dma_rx = 1, -+}; -+ -+static struct platform_device at91sam9260_uart3_device = { -+ .name = "atmel_usart", -+ .id = 4, -+ .dev = { -+ .platform_data = &uart3_data, -+ .coherent_dma_mask = 0xffffffff, -+ }, -+ .resource = uart3_resources, -+ .num_resources = ARRAY_SIZE(uart3_resources), -+}; -+ -+static inline void configure_usart3_pins(void) -+{ -+ at91_set_A_periph(AT91_PIN_PB10, 1); /* TXD3 */ -+ at91_set_A_periph(AT91_PIN_PB11, 0); /* RXD3 */ -+} -+ -+static struct resource uart4_resources[] = { -+ [0] = { -+ .start = AT91SAM9260_BASE_US4, -+ .end = AT91SAM9260_BASE_US4 + SZ_16K - 1, -+ .flags = IORESOURCE_MEM, -+ }, -+ [1] = { -+ .start = AT91SAM9260_ID_US4, -+ .end = AT91SAM9260_ID_US4, -+ .flags = IORESOURCE_IRQ, -+ }, -+}; -+ -+static struct atmel_uart_data uart4_data = { -+ .use_dma_tx = 1, -+ .use_dma_rx = 1, -+}; -+ -+static struct platform_device at91sam9260_uart4_device = { -+ .name = "atmel_usart", -+ .id = 5, -+ .dev = { -+ .platform_data = &uart4_data, -+ .coherent_dma_mask = 0xffffffff, -+ }, -+ .resource = uart4_resources, -+ .num_resources = ARRAY_SIZE(uart4_resources), -+}; -+ -+static inline void configure_usart4_pins(void) -+{ -+ at91_set_B_periph(AT91_PIN_PA31, 1); /* TXD4 */ -+ at91_set_B_periph(AT91_PIN_PA30, 0); /* RXD4 */ -+} -+ -+static struct resource uart5_resources[] = { -+ [0] = { -+ .start = AT91SAM9260_BASE_US5, -+ .end = AT91SAM9260_BASE_US5 + SZ_16K - 1, -+ .flags = IORESOURCE_MEM, -+ }, -+ [1] = { -+ .start = AT91SAM9260_ID_US5, -+ .end = AT91SAM9260_ID_US5, -+ .flags = IORESOURCE_IRQ, -+ }, -+}; -+ -+static struct atmel_uart_data uart5_data = { -+ .use_dma_tx = 1, -+ .use_dma_rx = 1, -+}; -+ -+static struct platform_device at91sam9260_uart5_device = { -+ .name = "atmel_usart", -+ .id = 6, -+ .dev = { -+ .platform_data = &uart5_data, -+ .coherent_dma_mask = 0xffffffff, -+ }, -+ .resource = uart5_resources, -+ .num_resources = ARRAY_SIZE(uart5_resources), -+}; -+ -+static inline void configure_usart5_pins(void) -+{ -+ at91_set_A_periph(AT91_PIN_PB12, 1); /* TXD5 */ -+ at91_set_A_periph(AT91_PIN_PB13, 0); /* RXD5 */ -+} -+ -+struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */ -+struct platform_device *atmel_default_console_device; /* the serial console device */ -+ -+void __init at91_init_serial(struct at91_uart_config *config) -+{ -+ int i; -+ -+ /* Fill in list of supported UARTs */ -+ for (i = 0; i < config->nr_tty; i++) { -+ switch (config->tty_map[i]) { -+ case 0: -+ configure_usart0_pins(); -+ at91_uarts[i] = &at91sam9260_uart0_device; -+ at91_clock_associate("usart0_clk", &at91sam9260_uart0_device.dev, "usart"); -+ break; -+ case 1: -+ configure_usart1_pins(); -+ at91_uarts[i] = &at91sam9260_uart1_device; -+ at91_clock_associate("usart1_clk", &at91sam9260_uart1_device.dev, "usart"); -+ break; -+ case 2: -+ configure_usart2_pins(); -+ at91_uarts[i] = &at91sam9260_uart2_device; -+ at91_clock_associate("usart2_clk", &at91sam9260_uart2_device.dev, "usart"); -+ break; -+ case 3: -+ configure_usart3_pins(); -+ at91_uarts[i] = &at91sam9260_uart3_device; -+ at91_clock_associate("usart3_clk", &at91sam9260_uart3_device.dev, "usart"); -+ break; -+ case 4: -+ configure_usart4_pins(); -+ at91_uarts[i] = &at91sam9260_uart4_device; -+ at91_clock_associate("usart4_clk", &at91sam9260_uart4_device.dev, "usart"); -+ break; -+ case 5: -+ configure_usart5_pins(); -+ at91_uarts[i] = &at91sam9260_uart5_device; -+ at91_clock_associate("usart5_clk", &at91sam9260_uart5_device.dev, "usart"); -+ break; -+ case 6: -+ configure_dbgu_pins(); -+ at91_uarts[i] = &at91sam9260_dbgu_device; -+ at91_clock_associate("mck", &at91sam9260_dbgu_device.dev, "usart"); -+ break; -+ default: -+ continue; -+ } -+ at91_uarts[i]->id = i; /* update ID number to mapped ID */ -+ } -+ -+ /* Set serial console device */ -+ if (config->console_tty < ATMEL_MAX_UART) -+ atmel_default_console_device = at91_uarts[config->console_tty]; -+ if (!atmel_default_console_device) -+ printk(KERN_INFO "AT91: No default serial console defined.\n"); -+} -+ -+void __init at91_add_device_serial(void) -+{ -+ int i; -+ -+ for (i = 0; i < ATMEL_MAX_UART; i++) { -+ if (at91_uarts[i]) -+ platform_device_register(at91_uarts[i]); -+ } -+} -+#else -+void __init at91_init_serial(struct at91_uart_config *config) {} -+void __init at91_add_device_serial(void) {} -+#endif -+ -+ -+/* -------------------------------------------------------------------- */ -+/* -+ * These devices are always present and don't need any board-specific -+ * setup. -+ */ -+static int __init at91_add_standard_devices(void) -+{ -+ return 0; -+} -+ -+arch_initcall(at91_add_standard_devices); -diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/at91sam9261.c linux-2.6.19/arch/arm/mach-at91rm9200/at91sam9261.c ---- linux-2.6.19-final/arch/arm/mach-at91rm9200/at91sam9261.c Thu Jan 1 02:00:00 1970 -+++ linux-2.6.19/arch/arm/mach-at91rm9200/at91sam9261.c Thu Nov 23 15:41:39 2006 -@@ -0,0 +1,289 @@ + /* -------------------------------------------------------------------- + * UART + * -------------------------------------------------------------------- */ +diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/at91sam9rl.c linux-2.6-stable/arch/arm/mach-at91/at91sam9rl.c +--- linux-2.6.21/arch/arm/mach-at91/at91sam9rl.c Thu Jan 1 02:00:00 1970 ++++ linux-2.6-stable/arch/arm/mach-at91/at91sam9rl.c Fri May 11 15:48:14 2007 +@@ -0,0 +1,366 @@ +/* -+ * arch/arm/mach-at91rm9200/at91sam9261.c ++ * arch/arm/mach-at91/at91sam9rl.c + * + * Copyright (C) 2005 SAN People ++ * Copyright (C) 2007 Atmel Corporation + * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file COPYING in the main directory of this archive for ++ * more details. + */ + +#include <linux/module.h> + +#include <asm/mach/arch.h> +#include <asm/mach/map.h> -+#include <asm/arch/at91sam9261.h> ++#include <asm/arch/cpu.h> ++#include <asm/arch/at91sam9rl.h> +#include <asm/arch/at91_pmc.h> ++#include <asm/arch/at91_rstc.h> + +#include "generic.h" +#include "clock.h" + -+static struct map_desc at91sam9261_io_desc[] __initdata = { ++static struct map_desc at91sam9rl_io_desc[] __initdata = { + { + .virtual = AT91_VA_BASE_SYS, + .pfn = __phys_to_pfn(AT91_BASE_SYS), + .length = SZ_16K, + .type = MT_DEVICE, -+ }, { -+ .virtual = AT91_IO_VIRT_BASE - AT91SAM9261_SRAM_SIZE, -+ .pfn = __phys_to_pfn(AT91SAM9261_SRAM_BASE), -+ .length = AT91SAM9261_SRAM_SIZE, -+ .type = MT_DEVICE, + }, +}; + ++static struct map_desc at91sam9rl_sram_desc[] __initdata = { ++ { ++ .pfn = __phys_to_pfn(AT91SAM9RL_SRAM_BASE), ++ .type = MT_DEVICE, ++ } ++}; ++ +/* -------------------------------------------------------------------- + * Clocks + * -------------------------------------------------------------------- */ @@ -4552,67 +1167,117 @@ diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/at91sam9261.c linux + */ +static struct clk pioA_clk = { + .name = "pioA_clk", -+ .pmc_mask = 1 << AT91SAM9261_ID_PIOA, ++ .pmc_mask = 1 << AT91SAM9RL_ID_PIOA, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk pioB_clk = { + .name = "pioB_clk", -+ .pmc_mask = 1 << AT91SAM9261_ID_PIOB, ++ .pmc_mask = 1 << AT91SAM9RL_ID_PIOB, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk pioC_clk = { + .name = "pioC_clk", -+ .pmc_mask = 1 << AT91SAM9261_ID_PIOC, ++ .pmc_mask = 1 << AT91SAM9RL_ID_PIOC, ++ .type = CLK_TYPE_PERIPHERAL, ++}; ++static struct clk pioD_clk = { ++ .name = "pioD_clk", ++ .pmc_mask = 1 << AT91SAM9RL_ID_PIOD, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk usart0_clk = { + .name = "usart0_clk", -+ .pmc_mask = 1 << AT91SAM9261_ID_US0, ++ .pmc_mask = 1 << AT91SAM9RL_ID_US0, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk usart1_clk = { + .name = "usart1_clk", -+ .pmc_mask = 1 << AT91SAM9261_ID_US1, ++ .pmc_mask = 1 << AT91SAM9RL_ID_US1, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk usart2_clk = { + .name = "usart2_clk", -+ .pmc_mask = 1 << AT91SAM9261_ID_US2, ++ .pmc_mask = 1 << AT91SAM9RL_ID_US2, ++ .type = CLK_TYPE_PERIPHERAL, ++}; ++static struct clk usart3_clk = { ++ .name = "usart3_clk", ++ .pmc_mask = 1 << AT91SAM9RL_ID_US3, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk mmc_clk = { + .name = "mci_clk", -+ .pmc_mask = 1 << AT91SAM9261_ID_MCI, ++ .pmc_mask = 1 << AT91SAM9RL_ID_MCI, ++ .type = CLK_TYPE_PERIPHERAL, ++}; ++static struct clk twi0_clk = { ++ .name = "twi0_clk", ++ .pmc_mask = 1 << AT91SAM9RL_ID_TWI0, ++ .type = CLK_TYPE_PERIPHERAL, ++}; ++static struct clk twi1_clk = { ++ .name = "twi1_clk", ++ .pmc_mask = 1 << AT91SAM9RL_ID_TWI1, ++ .type = CLK_TYPE_PERIPHERAL, ++}; ++static struct clk spi_clk = { ++ .name = "spi_clk", ++ .pmc_mask = 1 << AT91SAM9RL_ID_SPI, ++ .type = CLK_TYPE_PERIPHERAL, ++}; ++static struct clk ssc0_clk = { ++ .name = "ssc0_clk", ++ .pmc_mask = 1 << AT91SAM9RL_ID_SSC0, ++ .type = CLK_TYPE_PERIPHERAL, ++}; ++static struct clk ssc1_clk = { ++ .name = "ssc1_clk", ++ .pmc_mask = 1 << AT91SAM9RL_ID_SSC1, ++ .type = CLK_TYPE_PERIPHERAL, ++}; ++static struct clk tc0_clk = { ++ .name = "tc0_clk", ++ .pmc_mask = 1 << AT91SAM9RL_ID_TC0, ++ .type = CLK_TYPE_PERIPHERAL, ++}; ++static struct clk tc1_clk = { ++ .name = "tc1_clk", ++ .pmc_mask = 1 << AT91SAM9RL_ID_TC1, + .type = CLK_TYPE_PERIPHERAL, +}; -+static struct clk udc_clk = { -+ .name = "udc_clk", -+ .pmc_mask = 1 << AT91SAM9261_ID_UDP, ++static struct clk tc2_clk = { ++ .name = "tc2_clk", ++ .pmc_mask = 1 << AT91SAM9RL_ID_TC2, + .type = CLK_TYPE_PERIPHERAL, +}; -+static struct clk twi_clk = { -+ .name = "twi_clk", -+ .pmc_mask = 1 << AT91SAM9261_ID_TWI, ++static struct clk pwmc_clk = { ++ .name = "pwmc_clk", ++ .pmc_mask = 1 << AT91SAM9RL_ID_PWMC, + .type = CLK_TYPE_PERIPHERAL, +}; -+static struct clk spi0_clk = { -+ .name = "spi0_clk", -+ .pmc_mask = 1 << AT91SAM9261_ID_SPI0, ++static struct clk tsc_clk = { ++ .name = "tsc_clk", ++ .pmc_mask = 1 << AT91SAM9RL_ID_TSC, + .type = CLK_TYPE_PERIPHERAL, +}; -+static struct clk spi1_clk = { -+ .name = "spi1_clk", -+ .pmc_mask = 1 << AT91SAM9261_ID_SPI1, ++static struct clk dma_clk = { ++ .name = "dma_clk", ++ .pmc_mask = 1 << AT91SAM9RL_ID_DMA, + .type = CLK_TYPE_PERIPHERAL, +}; -+static struct clk ohci_clk = { -+ .name = "ohci_clk", -+ .pmc_mask = 1 << AT91SAM9261_ID_UHP, ++static struct clk udphs_clk = { ++ .name = "udphs_clk", ++ .pmc_mask = 1 << AT91SAM9RL_ID_UDPHS, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk lcdc_clk = { + .name = "lcdc_clk", -+ .pmc_mask = 1 << AT91SAM9261_ID_LCDC, ++ .pmc_mask = 1 << AT91SAM9RL_ID_LCDC, ++ .type = CLK_TYPE_PERIPHERAL, ++}; ++static struct clk ac97_clk = { ++ .name = "ac97_clk", ++ .pmc_mask = 1 << AT91SAM9RL_ID_AC97C, + .type = CLK_TYPE_PERIPHERAL, +}; + @@ -4620,23 +1285,31 @@ diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/at91sam9261.c linux + &pioA_clk, + &pioB_clk, + &pioC_clk, ++ &pioD_clk, + &usart0_clk, + &usart1_clk, + &usart2_clk, ++ &usart3_clk, + &mmc_clk, -+ &udc_clk, -+ &twi_clk, -+ &spi0_clk, -+ &spi1_clk, -+ // ssc 0 .. ssc2 -+ // tc0 .. tc2 -+ &ohci_clk, ++ &twi0_clk, ++ &twi1_clk, ++ &spi_clk, ++ &ssc0_clk, ++ &ssc1_clk, ++ &tc0_clk, ++ &tc1_clk, ++ &tc2_clk, ++ &pwmc_clk, ++ &tsc_clk, ++ &dma_clk, ++ &udphs_clk, + &lcdc_clk, -+ // irq0 .. irq2 ++ &ac97_clk, ++ // irq0 +}; + +/* -+ * The four programmable clocks. ++ * The two programmable clocks. + * You must configure pin multiplexing to bring these signals out. + */ +static struct clk pck0 = { @@ -4651,34 +1324,8 @@ diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/at91sam9261.c linux + .type = CLK_TYPE_PROGRAMMABLE, + .id = 1, +}; -+static struct clk pck2 = { -+ .name = "pck2", -+ .pmc_mask = AT91_PMC_PCK2, -+ .type = CLK_TYPE_PROGRAMMABLE, -+ .id = 2, -+}; -+static struct clk pck3 = { -+ .name = "pck3", -+ .pmc_mask = AT91_PMC_PCK3, -+ .type = CLK_TYPE_PROGRAMMABLE, -+ .id = 3, -+}; -+ -+/* HClocks */ -+static struct clk hck0 = { -+ .name = "hck0", -+ .pmc_mask = AT91_PMC_HCK0, -+ .type = CLK_TYPE_SYSTEM, -+ .id = 0, -+}; -+static struct clk hck1 = { -+ .name = "hck1", -+ .pmc_mask = AT91_PMC_HCK1, -+ .type = CLK_TYPE_SYSTEM, -+ .id = 1, -+}; + -+static void __init at91sam9261_register_clocks(void) ++static void __init at91sam9rl_register_clocks(void) +{ + int i; + @@ -4687,60 +1334,102 @@ diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/at91sam9261.c linux + + clk_register(&pck0); + clk_register(&pck1); -+ clk_register(&pck2); -+ clk_register(&pck3); -+ -+ clk_register(&hck0); -+ clk_register(&hck1); +} + +/* -------------------------------------------------------------------- + * GPIO + * -------------------------------------------------------------------- */ + -+static struct at91_gpio_bank at91sam9261_gpio[] = { ++static struct at91_gpio_bank at91sam9rl_gpio[] = { + { -+ .id = AT91SAM9261_ID_PIOA, ++ .id = AT91SAM9RL_ID_PIOA, + .offset = AT91_PIOA, + .clock = &pioA_clk, + }, { -+ .id = AT91SAM9261_ID_PIOB, ++ .id = AT91SAM9RL_ID_PIOB, + .offset = AT91_PIOB, + .clock = &pioB_clk, + }, { -+ .id = AT91SAM9261_ID_PIOC, ++ .id = AT91SAM9RL_ID_PIOC, + .offset = AT91_PIOC, + .clock = &pioC_clk, ++ }, { ++ .id = AT91SAM9RL_ID_PIOD, ++ .offset = AT91_PIOD, ++ .clock = &pioD_clk, + } +}; + -+static void at91sam9261_reset(void) ++static void at91sam9rl_reset(void) +{ -+#warning "Implement CPU reset" ++ at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST); +} + + +/* -------------------------------------------------------------------- -+ * AT91SAM9261 processor initialization ++ * Timer/Counter library initialization ++ * -------------------------------------------------------------------- */ ++#ifdef CONFIG_ATMEL_TCLIB ++ ++#include "tclib.h" ++ ++static struct atmel_tcblock at91sam9rl_tcblocks[] = { ++ [0] = { ++ .physaddr = AT91SAM9RL_BASE_TCB0, ++ .irq = { AT91SAM9RL_ID_TC0, AT91SAM9RL_ID_TC1, AT91SAM9RL_ID_TC2 }, ++ .clk = { &tc0_clk, &tc1_clk, &tc2_clk }, ++ } ++}; ++ ++#define at91sam9rl_tc_init() atmel_tc_init(at91sam9rl_tcblocks, ARRAY_SIZE(at91sam9rl_tcblocks)) ++ ++#else ++#define at91sam9rl_tc_init() do {} while(0) ++#endif ++ ++ ++/* -------------------------------------------------------------------- ++ * AT91SAM9RL processor initialization + * -------------------------------------------------------------------- */ + -+void __init at91sam9261_initialize(unsigned long main_clock) ++void __init at91sam9rl_initialize(unsigned long main_clock) +{ ++ unsigned long cidr, sram_size; ++ + /* Map peripherals */ -+ iotable_init(at91sam9261_io_desc, ARRAY_SIZE(at91sam9261_io_desc)); ++ iotable_init(at91sam9rl_io_desc, ARRAY_SIZE(at91sam9rl_io_desc)); ++ ++ cidr = at91_sys_read(AT91_DBGU_CIDR); ++ ++ switch (cidr & AT91_CIDR_SRAMSIZ) { ++ case AT91_CIDR_SRAMSIZ_32K: ++ sram_size = 2 * SZ_16K; ++ break; ++ case AT91_CIDR_SRAMSIZ_16K: ++ default: ++ sram_size = SZ_16K; ++ } ++ ++ at91sam9rl_sram_desc->virtual = AT91_IO_VIRT_BASE - sram_size; ++ at91sam9rl_sram_desc->length = sram_size; ++ ++ /* Map SRAM */ ++ iotable_init(at91sam9rl_sram_desc, ARRAY_SIZE(at91sam9rl_sram_desc)); + -+ at91_arch_reset = at91sam9261_reset; -+ at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1) -+ | (1 << AT91SAM9261_ID_IRQ2); ++ at91_arch_reset = at91sam9rl_reset; ++ at91_extern_irq = (1 << AT91SAM9RL_ID_IRQ0); + + /* Init clock subsystem */ + at91_clock_init(main_clock); + + /* Register the processor-specific clocks */ -+ at91sam9261_register_clocks(); ++ at91sam9rl_register_clocks(); + + /* Register GPIO subsystem */ -+ at91_gpio_init(at91sam9261_gpio, 3); ++ at91_gpio_init(at91sam9rl_gpio, 4); ++ ++ /* Initialize the Timer/Counter blocks */ ++ at91sam9rl_tc_init(); +} + +/* -------------------------------------------------------------------- @@ -4750,30 +1439,32 @@ diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/at91sam9261.c linux +/* + * The default interrupt priority levels (0 = lowest, 7 = highest). + */ -+static unsigned int at91sam9261_default_irq_priority[NR_AIC_IRQS] __initdata = { ++static unsigned int at91sam9rl_default_irq_priority[NR_AIC_IRQS] __initdata = { + 7, /* Advanced Interrupt Controller */ + 7, /* System Peripherals */ -+ 0, /* Parallel IO Controller A */ -+ 0, /* Parallel IO Controller B */ -+ 0, /* Parallel IO Controller C */ -+ 0, -+ 6, /* USART 0 */ -+ 6, /* USART 1 */ -+ 6, /* USART 2 */ ++ 1, /* Parallel IO Controller A */ ++ 1, /* Parallel IO Controller B */ ++ 1, /* Parallel IO Controller C */ ++ 1, /* Parallel IO Controller D */ ++ 5, /* USART 0 */ ++ 5, /* USART 1 */ ++ 5, /* USART 2 */ ++ 5, /* USART 3 */ + 0, /* Multimedia Card Interface */ -+ 4, /* USB Device Port */ -+ 0, /* Two-Wire Interface */ -+ 6, /* Serial Peripheral Interface 0 */ -+ 6, /* Serial Peripheral Interface 1 */ -+ 5, /* Serial Synchronous Controller 0 */ -+ 5, /* Serial Synchronous Controller 1 */ -+ 5, /* Serial Synchronous Controller 2 */ ++ 6, /* Two-Wire Interface 0 */ ++ 6, /* Two-Wire Interface 1 */ ++ 5, /* Serial Peripheral Interface */ ++ 4, /* Serial Synchronous Controller 0 */ ++ 4, /* Serial Synchronous Controller 1 */ + 0, /* Timer Counter 0 */ + 0, /* Timer Counter 1 */ + 0, /* Timer Counter 2 */ -+ 3, /* USB Host port */ -+ 3, /* LCD Controller */ + 0, ++ 0, /* Touch Screen Controller */ ++ 0, /* DMA Controller */ ++ 2, /* USB Device High speed port */ ++ 2, /* LCD Controller */ ++ 6, /* AC97 Controller */ + 0, + 0, + 0, @@ -4781,14 +1472,12 @@ diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/at91sam9261.c linux + 0, + 0, + 0, /* Advanced Interrupt Controller */ -+ 0, /* Advanced Interrupt Controller */ -+ 0, /* Advanced Interrupt Controller */ +}; + -+void __init at91sam9261_init_interrupts(unsigned int priority[NR_AIC_IRQS]) ++void __init at91sam9rl_init_interrupts(unsigned int priority[NR_AIC_IRQS]) +{ + if (!priority) -+ priority = at91sam9261_default_irq_priority; ++ priority = at91sam9rl_default_irq_priority; + + /* Initialize the AIC interrupt controller */ + at91_aic_init(priority); @@ -4796,31 +1485,30 @@ diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/at91sam9261.c linux + /* Enable GPIO interrupts */ + at91_gpio_irq_setup(); +} -diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/at91sam9261_devices.c linux-2.6.19/arch/arm/mach-at91rm9200/at91sam9261_devices.c ---- linux-2.6.19-final/arch/arm/mach-at91rm9200/at91sam9261_devices.c Thu Jan 1 02:00:00 1970 -+++ linux-2.6.19/arch/arm/mach-at91rm9200/at91sam9261_devices.c Sat Nov 25 11:14:00 2006 -@@ -0,0 +1,767 @@ +diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/at91sam9rl_devices.c linux-2.6-stable/arch/arm/mach-at91/at91sam9rl_devices.c +--- linux-2.6.21/arch/arm/mach-at91/at91sam9rl_devices.c Thu Jan 1 02:00:00 1970 ++++ linux-2.6-stable/arch/arm/mach-at91/at91sam9rl_devices.c Fri May 11 16:03:25 2007 +@@ -0,0 +1,660 @@ +/* -+ * arch/arm/mach-at91rm9200/at91sam9261_devices.c -+ * -+ * Copyright (C) 2005 Thibaut VARENE <varenet@parisc-linux.org> -+ * Copyright (C) 2005 David Brownell -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. ++ * Copyright (C) 2007 Atmel Corporation + * ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file COPYING in the main directory of this archive for ++ * more details. + */ ++ +#include <asm/mach/arch.h> +#include <asm/mach/map.h> + +#include <linux/platform_device.h> ++#include <linux/fb.h> ++ ++#include <video/atmel_lcdc.h> + +#include <asm/arch/board.h> +#include <asm/arch/gpio.h> -+#include <asm/arch/at91sam9261.h> -+#include <asm/arch/at91sam9261_matrix.h> ++#include <asm/arch/at91sam9rl.h> ++#include <asm/arch/at91sam9rl_matrix.h> +#include <asm/arch/at91sam926x_mc.h> + +#include "generic.h" @@ -4829,104 +1517,6 @@ diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/at91sam9261_devices +#define SZ_256 0x00000100 +#define SZ_16 0x00000010 + -+/* -------------------------------------------------------------------- -+ * USB Host -+ * -------------------------------------------------------------------- */ -+ -+#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) -+static u64 ohci_dmamask = 0xffffffffUL; -+static struct at91_usbh_data usbh_data; -+ -+static struct resource usbh_resources[] = { -+ [0] = { -+ .start = AT91SAM9261_UHP_BASE, -+ .end = AT91SAM9261_UHP_BASE + SZ_1M - 1, -+ .flags = IORESOURCE_MEM, -+ }, -+ [1] = { -+ .start = AT91SAM9261_ID_UHP, -+ .end = AT91SAM9261_ID_UHP, -+ .flags = IORESOURCE_IRQ, -+ }, -+}; -+ -+static struct platform_device at91sam9261_usbh_device = { -+ .name = "at91_ohci", -+ .id = -1, -+ .dev = { -+ .dma_mask = &ohci_dmamask, -+ .coherent_dma_mask = 0xffffffff, -+ .platform_data = &usbh_data, -+ }, -+ .resource = usbh_resources, -+ .num_resources = ARRAY_SIZE(usbh_resources), -+}; -+ -+void __init at91_add_device_usbh(struct at91_usbh_data *data) -+{ -+ if (!data) -+ return; -+ -+ usbh_data = *data; -+ platform_device_register(&at91sam9261_usbh_device); -+} -+#else -+void __init at91_add_device_usbh(struct at91_usbh_data *data) {} -+#endif -+ -+ -+/* -------------------------------------------------------------------- -+ * USB Device (Gadget) -+ * -------------------------------------------------------------------- */ -+ -+#ifdef CONFIG_USB_GADGET_AT91 -+static struct at91_udc_data udc_data; -+ -+static struct resource udc_resources[] = { -+ [0] = { -+ .start = AT91SAM9261_BASE_UDP, -+ .end = AT91SAM9261_BASE_UDP + SZ_16K - 1, -+ .flags = IORESOURCE_MEM, -+ }, -+ [1] = { -+ .start = AT91SAM9261_ID_UDP, -+ .end = AT91SAM9261_ID_UDP, -+ .flags = IORESOURCE_IRQ, -+ }, -+}; -+ -+static struct platform_device at91sam9261_udc_device = { -+ .name = "at91_udc", -+ .id = -1, -+ .dev = { -+ .platform_data = &udc_data, -+ }, -+ .resource = udc_resources, -+ .num_resources = ARRAY_SIZE(udc_resources), -+}; -+ -+void __init at91_add_device_udc(struct at91_udc_data *data) -+{ -+ unsigned long x; -+ -+ if (!data) -+ return; -+ -+ if (data->vbus_pin) { -+ at91_set_gpio_input(data->vbus_pin, 0); -+ at91_set_deglitch(data->vbus_pin, 1); -+ } -+ -+ /* Pullup pin is handled internally */ -+ x = at91_sys_read(AT91_MATRIX_USBPUCR); -+ at91_sys_write(AT91_MATRIX_USBPUCR, x | AT91_MATRIX_USBPUCR_PUON); -+ -+ udc_data = *data; -+ platform_device_register(&at91sam9261_udc_device); -+} -+#else -+void __init at91_add_device_udc(struct at91_udc_data *data) {} -+#endif + +/* -------------------------------------------------------------------- + * MMC / SD @@ -4938,18 +1528,18 @@ diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/at91sam9261_devices + +static struct resource mmc_resources[] = { + [0] = { -+ .start = AT91SAM9261_BASE_MCI, -+ .end = AT91SAM9261_BASE_MCI + SZ_16K - 1, ++ .start = AT91SAM9RL_BASE_MCI, ++ .end = AT91SAM9RL_BASE_MCI + SZ_16K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { -+ .start = AT91SAM9261_ID_MCI, -+ .end = AT91SAM9261_ID_MCI, ++ .start = AT91SAM9RL_ID_MCI, ++ .end = AT91SAM9RL_ID_MCI, + .flags = IORESOURCE_IRQ, + }, +}; + -+static struct platform_device at91sam9261_mmc_device = { ++static struct platform_device at91sam9rl_mmc_device = { + .name = "at91_mci", + .id = -1, + .dev = { @@ -4961,7 +1551,7 @@ diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/at91sam9261_devices + .num_resources = ARRAY_SIZE(mmc_resources), +}; + -+void __init at91_add_device_mmc(struct at91_mmc_data *data) ++void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) +{ + if (!data) + return; @@ -4977,24 +1567,24 @@ diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/at91sam9261_devices + at91_set_gpio_output(data->vcc_pin, 0); + + /* CLK */ -+ at91_set_B_periph(AT91_PIN_PA2, 0); ++ at91_set_A_periph(AT91_PIN_PA2, 0); + + /* CMD */ -+ at91_set_B_periph(AT91_PIN_PA1, 1); ++ at91_set_A_periph(AT91_PIN_PA1, 1); + + /* DAT0, maybe DAT1..DAT3 */ -+ at91_set_B_periph(AT91_PIN_PA0, 1); ++ at91_set_A_periph(AT91_PIN_PA0, 1); + if (data->wire4) { -+ at91_set_B_periph(AT91_PIN_PA4, 1); -+ at91_set_B_periph(AT91_PIN_PA5, 1); -+ at91_set_B_periph(AT91_PIN_PA6, 1); ++ at91_set_A_periph(AT91_PIN_PA3, 1); ++ at91_set_A_periph(AT91_PIN_PA4, 1); ++ at91_set_A_periph(AT91_PIN_PA5, 1); + } + + mmc_data = *data; -+ platform_device_register(&at91sam9261_mmc_device); ++ platform_device_register(&at91sam9rl_mmc_device); +} +#else -+void __init at91_add_device_mmc(struct at91_mmc_data *data) {} ++void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {} +#endif + + @@ -5027,13 +1617,13 @@ diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/at91sam9261_devices + +void __init at91_add_device_nand(struct at91_nand_data *data) +{ -+ unsigned long csa, mode; ++ unsigned long csa; + + if (!data) + return; + + csa = at91_sys_read(AT91_MATRIX_EBICSA); -+ at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC); ++ at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); + + /* set the bus interface characteristics */ + at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0) @@ -5044,11 +1634,7 @@ diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/at91sam9261_devices + + at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7)); + -+ if (data->bus_width_16) -+ mode = AT91_SMC_DBW_16; -+ else -+ mode = AT91_SMC_DBW_8; -+ at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(1)); ++ at91_sys_write(AT91_SMC_MODE(3), AT91_SMC_DBW_8 | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(1)); + + /* enable pin */ + if (data->enable_pin) @@ -5062,8 +1648,8 @@ diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/at91sam9261_devices + if (data->det_pin) + at91_set_gpio_input(data->det_pin, 1); + -+ at91_set_A_periph(AT91_PIN_PC0, 0); /* NANDOE */ -+ at91_set_A_periph(AT91_PIN_PC1, 0); /* NANDWE */ ++ at91_set_A_periph(AT91_PIN_PB4, 0); /* NANDOE */ ++ at91_set_A_periph(AT91_PIN_PB5, 0); /* NANDWE */ + + nand_data = *data; + platform_device_register(&at91_nand_device); @@ -5082,18 +1668,18 @@ diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/at91sam9261_devices + +static struct resource twi_resources[] = { + [0] = { -+ .start = AT91SAM9261_BASE_TWI, -+ .end = AT91SAM9261_BASE_TWI + SZ_16K - 1, ++ .start = AT91SAM9RL_BASE_TWI0, ++ .end = AT91SAM9RL_BASE_TWI0 + SZ_16K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { -+ .start = AT91SAM9261_ID_TWI, -+ .end = AT91SAM9261_ID_TWI, ++ .start = AT91SAM9RL_ID_TWI0, ++ .end = AT91SAM9RL_ID_TWI0, + .flags = IORESOURCE_IRQ, + }, +}; + -+static struct platform_device at91sam9261_twi_device = { ++static struct platform_device at91sam9rl_twi_device = { + .name = "at91_i2c", + .id = -1, + .resource = twi_resources, @@ -5103,13 +1689,13 @@ diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/at91sam9261_devices +void __init at91_add_device_i2c(void) +{ + /* pins used for TWI interface */ -+ at91_set_A_periph(AT91_PIN_PA7, 0); /* TWD */ -+ at91_set_multi_drive(AT91_PIN_PA7, 1); ++ at91_set_A_periph(AT91_PIN_PA23, 0); /* TWD */ ++ at91_set_multi_drive(AT91_PIN_PA23, 1); + -+ at91_set_A_periph(AT91_PIN_PA8, 0); /* TWCK */ -+ at91_set_multi_drive(AT91_PIN_PA8, 1); ++ at91_set_A_periph(AT91_PIN_PA24, 0); /* TWCK */ ++ at91_set_multi_drive(AT91_PIN_PA24, 1); + -+ platform_device_register(&at91sam9261_twi_device); ++ platform_device_register(&at91sam9rl_twi_device); +} +#else +void __init at91_add_device_i2c(void) {} @@ -5123,78 +1709,48 @@ diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/at91sam9261_devices +#if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE) +static u64 spi_dmamask = 0xffffffffUL; + -+static struct resource spi0_resources[] = { ++static struct resource spi_resources[] = { + [0] = { -+ .start = AT91SAM9261_BASE_SPI0, -+ .end = AT91SAM9261_BASE_SPI0 + SZ_16K - 1, ++ .start = AT91SAM9RL_BASE_SPI, ++ .end = AT91SAM9RL_BASE_SPI + SZ_16K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { -+ .start = AT91SAM9261_ID_SPI0, -+ .end = AT91SAM9261_ID_SPI0, ++ .start = AT91SAM9RL_ID_SPI, ++ .end = AT91SAM9RL_ID_SPI, + .flags = IORESOURCE_IRQ, + }, +}; + -+static struct platform_device at91sam9261_spi0_device = { ++static struct platform_device at91sam9rl_spi_device = { + .name = "atmel_spi", + .id = 0, + .dev = { + .dma_mask = &spi_dmamask, + .coherent_dma_mask = 0xffffffff, + }, -+ .resource = spi0_resources, -+ .num_resources = ARRAY_SIZE(spi0_resources), -+}; -+ -+static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PA5, AT91_PIN_PA6 }; -+ -+static struct resource spi1_resources[] = { -+ [0] = { -+ .start = AT91SAM9261_BASE_SPI1, -+ .end = AT91SAM9261_BASE_SPI1 + SZ_16K - 1, -+ .flags = IORESOURCE_MEM, -+ }, -+ [1] = { -+ .start = AT91SAM9261_ID_SPI1, -+ .end = AT91SAM9261_ID_SPI1, -+ .flags = IORESOURCE_IRQ, -+ }, ++ .resource = spi_resources, ++ .num_resources = ARRAY_SIZE(spi_resources), +}; + -+static struct platform_device at91sam9261_spi1_device = { -+ .name = "atmel_spi", -+ .id = 1, -+ .dev = { -+ .dma_mask = &spi_dmamask, -+ .coherent_dma_mask = 0xffffffff, -+ }, -+ .resource = spi1_resources, -+ .num_resources = ARRAY_SIZE(spi1_resources), -+}; ++static const unsigned spi_standard_cs[4] = { AT91_PIN_PA28, AT91_PIN_PB7, AT91_PIN_PD8, AT91_PIN_PD9 }; + -+static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB28, AT91_PIN_PA24, AT91_PIN_PA25, AT91_PIN_PA26 }; + +void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) +{ + int i; + unsigned long cs_pin; -+ short enable_spi0 = 0; -+ short enable_spi1 = 0; + -+ /* Choose SPI chip-selects */ ++ at91_set_A_periph(AT91_PIN_PA25, 0); /* MISO */ ++ at91_set_A_periph(AT91_PIN_PA26, 0); /* MOSI */ ++ at91_set_A_periph(AT91_PIN_PA27, 0); /* SPCK */ ++ ++ /* Enable SPI chip-selects */ + for (i = 0; i < nr_devices; i++) { + if (devices[i].controller_data) + cs_pin = (unsigned long) devices[i].controller_data; -+ else if (devices[i].bus_num == 0) -+ cs_pin = spi0_standard_cs[devices[i].chip_select]; -+ else -+ cs_pin = spi1_standard_cs[devices[i].chip_select]; -+ -+ if (devices[i].bus_num == 0) -+ enable_spi0 = 1; + else -+ enable_spi1 = 1; ++ cs_pin = spi_standard_cs[devices[i].chip_select]; + + /* enable chip-select pin */ + at91_set_gpio_output(cs_pin, 1); @@ -5204,24 +1760,7 @@ diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/at91sam9261_devices + } + + spi_register_board_info(devices, nr_devices); -+ -+ /* Configure SPI bus(es) */ -+ if (enable_spi0) { -+ at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */ -+ at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */ -+ at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */ -+ -+ at91_clock_associate("spi0_clk", &at91sam9261_spi0_device.dev, "spi_clk"); -+ platform_device_register(&at91sam9261_spi0_device); -+ } -+ if (enable_spi1) { -+ at91_set_A_periph(AT91_PIN_PB30, 0); /* SPI1_MISO */ -+ at91_set_A_periph(AT91_PIN_PB31, 0); /* SPI1_MOSI */ -+ at91_set_A_periph(AT91_PIN_PB29, 0); /* SPI1_SPCK */ -+ -+ at91_clock_associate("spi1_clk", &at91sam9261_spi1_device.dev, "spi_clk"); -+ platform_device_register(&at91sam9261_spi1_device); -+ } ++ platform_device_register(&at91sam9rl_spi_device); +} +#else +void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {} @@ -5232,32 +1771,32 @@ diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/at91sam9261_devices + * LCD Controller + * -------------------------------------------------------------------- */ + -+#if defined(CONFIG_FB_AT91) || defined(CONFIG_FB_AT91_MODULE) ++#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE) +static u64 lcdc_dmamask = 0xffffffffUL; -+static struct at91fb_info lcdc_data; ++static struct atmel_lcdfb_info lcdc_data; + +static struct resource lcdc_resources[] = { + [0] = { -+ .start = AT91SAM9261_LCDC_BASE, -+ .end = AT91SAM9261_LCDC_BASE + SZ_4K - 1, ++ .start = AT91SAM9RL_LCDC_BASE, ++ .end = AT91SAM9RL_LCDC_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { -+ .start = AT91SAM9261_ID_LCDC, -+ .end = AT91SAM9261_ID_LCDC, ++ .start = AT91SAM9RL_ID_LCDC, ++ .end = AT91SAM9RL_ID_LCDC, + .flags = IORESOURCE_IRQ, + }, +#if defined(CONFIG_FB_INTSRAM) + [2] = { -+ .start = AT91SAM9261_SRAM_BASE, -+ .end = AT91SAM9261_SRAM_BASE + AT91SAM9261_SRAM_SIZE - 1, ++ .start = AT91SAM9RL_SRAM_BASE, ++ .end = AT91SAM9RL_SRAM_BASE + AT91SAM9RL_SRAM_SIZE - 1, + .flags = IORESOURCE_MEM, + }, +#endif +}; + +static struct platform_device at91_lcdc_device = { -+ .name = "at91-fb", ++ .name = "atmel_lcdfb", + .id = 0, + .dev = { + .dma_mask = &lcdc_dmamask, @@ -5268,40 +1807,39 @@ diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/at91sam9261_devices + .num_resources = ARRAY_SIZE(lcdc_resources), +}; + -+void __init at91_add_device_lcdc(struct at91fb_info *data) ++void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) +{ + if (!data) { + return; + } + -+ at91_set_A_periph(AT91_PIN_PB1, 0); /* LCDHSYNC */ -+ at91_set_A_periph(AT91_PIN_PB2, 0); /* LCDDOTCK */ -+ at91_set_A_periph(AT91_PIN_PB3, 0); /* LCDDEN */ -+ at91_set_A_periph(AT91_PIN_PB4, 0); /* LCDCC */ -+ at91_set_A_periph(AT91_PIN_PB7, 0); /* LCDD2 */ -+ at91_set_A_periph(AT91_PIN_PB8, 0); /* LCDD3 */ -+ at91_set_A_periph(AT91_PIN_PB9, 0); /* LCDD4 */ -+ at91_set_A_periph(AT91_PIN_PB10, 0); /* LCDD5 */ -+ at91_set_A_periph(AT91_PIN_PB11, 0); /* LCDD6 */ -+ at91_set_A_periph(AT91_PIN_PB12, 0); /* LCDD7 */ -+ at91_set_A_periph(AT91_PIN_PB15, 0); /* LCDD10 */ -+ at91_set_A_periph(AT91_PIN_PB16, 0); /* LCDD11 */ -+ at91_set_A_periph(AT91_PIN_PB17, 0); /* LCDD12 */ -+ at91_set_A_periph(AT91_PIN_PB18, 0); /* LCDD13 */ -+ at91_set_A_periph(AT91_PIN_PB19, 0); /* LCDD14 */ -+ at91_set_A_periph(AT91_PIN_PB20, 0); /* LCDD15 */ -+ at91_set_B_periph(AT91_PIN_PB23, 0); /* LCDD18 */ -+ at91_set_B_periph(AT91_PIN_PB24, 0); /* LCDD19 */ -+ at91_set_B_periph(AT91_PIN_PB25, 0); /* LCDD20 */ -+ at91_set_B_periph(AT91_PIN_PB26, 0); /* LCDD21 */ -+ at91_set_B_periph(AT91_PIN_PB27, 0); /* LCDD22 */ -+ at91_set_B_periph(AT91_PIN_PB28, 0); /* LCDD23 */ ++#warning "Check this" ++ at91_set_B_periph(AT91_PIN_PC5, 0); /* LCDHSYNC */ ++ at91_set_B_periph(AT91_PIN_PC6, 0); /* LCDDOTCK */ ++ at91_set_B_periph(AT91_PIN_PC7, 0); /* LCDDEN */ ++ at91_set_B_periph(AT91_PIN_PC3, 0); /* LCDCC */ ++ at91_set_B_periph(AT91_PIN_PC9, 0); /* LCDD3 */ ++ at91_set_B_periph(AT91_PIN_PC10, 0); /* LCDD4 */ ++ at91_set_B_periph(AT91_PIN_PC11, 0); /* LCDD5 */ ++ at91_set_B_periph(AT91_PIN_PC12, 0); /* LCDD6 */ ++ at91_set_B_periph(AT91_PIN_PC13, 0); /* LCDD7 */ ++ at91_set_B_periph(AT91_PIN_PC15, 0); /* LCDD11 */ ++ at91_set_B_periph(AT91_PIN_PC16, 0); /* LCDD12 */ ++ at91_set_B_periph(AT91_PIN_PC17, 0); /* LCDD13 */ ++ at91_set_B_periph(AT91_PIN_PC18, 0); /* LCDD14 */ ++ at91_set_B_periph(AT91_PIN_PC19, 0); /* LCDD15 */ ++ at91_set_B_periph(AT91_PIN_PC20, 0); /* LCDD18 */ ++ at91_set_B_periph(AT91_PIN_PC21, 0); /* LCDD19 */ ++ at91_set_B_periph(AT91_PIN_PC22, 0); /* LCDD20 */ ++ at91_set_B_periph(AT91_PIN_PC23, 0); /* LCDD21 */ ++ at91_set_B_periph(AT91_PIN_PC24, 0); /* LCDD22 */ ++ at91_set_B_periph(AT91_PIN_PC25, 0); /* LCDD23 */ + + lcdc_data = *data; + platform_device_register(&at91_lcdc_device); +} +#else -+void __init at91_add_device_lcdc(struct at91fb_info *data) {} ++void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {} +#endif + + @@ -5315,6 +1853,10 @@ diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/at91sam9261_devices + +void __init at91_init_leds(u8 cpu_led, u8 timer_led) +{ ++ /* Enable GPIO to access the LEDs */ ++ at91_set_gpio_output(cpu_led, 1); ++ at91_set_gpio_output(timer_led, 1); ++ + at91_leds_cpu = cpu_led; + at91_leds_timer = timer_led; +} @@ -5373,7 +1915,7 @@ diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/at91sam9261_devices + .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU), +}; + -+static struct platform_device at91sam9261_dbgu_device = { ++static struct platform_device at91sam9rl_dbgu_device = { + .name = "atmel_usart", + .id = 0, + .dev = { @@ -5386,19 +1928,19 @@ diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/at91sam9261_devices + +static inline void configure_dbgu_pins(void) +{ -+ at91_set_A_periph(AT91_PIN_PA9, 0); /* DRXD */ -+ at91_set_A_periph(AT91_PIN_PA10, 1); /* DTXD */ ++ at91_set_A_periph(AT91_PIN_PA21, 0); /* DRXD */ ++ at91_set_A_periph(AT91_PIN_PA22, 1); /* DTXD */ +} + +static struct resource uart0_resources[] = { + [0] = { -+ .start = AT91SAM9261_BASE_US0, -+ .end = AT91SAM9261_BASE_US0 + SZ_16K - 1, ++ .start = AT91SAM9RL_BASE_US0, ++ .end = AT91SAM9RL_BASE_US0 + SZ_16K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { -+ .start = AT91SAM9261_ID_US0, -+ .end = AT91SAM9261_ID_US0, ++ .start = AT91SAM9RL_ID_US0, ++ .end = AT91SAM9RL_ID_US0, + .flags = IORESOURCE_IRQ, + }, +}; @@ -5408,7 +1950,7 @@ diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/at91sam9261_devices + .use_dma_rx = 1, +}; + -+static struct platform_device at91sam9261_uart0_device = { ++static struct platform_device at91sam9rl_uart0_device = { + .name = "atmel_usart", + .id = 1, + .dev = { @@ -5421,21 +1963,21 @@ diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/at91sam9261_devices + +static inline void configure_usart0_pins(void) +{ -+ at91_set_A_periph(AT91_PIN_PC8, 1); /* TXD0 */ -+ at91_set_A_periph(AT91_PIN_PC9, 0); /* RXD0 */ -+ at91_set_A_periph(AT91_PIN_PC10, 0); /* RTS0 */ -+ at91_set_A_periph(AT91_PIN_PC11, 0); /* CTS0 */ ++ at91_set_A_periph(AT91_PIN_PA6, 1); /* TXD0 */ ++ at91_set_A_periph(AT91_PIN_PA7, 0); /* RXD0 */ ++ at91_set_A_periph(AT91_PIN_PA9, 0); /* RTS0 */ ++ at91_set_A_periph(AT91_PIN_PA10, 0); /* CTS0 */ +} + +static struct resource uart1_resources[] = { + [0] = { -+ .start = AT91SAM9261_BASE_US1, -+ .end = AT91SAM9261_BASE_US1 + SZ_16K - 1, ++ .start = AT91SAM9RL_BASE_US1, ++ .end = AT91SAM9RL_BASE_US1 + SZ_16K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { -+ .start = AT91SAM9261_ID_US1, -+ .end = AT91SAM9261_ID_US1, ++ .start = AT91SAM9RL_ID_US1, ++ .end = AT91SAM9RL_ID_US1, + .flags = IORESOURCE_IRQ, + }, +}; @@ -5445,7 +1987,7 @@ diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/at91sam9261_devices + .use_dma_rx = 1, +}; + -+static struct platform_device at91sam9261_uart1_device = { ++static struct platform_device at91sam9rl_uart1_device = { + .name = "atmel_usart", + .id = 2, + .dev = { @@ -5458,19 +2000,19 @@ diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/at91sam9261_devices + +static inline void configure_usart1_pins(void) +{ -+ at91_set_A_periph(AT91_PIN_PC12, 1); /* TXD1 */ -+ at91_set_A_periph(AT91_PIN_PC13, 0); /* RXD1 */ ++ at91_set_A_periph(AT91_PIN_PA11, 1); /* TXD1 */ ++ at91_set_A_periph(AT91_PIN_PA12, 0); /* RXD1 */ +} + +static struct resource uart2_resources[] = { + [0] = { -+ .start = AT91SAM9261_BASE_US2, -+ .end = AT91SAM9261_BASE_US2 + SZ_16K - 1, ++ .start = AT91SAM9RL_BASE_US2, ++ .end = AT91SAM9RL_BASE_US2 + SZ_16K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { -+ .start = AT91SAM9261_ID_US2, -+ .end = AT91SAM9261_ID_US2, ++ .start = AT91SAM9RL_ID_US2, ++ .end = AT91SAM9RL_ID_US2, + .flags = IORESOURCE_IRQ, + }, +}; @@ -5480,7 +2022,7 @@ diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/at91sam9261_devices + .use_dma_rx = 1, +}; + -+static struct platform_device at91sam9261_uart2_device = { ++static struct platform_device at91sam9rl_uart2_device = { + .name = "atmel_usart", + .id = 3, + .dev = { @@ -5493,8 +2035,43 @@ diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/at91sam9261_devices + +static inline void configure_usart2_pins(void) +{ -+ at91_set_A_periph(AT91_PIN_PC15, 0); /* RXD2 */ -+ at91_set_A_periph(AT91_PIN_PC14, 1); /* TXD2 */ ++ at91_set_A_periph(AT91_PIN_PA13, 1); /* TXD2 */ ++ at91_set_A_periph(AT91_PIN_PA14, 0); /* RXD2 */ ++} ++ ++static struct resource uart3_resources[] = { ++ [0] = { ++ .start = AT91SAM9RL_BASE_US3, ++ .end = AT91SAM9RL_BASE_US3 + SZ_16K - 1, ++ .flags = IORESOURCE_MEM, ++ }, ++ [1] = { ++ .start = AT91SAM9RL_ID_US3, ++ .end = AT91SAM9RL_ID_US3, ++ .flags = IORESOURCE_IRQ, ++ }, ++}; ++ ++static struct atmel_uart_data uart3_data = { ++ .use_dma_tx = 1, ++ .use_dma_rx = 1, ++}; ++ ++static struct platform_device at91sam9rl_uart3_device = { ++ .name = "atmel_usart", ++ .id = 4, ++ .dev = { ++ .platform_data = &uart3_data, ++ .coherent_dma_mask = 0xffffffff, ++ }, ++ .resource = uart3_resources, ++ .num_resources = ARRAY_SIZE(uart3_resources), ++}; ++ ++static inline void configure_usart3_pins(void) ++{ ++ at91_set_A_periph(AT91_PIN_PB0, 1); /* TXD3 */ ++ at91_set_A_periph(AT91_PIN_PB1, 0); /* RXD3 */ +} + +struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */ @@ -5509,23 +2086,28 @@ diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/at91sam9261_devices + switch (config->tty_map[i]) { + case 0: + configure_usart0_pins(); -+ at91_uarts[i] = &at91sam9261_uart0_device; -+ at91_clock_associate("usart0_clk", &at91sam9261_uart0_device.dev, "usart"); ++ at91_uarts[i] = &at91sam9rl_uart0_device; ++ at91_clock_associate("usart0_clk", &at91sam9rl_uart0_device.dev, "usart"); + break; + case 1: + configure_usart1_pins(); -+ at91_uarts[i] = &at91sam9261_uart1_device; -+ at91_clock_associate("usart1_clk", &at91sam9261_uart1_device.dev, "usart"); ++ at91_uarts[i] = &at91sam9rl_uart1_device; ++ at91_clock_associate("usart1_clk", &at91sam9rl_uart1_device.dev, "usart"); + break; + case 2: + configure_usart2_pins(); -+ at91_uarts[i] = &at91sam9261_uart2_device; -+ at91_clock_associate("usart2_clk", &at91sam9261_uart2_device.dev, "usart"); ++ at91_uarts[i] = &at91sam9rl_uart2_device; ++ at91_clock_associate("usart2_clk", &at91sam9rl_uart2_device.dev, "usart"); + break; + case 3: ++ configure_usart3_pins(); ++ at91_uarts[i] = &at91sam9rl_uart3_device; ++ at91_clock_associate("usart3_clk", &at91sam9rl_uart3_device.dev, "usart"); ++ break; ++ case 4: + configure_dbgu_pins(); -+ at91_uarts[i] = &at91sam9261_dbgu_device; -+ at91_clock_associate("mck", &at91sam9261_dbgu_device.dev, "usart"); ++ at91_uarts[i] = &at91sam9rl_dbgu_device; ++ at91_clock_associate("mck", &at91sam9rl_dbgu_device.dev, "usart"); + break; + default: + continue; @@ -5567,220 +2149,315 @@ diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/at91sam9261_devices +} + +arch_initcall(at91_add_standard_devices); -diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/at91sam926x_time.c linux-2.6.19/arch/arm/mach-at91rm9200/at91sam926x_time.c ---- linux-2.6.19-final/arch/arm/mach-at91rm9200/at91sam926x_time.c Thu Jan 1 02:00:00 1970 -+++ linux-2.6.19/arch/arm/mach-at91rm9200/at91sam926x_time.c Mon Nov 20 10:52:16 2006 -@@ -0,0 +1,114 @@ +diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/board-cam60.c linux-2.6-stable/arch/arm/mach-at91/board-cam60.c +--- linux-2.6.21/arch/arm/mach-at91/board-cam60.c Thu Jan 1 02:00:00 1970 ++++ linux-2.6-stable/arch/arm/mach-at91/board-cam60.c Tue May 8 12:13:30 2007 +@@ -0,0 +1,148 @@ +/* -+ * linux/arch/arm/mach-at91rm9200/at91sam926x_time.c ++ * KwikByte CAM60 + * -+ * Copyright (C) 2005-2006 M. Amine SAYA, ATMEL Rousset, France -+ * Revision 2005 M. Nicolas Diremdjian, ATMEL Rousset, France ++ * based on board-sam9260ek.c ++ * Copyright (C) 2005 SAN People ++ * Copyright (C) 2006 Atmel + * + * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + ++#include <linux/types.h> +#include <linux/init.h> -+#include <linux/interrupt.h> -+#include <linux/irq.h> -+#include <linux/kernel.h> -+#include <linux/sched.h> -+#include <linux/time.h> ++#include <linux/mm.h> ++#include <linux/module.h> ++#include <linux/platform_device.h> ++#include <linux/spi/spi.h> ++#include <linux/spi/flash.h> + +#include <asm/hardware.h> -+#include <asm/io.h> -+#include <asm/mach/time.h> ++#include <asm/setup.h> ++#include <asm/mach-types.h> ++#include <asm/irq.h> ++ ++#include <asm/mach/arch.h> ++#include <asm/mach/map.h> ++#include <asm/mach/irq.h> + -+#include <asm/arch/at91_pit.h> ++#include <asm/arch/board.h> ++#include <asm/arch/gpio.h> ++#include <asm/arch/at91sam926x_mc.h> + ++#include "generic.h" + -+#define PIT_CPIV(x) ((x) & AT91_PIT_CPIV) -+#define PIT_PICNT(x) (((x) & AT91_PIT_PICNT) >> 20) + +/* -+ * Returns number of microseconds since last timer interrupt. Note that interrupts -+ * will have been disabled by do_gettimeofday() -+ * 'LATCH' is hwclock ticks (see CLOCK_TICK_RATE in timex.h) per jiffy. -+ * 'tick' is usecs per jiffy (linux/timex.h). ++ * Serial port configuration. ++ * 0 .. 5 = USART0 .. USART5 ++ * 6 = DBGU + */ -+static unsigned long at91sam926x_gettimeoffset(void) ++static struct at91_uart_config __initdata cam60_uart_config = { ++ .console_tty = 0, /* ttyS0 */ ++ .nr_tty = 1, ++ .tty_map = { 6, -1, -1, -1, -1, -1, -1 } /* ttyS0, ..., ttyS6 */ ++}; ++ ++static void __init cam60_map_io(void) +{ -+ unsigned long elapsed; -+ unsigned long t = at91_sys_read(AT91_PIT_PIIR); ++ /* Initialize processor: 10 MHz crystal */ ++ at91sam9260_initialize(10000000); + -+ elapsed = (PIT_PICNT(t) * LATCH) + PIT_CPIV(t); /* hardware clock cycles */ ++ /* Setup the serial ports and console */ ++ at91_init_serial(&cam60_uart_config); ++} + -+ return (unsigned long)(elapsed * 1000000) / LATCH; ++static void __init cam60_init_irq(void) ++{ ++ at91sam9260_init_interrupts(NULL); +} + ++ +/* -+ * IRQ handler for the timer. ++ * SPI devices. + */ -+static irqreturn_t at91sam926x_timer_interrupt(int irq, void *dev_id) -+{ -+ volatile long nr_ticks; ++#if defined(CONFIG_MTD_DATAFLASH) ++static struct mtd_partition __initdata cam60_spi_partitions[] = { ++ { ++ .name = "BOOT1", ++ .offset = 0, ++ .size = 4 * 1056, ++ }, ++ { ++ .name = "BOOT2", ++ .offset = MTDPART_OFS_NXTBLK, ++ .size = 256 * 1056, ++ }, ++ { ++ .name = "kernel", ++ .offset = MTDPART_OFS_NXTBLK, ++ .size = 2222 * 1056, ++ }, ++ { ++ .name = "file system", ++ .offset = MTDPART_OFS_NXTBLK, ++ .size = MTDPART_SIZ_FULL, ++ }, ++}; + -+ if (at91_sys_read(AT91_PIT_SR) & AT91_PIT_PITS) { /* This is a shared interrupt */ -+ write_seqlock(&xtime_lock); ++static struct flash_platform_data __initdata cam60_spi_flash_platform_data = { ++ .name = "spi_flash", ++ .parts = cam60_spi_partitions, ++ .nr_parts = ARRAY_SIZE(cam60_spi_partitions) ++}; ++#endif + -+ /* Get number to ticks performed before interrupt and clear PIT interrupt */ -+ nr_ticks = PIT_PICNT(at91_sys_read(AT91_PIT_PIVR)); -+ do { -+ timer_tick(); -+ nr_ticks--; -+ } while (nr_ticks); ++static struct spi_board_info cam60_spi_devices[] = { ++#if defined(CONFIG_MTD_DATAFLASH) ++ { /* DataFlash chip */ ++ .modalias = "mtd_dataflash", ++ .chip_select = 0, ++ .max_speed_hz = 15 * 1000 * 1000, ++ .bus_num = 0, ++ .platform_data = &cam60_spi_flash_platform_data ++ }, ++#endif ++}; + -+ write_sequnlock(&xtime_lock); -+ return IRQ_HANDLED; -+ } else -+ return IRQ_NONE; /* not handled */ -+} + -+static struct irqaction at91sam926x_timer_irq = { -+ .name = "at91_tick", -+ .flags = IRQF_SHARED | IRQF_DISABLED | IRQF_TIMER, -+ .handler = at91sam926x_timer_interrupt ++/* ++ * MACB Ethernet device ++ */ ++static struct __initdata at91_eth_data cam60_macb_data = { ++ .phy_irq_pin = AT91_PIN_PB5, ++ .is_rmii = 0, +}; + -+void at91sam926x_timer_reset(void) ++ ++static void __init cam60_board_init(void) +{ -+ /* Disable timer */ -+ at91_sys_write(AT91_PIT_MR, 0); ++ /* Serial */ ++ at91_add_device_serial(); ++ /* SPI */ ++ at91_add_device_spi(cam60_spi_devices, ARRAY_SIZE(cam60_spi_devices)); ++ /* Ethernet */ ++ at91_add_device_eth(&cam60_macb_data); ++} ++ ++MACHINE_START(CAM60, "KwikByte CAM60") ++ /* Maintainer: KwikByte */ ++ .phys_io = AT91_BASE_SYS, ++ .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc, ++ .boot_params = AT91_SDRAM_BASE + 0x100, ++ .timer = &at91sam926x_timer, ++ .map_io = cam60_map_io, ++ .init_irq = cam60_init_irq, ++ .init_machine = cam60_board_init, ++MACHINE_END +diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/board-chub.c linux-2.6-stable/arch/arm/mach-at91/board-chub.c +--- linux-2.6.21/arch/arm/mach-at91/board-chub.c Thu Jan 1 02:00:00 1970 ++++ linux-2.6-stable/arch/arm/mach-at91/board-chub.c Tue May 8 12:13:30 2007 +@@ -0,0 +1,132 @@ ++/* ++ * linux/arch/arm/mach-at91/board-chub.c ++ * ++ * Copyright (C) 2005 SAN People, adapted for Promwad Chub board ++ * by Kuten Ivan ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA ++ */ ++ ++#include <linux/types.h> ++#include <linux/init.h> ++#include <linux/mm.h> ++#include <linux/module.h> ++#include <linux/platform_device.h> + -+ /* Clear any pending interrupts */ -+ (void) at91_sys_read(AT91_PIT_PIVR); ++#include <asm/hardware.h> ++#include <asm/setup.h> ++#include <asm/mach-types.h> ++#include <asm/irq.h> + -+ /* Set Period Interval timer and enable its interrupt */ -+ at91_sys_write(AT91_PIT_MR, (LATCH & AT91_PIT_PIV) | AT91_PIT_PITIEN | AT91_PIT_PITEN); -+} ++#include <asm/mach/arch.h> ++#include <asm/mach/map.h> ++#include <asm/mach/irq.h> ++ ++#include <asm/arch/board.h> ++#include <asm/arch/gpio.h> ++ ++#include "generic.h" + +/* -+ * Set up timer interrupt. ++ * Serial port configuration. ++ * 0 .. 3 = USART0 .. USART3 ++ * 4 = DBGU + */ -+void __init at91sam926x_timer_init(void) -+{ -+ /* Initialize and enable the timer */ -+ at91sam926x_timer_reset(); ++static struct at91_uart_config __initdata chub_uart_config = { ++ .console_tty = 0, /* ttyS0 */ ++ .nr_tty = 5, ++ .tty_map = { 4, 0, 1, 2, 3 } /* ttyS0, ..., ttyS4 */ ++}; + -+ /* Make IRQs happen for the system timer. */ -+ setup_irq(AT91_ID_SYS, &at91sam926x_timer_irq); ++static void __init chub_init_irq(void) ++{ ++ at91rm9200_init_interrupts(NULL); +} + -+#ifdef CONFIG_PM -+static void at91sam926x_timer_suspend(void) ++static void __init chub_map_io(void) +{ -+ /* Disable timer */ -+ at91_sys_write(AT91_PIT_MR, 0); ++ /* Initialize clocks: 18.432 MHz crystal */ ++ at91rm9200_initialize(18432000, AT91RM9200_PQFP); ++ ++ /* Setup the serial ports and console */ ++ at91_init_serial(&chub_uart_config); +} -+#else -+#define at91sam926x_timer_suspend NULL -+#endif + -+struct sys_timer at91sam926x_timer = { -+ .init = at91sam926x_timer_init, -+ .offset = at91sam926x_gettimeoffset, -+ .suspend = at91sam926x_timer_suspend, -+ .resume = at91sam926x_timer_reset, ++static struct at91_eth_data __initdata chub_eth_data = { ++ .phy_irq_pin = AT91_PIN_PB29, ++ .is_rmii = 0, +}; + -diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/board-1arm.c linux-2.6.19/arch/arm/mach-at91rm9200/board-1arm.c ---- linux-2.6.19-final/arch/arm/mach-at91rm9200/board-1arm.c Mon Dec 4 16:39:29 2006 -+++ linux-2.6.19/arch/arm/mach-at91rm9200/board-1arm.c Thu Nov 23 15:50:12 2006 -@@ -64,7 +64,7 @@ - at91rm9200_init_interrupts(NULL); - } - --static struct at91_eth_data __initdata onearm_eth_data = { -+static struct eth_platform_data __initdata onearm_eth_data = { - .phy_irq_pin = AT91_PIN_PC4, - .is_rmii = 1, - }; -diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/board-carmeva.c linux-2.6.19/arch/arm/mach-at91rm9200/board-carmeva.c ---- linux-2.6.19-final/arch/arm/mach-at91rm9200/board-carmeva.c Mon Dec 4 16:39:29 2006 -+++ linux-2.6.19/arch/arm/mach-at91rm9200/board-carmeva.c Thu Nov 23 15:50:12 2006 -@@ -65,8 +65,7 @@ - at91rm9200_init_interrupts(NULL); - } - -- --static struct at91_eth_data __initdata carmeva_eth_data = { -+static struct eth_platform_data __initdata carmeva_eth_data = { - .phy_irq_pin = AT91_PIN_PC4, - .is_rmii = 1, - }; -@@ -89,8 +88,33 @@ - // }; - - static struct at91_mmc_data __initdata carmeva_mmc_data = { -- .is_b = 0, -+ .slot_b = 0, - .wire4 = 1, -+ .det_pin = AT91_PIN_PB10, -+ .wp_pin = AT91_PIN_PC14, ++static struct mtd_partition __initdata chub_nand_partition[] = { ++ { ++ .name = "NAND Partition 1", ++ .offset = 0, ++ .size = MTDPART_SIZ_FULL, ++ }, +}; + -+static struct spi_board_info carmeva_spi_devices[] = { -+ { /* DataFlash chip */ -+ .modalias = "mtd_dataflash", -+ .chip_select = 0, -+ .max_speed_hz = 10 * 1000 * 1000, -+ }, -+ { /* User accessable spi - cs1 (250KHz) */ -+ .modalias = "spi-cs1", -+ .chip_select = 1, -+ .max_speed_hz = 250 * 1000, -+ }, -+ { /* User accessable spi - cs2 (1MHz) */ -+ .modalias = "spi-cs2", -+ .chip_select = 2, -+ .max_speed_hz = 1 * 1000 * 1000, -+ }, -+ { /* User accessable spi - cs3 (10MHz) */ -+ .modalias = "spi-cs3", -+ .chip_select = 3, -+ .max_speed_hz = 10 * 1000 * 1000, ++static struct mtd_partition *nand_partitions(int size, int *num_partitions) ++{ ++ *num_partitions = ARRAY_SIZE(chub_nand_partition); ++ return chub_nand_partition; ++} ++ ++static struct at91_nand_data __initdata chub_nand_data = { ++ .ale = 22, ++ .cle = 21, ++ .enable_pin = AT91_PIN_PA27, ++ .partition_info = nand_partitions, ++}; ++ ++static struct spi_board_info chub_spi_devices[] = { ++ { /* DataFlash chip */ ++ .modalias = "mtd_dataflash", ++ .chip_select = 0, ++ .max_speed_hz = 15 * 1000 * 1000, + }, - }; - - static void __init carmeva_board_init(void) -@@ -105,10 +129,10 @@ - at91_add_device_udc(&carmeva_udc_data); - /* I2C */ - at91_add_device_i2c(); ++}; ++ ++static void __init chub_board_init(void) ++{ ++ /* Serial */ ++ at91_add_device_serial(); ++ /* I2C */ ++ at91_add_device_i2c(); ++ /* Ethernet */ ++ at91_add_device_eth(&chub_eth_data); + /* SPI */ -+ at91_add_device_spi(carmeva_spi_devices, ARRAY_SIZE(carmeva_spi_devices)); - /* Compact Flash */ - // at91_add_device_cf(&carmeva_cf_data); -- /* SPI */ --// at91_add_device_spi(NULL, 0); - /* MMC */ - at91_add_device_mmc(&carmeva_mmc_data); - } -diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/board-csb337.c linux-2.6.19/arch/arm/mach-at91rm9200/board-csb337.c ---- linux-2.6.19-final/arch/arm/mach-at91rm9200/board-csb337.c Mon Dec 4 16:39:29 2006 -+++ linux-2.6.19/arch/arm/mach-at91rm9200/board-csb337.c Thu Nov 23 15:50:12 2006 -@@ -68,7 +68,7 @@ - at91rm9200_init_interrupts(NULL); - } ++ at91_add_device_spi(chub_spi_devices, ARRAY_SIZE(chub_spi_devices)); ++ /* NAND Flash */ ++ at91_add_device_nand(&chub_nand_data); ++ /* Disable write protect for NAND */ ++ at91_set_gpio_output(AT91_PIN_PB7, 1); ++ /* Power enable for 3x RS-232 and 1x RS-485 */ ++ at91_set_gpio_output(AT91_PIN_PB9, 1); ++ /* Disable write protect for FRAM */ ++ at91_set_gpio_output(AT91_PIN_PA21, 1); ++ /* Disable write protect for Dataflash */ ++ at91_set_gpio_output(AT91_PIN_PA19, 1); ++} ++ ++MACHINE_START(CHUB, "Promwad Chub") ++ /* Maintainer: Ivan Kuten AT Promwad DOT com */ ++ .phys_io = AT91_BASE_SYS, ++ .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc, ++ .boot_params = AT91_SDRAM_BASE + 0x100, ++ .timer = &at91rm9200_timer, ++ .map_io = chub_map_io, ++ .init_irq = chub_init_irq, ++ .init_machine = chub_board_init, ++MACHINE_END +diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/board-csb337.c linux-2.6-stable/arch/arm/mach-at91/board-csb337.c +--- linux-2.6.21/arch/arm/mach-at91/board-csb337.c Thu Apr 26 05:08:32 2007 ++++ linux-2.6-stable/arch/arm/mach-at91/board-csb337.c Tue May 8 12:13:30 2007 +@@ -24,6 +24,7 @@ + #include <linux/module.h> + #include <linux/platform_device.h> + #include <linux/spi/spi.h> ++#include <linux/interrupt.h> + #include <linux/mtd/physmap.h> --static struct at91_eth_data __initdata csb337_eth_data = { -+static struct eth_platform_data __initdata csb337_eth_data = { - .phy_irq_pin = AT91_PIN_PC2, - .is_rmii = 0, - }; -@@ -99,7 +99,7 @@ + #include <asm/hardware.h> +@@ -59,6 +60,7 @@ - static struct at91_mmc_data __initdata csb337_mmc_data = { - .det_pin = AT91_PIN_PD5, -- .is_b = 0, -+ .slot_b = 0, - .wire4 = 1, - .wp_pin = AT91_PIN_PD6, - }; -@@ -112,6 +112,23 @@ - }, + /* Setup the LEDs */ + at91_init_leds(AT91_PIN_PB0, AT91_PIN_PB1); ++ at91_set_gpio_output(AT91_PIN_PB2, 1); /* third (unused) LED */ + + /* Setup the serial ports and console */ + at91_init_serial(&csb337_uart_config); +@@ -149,6 +151,55 @@ + .num_resources = ARRAY_SIZE(csb_flash_resources), }; +static struct at91_gpio_led csb337_leds[] = { @@ -5800,54 +2477,61 @@ diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/board-csb337.c linu + } +}; + ++#if defined(CONFIG_CSB300_WAKE_SW0) || defined(CONFIG_CSB300_WAKE_SW1) ++static irqreturn_t switch_irq_handler(int irq, void *context) ++{ ++ return IRQ_HANDLED; ++} ++ ++static inline void __init switch_irq_setup(int irq, char *name, unsigned long mode) ++{ ++ int res; ++ ++ res = request_irq(irq, switch_irq_handler, IRQF_SAMPLE_RANDOM | mode, name, NULL); ++ if (res == 0) ++ enable_irq_wake(irq); ++} ++ ++static void __init csb300_switches(void) ++{ ++#ifdef CONFIG_CSB300_WAKE_SW0 ++ at91_set_A_periph(AT91_PIN_PB29, 1); /* IRQ0 */ ++ switch_irq_setup(AT91RM9200_ID_IRQ0, "csb300_sw0", IRQF_TRIGGER_FALLING); ++#endif ++#ifdef CONFIG_CSB300_WAKE_SW1 ++ at91_set_gpio_input(AT91_PIN_PB28, 1); ++ at91_set_deglitch(AT91_PIN_PB28, 1); ++ switch_irq_setup(AT91_PIN_PB28, "csb300_sw1", IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING); ++#endif ++ /* there's also SW2 at PA21, GPIO or TIOA2 */ ++} ++#else ++static void __init csb300_switches(void) {} ++#endif ++ static void __init csb337_board_init(void) { /* Serial */ -@@ -131,6 +148,8 @@ +@@ -168,8 +219,12 @@ at91_add_device_spi(csb337_spi_devices, ARRAY_SIZE(csb337_spi_devices)); /* MMC */ - at91_add_device_mmc(&csb337_mmc_data); + at91_add_device_mmc(0, &csb337_mmc_data); + /* LEDS */ + at91_gpio_leds(csb337_leds, ARRAY_SIZE(csb337_leds)); + /* NOR flash */ + platform_device_register(&csb_flash); ++ /* Switches on CSB300 */ ++ csb300_switches(); } MACHINE_START(CSB337, "Cogent CSB337") -diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/board-csb637.c linux-2.6.19/arch/arm/mach-at91rm9200/board-csb637.c ---- linux-2.6.19-final/arch/arm/mach-at91rm9200/board-csb637.c Mon Dec 4 16:39:29 2006 -+++ linux-2.6.19/arch/arm/mach-at91rm9200/board-csb637.c Thu Nov 23 15:50:12 2006 -@@ -67,7 +67,7 @@ - at91rm9200_init_interrupts(NULL); - } - --static struct at91_eth_data __initdata csb637_eth_data = { -+static struct eth_platform_data __initdata csb637_eth_data = { - .phy_irq_pin = AT91_PIN_PC0, - .is_rmii = 0, - }; -diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/board-dk.c linux-2.6.19/arch/arm/mach-at91rm9200/board-dk.c ---- linux-2.6.19-final/arch/arm/mach-at91rm9200/board-dk.c Mon Dec 4 16:39:29 2006 -+++ linux-2.6.19/arch/arm/mach-at91rm9200/board-dk.c Thu Nov 23 15:50:12 2006 -@@ -27,6 +27,7 @@ - #include <linux/module.h> - #include <linux/platform_device.h> - #include <linux/spi/spi.h> -+#include <linux/mtd/physmap.h> - - #include <asm/hardware.h> - #include <asm/setup.h> -@@ -39,6 +40,7 @@ - - #include <asm/arch/board.h> - #include <asm/arch/gpio.h> -+#include <asm/arch/at91rm9200_mc.h> - - #include "generic.h" - -@@ -71,7 +73,186 @@ +diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/board-dk.c linux-2.6-stable/arch/arm/mach-at91/board-dk.c +--- linux-2.6.21/arch/arm/mach-at91/board-dk.c Thu Apr 26 05:08:32 2007 ++++ linux-2.6-stable/arch/arm/mach-at91/board-dk.c Tue May 8 14:29:12 2007 +@@ -73,6 +73,185 @@ at91rm9200_init_interrupts(NULL); } --static struct at91_eth_data __initdata dk_eth_data = { +#if defined(CONFIG_FB_S1D13XXX) || defined(CONFIG_FB_S1D13XXX_MODULE) +#include <video/s1d13xxxfb.h> +#include <asm/arch/ics1523.h> @@ -5869,7 +2553,7 @@ diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/board-dk.c linux-2. + | AT91_SMC_TDF_(1) /* float time */ + ); + -+ AT91F_ICS1523_clockinit(); ++ at91_ics1523_init(); +} + +/* CRT: (active) 640x480 60Hz (PCLK=CLKI=25.175MHz) @@ -6027,46 +2711,22 @@ diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/board-dk.c linux-2. +static void __init dk_add_device_video(void) {} +#endif + -+static struct eth_platform_data __initdata dk_eth_data = { + static struct at91_eth_data __initdata dk_eth_data = { .phy_irq_pin = AT91_PIN_PC4, .is_rmii = 1, - }; -@@ -93,7 +274,7 @@ - }; +@@ -151,7 +330,7 @@ + #define DK_FLASH_SIZE 0x200000 - static struct at91_mmc_data __initdata dk_mmc_data = { -- .is_b = 0, -+ .slot_b = 0, - .wire4 = 1, + static struct physmap_flash_data dk_flash_data = { +- .width = 2, ++ .width = 2, }; -@@ -145,6 +326,37 @@ - .partition_info = nand_partitions, + static struct resource dk_flash_resource = { +@@ -170,6 +349,13 @@ + .num_resources = 1, }; -+#define DK_FLASH_BASE AT91_CHIPSELECT_0 -+#define DK_FLASH_SIZE 0x200000 -+ -+static struct physmap_flash_data dk_flash_data = { -+ .width = 2, -+}; -+ -+static struct resource dk_flash_resource = { -+ .start = DK_FLASH_BASE, -+ .end = DK_FLASH_BASE + DK_FLASH_SIZE - 1, -+ .flags = IORESOURCE_MEM, -+}; -+ -+static struct platform_device dk_flash = { -+ .name = "physmap-flash", -+ .id = 0, -+ .dev = { -+ .platform_data = &dk_flash_data, -+ }, -+ .resource = &dk_flash_resource, -+ .num_resources = 1, -+}; -+ +static struct at91_gpio_led dk_leds[] = { + { + .name = "led0", @@ -6074,69 +2734,28 @@ diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/board-dk.c linux-2. + .trigger = "timer", + } +}; -+ + static void __init dk_board_init(void) { - /* Serial */ -@@ -172,8 +384,12 @@ - #endif - /* NAND */ +@@ -200,8 +386,10 @@ at91_add_device_nand(&dk_nand_data); -+ /* NOR Flash */ -+ platform_device_register(&dk_flash); + /* NOR Flash */ + platform_device_register(&dk_flash); + /* LEDs */ -+ at91_gpio_leds(dk_leds, ARRAY_SIZE(dk_leds)); ++ at91_gpio_leds(dk_leds, ARRAY_SIZE(dk_leds)); /* VGA */ -// dk_add_device_video(); + dk_add_device_video(); } MACHINE_START(AT91RM9200DK, "Atmel AT91RM9200-DK") -diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/board-eb9200.c linux-2.6.19/arch/arm/mach-at91rm9200/board-eb9200.c ---- linux-2.6.19-final/arch/arm/mach-at91rm9200/board-eb9200.c Mon Dec 4 16:39:29 2006 -+++ linux-2.6.19/arch/arm/mach-at91rm9200/board-eb9200.c Thu Nov 23 15:50:12 2006 -@@ -65,7 +65,7 @@ - at91rm9200_init_interrupts(NULL); - } - --static struct at91_eth_data __initdata eb9200_eth_data = { -+static struct eth_platform_data __initdata eb9200_eth_data = { - .phy_irq_pin = AT91_PIN_PC4, - .is_rmii = 1, - }; -@@ -87,7 +87,7 @@ - }; - - static struct at91_mmc_data __initdata eb9200_mmc_data = { -- .is_b = 0, -+ .slot_b = 0, - .wire4 = 1, - }; - -diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/board-ek.c linux-2.6.19/arch/arm/mach-at91rm9200/board-ek.c ---- linux-2.6.19-final/arch/arm/mach-at91rm9200/board-ek.c Mon Dec 4 16:39:29 2006 -+++ linux-2.6.19/arch/arm/mach-at91rm9200/board-ek.c Thu Nov 23 15:50:12 2006 -@@ -27,6 +27,7 @@ - #include <linux/module.h> - #include <linux/platform_device.h> - #include <linux/spi/spi.h> -+#include <linux/mtd/physmap.h> - - #include <asm/hardware.h> - #include <asm/setup.h> -@@ -39,6 +40,7 @@ - - #include <asm/arch/board.h> - #include <asm/arch/gpio.h> -+#include <asm/arch/at91rm9200_mc.h> - - #include "generic.h" - -@@ -71,7 +73,188 @@ +diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/board-ek.c linux-2.6-stable/arch/arm/mach-at91/board-ek.c +--- linux-2.6.21/arch/arm/mach-at91/board-ek.c Thu Apr 26 05:08:32 2007 ++++ linux-2.6-stable/arch/arm/mach-at91/board-ek.c Tue May 8 14:29:22 2007 +@@ -73,6 +73,187 @@ at91rm9200_init_interrupts(NULL); } --static struct at91_eth_data __initdata ek_eth_data = { +#if defined(CONFIG_FB_S1D13XXX) || defined(CONFIG_FB_S1D13XXX_MODULE) +#include <video/s1d13xxxfb.h> +#include <asm/arch/ics1523.h> @@ -6158,7 +2777,7 @@ diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/board-ek.c linux-2. + | AT91_SMC_TDF_(1) /* float time */ + ); + -+ AT91F_ICS1523_clockinit(); ++ at91_ics1523_init(); +} + +/* CRT: (active) 640x480 60Hz (PCLK=CLKI=25.175MHz) @@ -6318,46 +2937,22 @@ diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/board-ek.c linux-2. +static void __init ek_add_device_video(void) {} +#endif + -+static struct eth_platform_data __initdata ek_eth_data = { + static struct at91_eth_data __initdata ek_eth_data = { .phy_irq_pin = AT91_PIN_PC4, .is_rmii = 1, - }; -@@ -87,7 +270,7 @@ +@@ -113,7 +294,7 @@ + #define EK_FLASH_SIZE 0x200000 - static struct at91_mmc_data __initdata ek_mmc_data = { - .det_pin = AT91_PIN_PB27, -- .is_b = 0, -+ .slot_b = 0, - .wire4 = 1, - .wp_pin = AT91_PIN_PA17, + static struct physmap_flash_data ek_flash_data = { +- .width = 2, ++ .width = 2, }; -@@ -107,6 +290,42 @@ - #endif + + static struct resource ek_flash_resource = { +@@ -132,6 +313,18 @@ + .num_resources = 1, }; -+#define EK_FLASH_BASE AT91_CHIPSELECT_0 -+#define EK_FLASH_SIZE 0x200000 -+ -+static struct physmap_flash_data ek_flash_data = { -+ .width = 2, -+}; -+ -+static struct resource ek_flash_resource = { -+ .start = EK_FLASH_BASE, -+ .end = EK_FLASH_BASE + EK_FLASH_SIZE - 1, -+ .flags = IORESOURCE_MEM, -+}; -+ -+static struct platform_device ek_flash = { -+ .name = "physmap-flash", -+ .id = 0, -+ .dev = { -+ .platform_data = &ek_flash_data, -+ }, -+ .resource = &ek_flash_resource, -+ .num_resources = 1, -+}; -+ +static struct at91_gpio_led ek_leds[] = { + { + .name = "led0", @@ -6370,16 +2965,13 @@ diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/board-ek.c linux-2. + .trigger = "timer", + } +}; -+ + static void __init ek_board_init(void) { - /* Serial */ -@@ -130,8 +349,12 @@ - at91_set_gpio_output(AT91_PIN_PB22, 1); /* this MMC card slot can optionally use SPI signaling (CS3). */ - at91_add_device_mmc(&ek_mmc_data); +@@ -158,8 +351,10 @@ #endif -+ /* NOR Flash */ -+ platform_device_register(&ek_flash); + /* NOR Flash */ + platform_device_register(&ek_flash); + /* LEDs */ + at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds)); /* VGA */ @@ -6388,267 +2980,482 @@ diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/board-ek.c linux-2. } MACHINE_START(AT91RM9200EK, "Atmel AT91RM9200-EK") -diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/board-kafa.c linux-2.6.19/arch/arm/mach-at91rm9200/board-kafa.c ---- linux-2.6.19-final/arch/arm/mach-at91rm9200/board-kafa.c Mon Dec 4 16:39:29 2006 -+++ linux-2.6.19/arch/arm/mach-at91rm9200/board-kafa.c Thu Nov 23 15:50:12 2006 -@@ -67,7 +67,7 @@ - at91rm9200_init_interrupts(NULL); - } +diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/board-kb9202.c linux-2.6-stable/arch/arm/mach-at91/board-kb9202.c +--- linux-2.6.21/arch/arm/mach-at91/board-kb9202.c Thu Apr 26 05:08:32 2007 ++++ linux-2.6-stable/arch/arm/mach-at91/board-kb9202.c Tue May 8 12:21:31 2007 +@@ -37,6 +37,8 @@ + #include <asm/arch/board.h> + #include <asm/arch/gpio.h> --static struct at91_eth_data __initdata kafa_eth_data = { -+static struct eth_platform_data __initdata kafa_eth_data = { - .phy_irq_pin = AT91_PIN_PC4, - .is_rmii = 0, - }; -diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/board-kb9202.c linux-2.6.19/arch/arm/mach-at91rm9200/board-kb9202.c ---- linux-2.6.19-final/arch/arm/mach-at91rm9200/board-kb9202.c Mon Dec 4 16:39:29 2006 -+++ linux-2.6.19/arch/arm/mach-at91rm9200/board-kb9202.c Thu Nov 23 15:50:12 2006 -@@ -68,7 +68,7 @@ - at91rm9200_init_interrupts(NULL); - } ++#include <asm/arch/at91rm9200_mc.h> ++ + #include "generic.h" --static struct at91_eth_data __initdata kb9202_eth_data = { -+static struct eth_platform_data __initdata kb9202_eth_data = { - .phy_irq_pin = AT91_PIN_PB29, - .is_rmii = 0, - }; -@@ -84,7 +84,7 @@ - static struct at91_mmc_data __initdata kb9202_mmc_data = { - .det_pin = AT91_PIN_PB2, -- .is_b = 0, -+ .slot_b = 0, - .wire4 = 1, +@@ -111,6 +113,48 @@ + .partition_info = nand_partitions, }; -diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/board-sam9260ek.c linux-2.6.19/arch/arm/mach-at91rm9200/board-sam9260ek.c ---- linux-2.6.19-final/arch/arm/mach-at91rm9200/board-sam9260ek.c Thu Jan 1 02:00:00 1970 -+++ linux-2.6.19/arch/arm/mach-at91rm9200/board-sam9260ek.c Sat Nov 25 10:47:45 2006 -@@ -0,0 +1,201 @@ -+/* -+ * linux/arch/arm/mach-at91rm9200/board-ek.c -+ * -+ * Copyright (C) 2005 SAN People -+ * Copyright (C) 2006 Atmel -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -+ */ + -+#include <linux/types.h> -+#include <linux/init.h> -+#include <linux/mm.h> -+#include <linux/module.h> -+#include <linux/platform_device.h> -+#include <linux/spi/spi.h> ++#if defined(CONFIG_FB_S1D15605) ++#warning "Rather pass reset pin via platform_data" ++static struct resource kb9202_lcd_resources[] = { ++ [0] = { ++ .start = AT91_CHIPSELECT_2, ++ .end = AT91_CHIPSELECT_2 + 0x200FF, ++ .flags = IORESOURCE_MEM ++ }, ++ [1] = { /* reset pin */ ++ .start = AT91_PIN_PC22, ++ .end = AT91_PIN_PC22, ++ .flags = IORESOURCE_MEM ++ }, ++}; + -+#include <asm/hardware.h> -+#include <asm/setup.h> -+#include <asm/mach-types.h> -+#include <asm/irq.h> ++static struct platform_device kb9202_lcd_device = { ++ .name = "s1d15605fb", ++ .id = 0, ++ .num_resources = ARRAY_SIZE(kb9202_lcd_resources), ++ .resource = kb9202_lcd_resources, ++}; + -+#include <asm/mach/arch.h> -+#include <asm/mach/map.h> -+#include <asm/mach/irq.h> ++static void __init kb9202_add_device_lcd(void) ++{ ++ /* In case the boot loader did not set the chip select mode and timing */ ++ at91_sys_write(AT91_SMC_CSR(2), ++ AT91_SMC_WSEN | AT91_SMC_NWS_(18) | AT91_SMC_TDF_(1) | AT91_SMC_DBW_8 | ++ AT91_SMC_RWSETUP_(1) | AT91_SMC_RWHOLD_(1)); + -+#include <asm/arch/board.h> -+#include <asm/arch/gpio.h> -+#include <asm/arch/at91sam926x_mc.h> ++ /* Backlight pin = output, off */ ++ at91_set_gpio_output(AT91_PIN_PC23, 0); + -+#include "generic.h" ++ /* Reset pin = output, in reset */ ++ at91_set_gpio_output(AT91_PIN_PC22, 0); + ++ platform_device_register(&kb9202_lcd_device); ++} ++#else ++static void __init kb9202_add_device_lcd(void) {} ++#endif + -+/* -+ * Serial port configuration. -+ * 0 .. 5 = USART0 .. USART5 -+ * 6 = DBGU + static void __init kb9202_board_init(void) + { + /* Serial */ +@@ -129,6 +173,8 @@ + at91_add_device_spi(NULL, 0); + /* NAND */ + at91_add_device_nand(&kb9202_nand_data); ++ /* LCD */ ++ kb9202_add_device_lcd(); + } + + MACHINE_START(KB9200, "KB920x") +diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/board-sam9260ek.c linux-2.6-stable/arch/arm/mach-at91/board-sam9260ek.c +--- linux-2.6.21/arch/arm/mach-at91/board-sam9260ek.c Thu Apr 26 05:08:32 2007 ++++ linux-2.6-stable/arch/arm/mach-at91/board-sam9260ek.c Tue May 8 12:13:30 2007 +@@ -104,9 +104,9 @@ + }, + #endif + #endif +-#if defined(CONFIG_SND_AT73C213) ++#if defined(CONFIG_SND_AT73C213) || defined(CONFIG_SND_AT73C213_MODULE) + { /* AT73C213 DAC */ +- .modalias = "snd_at73c213", ++ .modalias = "at73c213", + .chip_select = 0, + .max_speed_hz = 10 * 1000 * 1000, + .bus_num = 1, +@@ -118,7 +118,7 @@ + /* + * MACB Ethernet device + */ +-static struct __initdata at91_eth_data ek_macb_data = { ++static struct at91_eth_data __initdata ek_macb_data = { + .phy_irq_pin = AT91_PIN_PA7, + .is_rmii = 1, + }; +@@ -188,6 +188,8 @@ + at91_add_device_eth(&ek_macb_data); + /* MMC */ + at91_add_device_mmc(0, &ek_mmc_data); ++ /* I2C */ ++ at91_add_device_i2c(); + } + + MACHINE_START(AT91SAM9260EK, "Atmel AT91SAM9260-EK") +diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/board-sam9261ek.c linux-2.6-stable/arch/arm/mach-at91/board-sam9261ek.c +--- linux-2.6.21/arch/arm/mach-at91/board-sam9261ek.c Thu Apr 26 05:08:32 2007 ++++ linux-2.6-stable/arch/arm/mach-at91/board-sam9261ek.c Wed May 9 12:37:19 2007 +@@ -25,7 +25,11 @@ + #include <linux/module.h> + #include <linux/platform_device.h> + #include <linux/spi/spi.h> ++#include <linux/spi/ads7846.h> + #include <linux/dm9000.h> ++#include <linux/fb.h> ++ ++#include <video/atmel_lcdc.h> + + #include <asm/hardware.h> + #include <asm/setup.h> +@@ -59,6 +63,9 @@ + /* Initialize processor: 18.432 MHz crystal */ + at91sam9261_initialize(18432000); + ++ /* Setup the LEDs */ ++ at91_init_leds(AT91_PIN_PA13, AT91_PIN_PA14); ++ + /* Setup the serial ports and console */ + at91_init_serial(&ek_uart_config); + } +@@ -195,6 +202,41 @@ + }; + + /* ++ * ADS7846 Touchscreen + */ -+static struct at91_uart_config __initdata ek_uart_config = { -+ .console_tty = 0, /* ttyS0 */ -+ .nr_tty = 3, -+ .tty_map = { 6, 0, 1, -1, -1, -1, -1 } /* ttyS0, ..., ttyS6 */ -+}; ++#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE) + -+static void __init ek_map_io(void) ++static int ads7843_pendown_state(void) +{ -+ /* Initialize processor: 18.432 MHz crystal */ -+ at91sam9260_initialize(18432000); -+ -+ /* Setup the serial ports and console */ -+ at91_init_serial(&ek_uart_config); ++ return !at91_get_gpio_value(AT91_PIN_PC2); /* Touchscreen PENIRQ */ +} + -+static void __init ek_init_irq(void) ++static struct ads7846_platform_data ads_info = { ++ .model = 7843, ++ .x_min = 150, ++ .x_max = 3830, ++ .y_min = 190, ++ .y_max = 3830, ++ .vref_delay_usecs = 100, ++ .x_plate_ohms = 450, ++ .y_plate_ohms = 250, ++ .pressure_max = 15000, ++ .debounce_max = 1, ++ .debounce_rep = 0, ++ .debounce_tol = (~0), ++ .get_pendown_state = ads7843_pendown_state, ++}; ++ ++static void __init ek_add_device_ts(void) +{ -+ at91sam9260_init_interrupts(NULL); ++ at91_set_B_periph(AT91_PIN_PC2, 1); /* External IRQ0, with pullup */ ++ at91_set_gpio_input(AT91_PIN_PA11, 1); /* Touchscreen BUSY signal */ +} ++#else ++static void __init ek_add_device_ts(void) {} ++#endif + -+ +/* -+ * USB Host port + * SPI devices + */ + static struct spi_board_info ek_spi_devices[] = { +@@ -204,6 +246,17 @@ + .max_speed_hz = 15 * 1000 * 1000, + .bus_num = 0, + }, ++#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE) ++ { ++ .modalias = "ads7846", ++ .chip_select = 2, ++ .max_speed_hz = 125000 * 26, /* (max sample rate @ 3V) * (cmd + data + overhead) */ ++ .bus_num = 0, ++ .platform_data = &ads_info, ++ .irq = AT91SAM9261_ID_IRQ0, ++ .controller_data = AT91_PIN_PA28, /* CS pin */ ++ }, ++#endif + #if defined(CONFIG_MTD_AT91_DATAFLASH_CARD) + { /* DataFlash card - jumper (J12) configurable to CS3 or CS0 */ + .modalias = "mtd_dataflash", +@@ -211,9 +264,9 @@ + .max_speed_hz = 15 * 1000 * 1000, + .bus_num = 0, + }, +-#elif defined(CONFIG_SND_AT73C213) ++#elif defined(CONFIG_SND_AT73C213) || defined(CONFIG_SND_AT73C213_MODULE) + { /* AT73C213 DAC */ +- .modalias = "snd_at73c213", ++ .modalias = "at73c213", + .chip_select = 3, + .max_speed_hz = 10 * 1000 * 1000, + .bus_num = 0, +@@ -222,6 +275,65 @@ + }; + + ++/* ++ * LCD Controller + */ -+static struct at91_usbh_data __initdata ek_usbh_data = { -+ .ports = 2, ++#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE) ++static struct fb_videomode at91_tft_vga_modes[] = { ++ { ++ .name = "TX09D50VM1CCA @ 60", ++ .refresh = 60, ++ .xres = 240, .yres = 320, ++ .pixclock = KHZ2PICOS(4965), ++ ++ .left_margin = 1, .right_margin = 33, ++ .upper_margin = 1, .lower_margin = 0, ++ .hsync_len = 5, .vsync_len = 1, ++ ++ .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, ++ .vmode = FB_VMODE_NONINTERLACED, ++ }, +}; + -+/* -+ * USB Device port -+ */ -+static struct at91_udc_data __initdata ek_udc_data = { -+ .vbus_pin = AT91_PIN_PC5, -+ .pullup_pin = 0, /* pull-up driven by UDC */ ++static struct fb_monspecs at91fb_default_monspecs = { ++ .manufacturer = "HIT", ++ .monitor = "TX09D50VM1CCA", ++ ++ .modedb = at91_tft_vga_modes, ++ .modedb_len = ARRAY_SIZE(at91_tft_vga_modes), ++ .hfmin = 15000, ++ .hfmax = 64000, ++ .vfmin = 50, ++ .vfmax = 150, +}; + ++#define AT91SAM9261_DEFAULT_LCDCON2 (ATMEL_LCDC_MEMOR_LITTLE \ ++ | ATMEL_LCDC_DISTYPE_TFT \ ++ | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE) + -+/* -+ * SPI devices. -+ */ -+static struct spi_board_info ek_spi_devices[] = { -+#if !defined(CONFIG_MMC_AT91) -+ { /* DataFlash chip */ -+ .modalias = "mtd_dataflash", -+ .chip_select = 1, -+ .max_speed_hz = 15 * 1000 * 1000, -+ .bus_num = 0, -+ }, -+#if defined(CONFIG_MTD_AT91_DATAFLASH_CARD) -+ { /* DataFlash card */ -+ .modalias = "mtd_dataflash", -+ .chip_select = 0, -+ .max_speed_hz = 15 * 1000 * 1000, -+ .bus_num = 0, -+ }, -+#endif -+#endif -+#if defined(CONFIG_SND_AT73C213) -+ { /* AT73C213 DAC */ -+ .modalias = "snd_at73c213", -+ .chip_select = 0, -+ .max_speed_hz = 10 * 1000 * 1000, -+ .bus_num = 1, -+ }, ++static void at91_lcdc_power_control(int on) ++{ ++ if (on) ++ at91_set_gpio_value(AT91_PIN_PA12, 0); /* power up */ ++ else ++ at91_set_gpio_value(AT91_PIN_PA12, 1); /* power down */ ++} ++ ++/* Driver datas */ ++static struct atmel_lcdfb_info __initdata ek_lcdc_data = { ++ .default_bpp = 16, ++ .default_dmacon = ATMEL_LCDC_DMAEN, ++ .default_lcdcon2 = AT91SAM9261_DEFAULT_LCDCON2, ++ .default_monspecs = &at91fb_default_monspecs, ++ .atmel_lcdfb_power_control = at91_lcdc_power_control, ++ .guard_time = 1, ++}; ++ ++#else ++static struct atmel_lcdfb_info __initdata ek_lcdc_data; +#endif ++ ++ + static void __init ek_board_init(void) + { + /* Serial */ +@@ -241,10 +353,14 @@ + #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE) + /* SPI */ + at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices)); ++ /* Touchscreen */ ++ ek_add_device_ts(); + #else + /* MMC */ + at91_add_device_mmc(0, &ek_mmc_data); + #endif ++ /* LCD Controller */ ++ at91_add_device_lcdc(&ek_lcdc_data); + } + + MACHINE_START(AT91SAM9261EK, "Atmel AT91SAM9261-EK") +diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/board-sam9263ek.c linux-2.6-stable/arch/arm/mach-at91/board-sam9263ek.c +--- linux-2.6.21/arch/arm/mach-at91/board-sam9263ek.c Thu Apr 26 05:08:32 2007 ++++ linux-2.6-stable/arch/arm/mach-at91/board-sam9263ek.c Tue May 8 12:56:33 2007 +@@ -25,6 +25,10 @@ + #include <linux/module.h> + #include <linux/platform_device.h> + #include <linux/spi/spi.h> ++#include <linux/spi/ads7846.h> ++#include <linux/fb.h> ++ ++#include <video/atmel_lcdc.h> + + #include <asm/hardware.h> + #include <asm/setup.h> +@@ -86,6 +90,40 @@ + + + /* ++ * ADS7846 Touchscreen ++ */ ++#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE) ++static int ads7843_pendown_state(void) ++{ ++ return !at91_get_gpio_value(AT91_PIN_PA15); /* Touchscreen PENIRQ */ ++} ++ ++static struct ads7846_platform_data ads_info = { ++ .model = 7843, ++ .x_min = 150, ++ .x_max = 3830, ++ .y_min = 190, ++ .y_max = 3830, ++ .vref_delay_usecs = 100, ++ .x_plate_ohms = 450, ++ .y_plate_ohms = 250, ++ .pressure_max = 15000, ++ .debounce_max = 1, ++ .debounce_rep = 0, ++ .debounce_tol = (~0), ++ .get_pendown_state = ads7843_pendown_state, +}; + ++static void __init ek_add_device_ts(void) ++{ ++ at91_set_B_periph(AT91_PIN_PA15, 1); /* External IRQ1, with pullup */ ++ at91_set_gpio_input(AT91_PIN_PA31, 1); /* Touchscreen BUSY signal */ ++} ++#else ++static void __init ek_add_device_ts(void) {} ++#endif + +/* + * SPI devices. + */ + static struct spi_board_info ek_spi_devices[] = { +@@ -97,6 +135,16 @@ + .bus_num = 0, + }, + #endif ++#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE) ++ { ++ .modalias = "ads7846", ++ .chip_select = 3, ++ .max_speed_hz = 125000 * 26, /* (max sample rate @ 3V) * (cmd + data + overhead) */ ++ .bus_num = 0, ++ .platform_data = &ads_info, ++ .irq = AT91SAM9263_ID_IRQ1, ++ }, ++#endif + }; + + +@@ -112,6 +160,14 @@ + + + /* + * MACB Ethernet device + */ -+static struct __initdata eth_platform_data ek_macb_data = { ++static struct at91_eth_data __initdata ek_macb_data = { + .is_rmii = 1, +}; + + +/* -+ * NAND flash + * NAND flash + */ + static struct mtd_partition __initdata ek_nand_partition[] = { +@@ -148,6 +204,73 @@ + }; + + ++/* ++ * LCD Controller + */ -+static struct mtd_partition __initdata ek_nand_partition[] = { -+ { -+ .name = "Partition 1", -+ .offset = 0, -+ .size = 256 * 1024, -+ }, ++#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE) ++static struct fb_videomode at91_tft_vga_modes[] = { + { -+ .name = "Partition 2", -+ .offset = 256 * 1024, -+ .size = MTDPART_SIZ_FULL, ++ .name = "TX09D50VM1CCA @ 60", ++ .refresh = 60, ++ .xres = 240, .yres = 320, ++ .pixclock = KHZ2PICOS(4965), ++ ++ .left_margin = 1, .right_margin = 33, ++ .upper_margin = 1, .lower_margin = 0, ++ .hsync_len = 5, .vsync_len = 1, ++ ++ .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, ++ .vmode = FB_VMODE_NONINTERLACED, + }, +}; + -+static struct mtd_partition *nand_partitions(int size, int *num_partitions) ++static struct fb_monspecs at91fb_default_monspecs = { ++ .manufacturer = "HIT", ++ .monitor = "TX09D70VM1CCA", ++ ++ .modedb = at91_tft_vga_modes, ++ .modedb_len = ARRAY_SIZE(at91_tft_vga_modes), ++ .hfmin = 15000, ++ .hfmax = 64000, ++ .vfmin = 50, ++ .vfmax = 150, ++}; ++ ++#define AT91SAM9263_DEFAULT_LCDCON2 (ATMEL_LCDC_MEMOR_LITTLE \ ++ | ATMEL_LCDC_DISTYPE_TFT \ ++ | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE) ++ ++static void at91_lcdc_power_control(int on) +{ -+ *num_partitions = ARRAY_SIZE(ek_nand_partition); -+ return ek_nand_partition; ++ if (on) ++ at91_set_gpio_value(AT91_PIN_PD12, 0); /* power up */ ++ else ++ at91_set_gpio_value(AT91_PIN_PD12, 1); /* power down */ +} + -+static struct at91_nand_data __initdata ek_nand_data = { -+ .ale = 21, -+ .cle = 22, -+// .det_pin = ... not connected -+ .rdy_pin = AT91_PIN_PC13, -+ .enable_pin = AT91_PIN_PC14, -+ .partition_info = nand_partitions, -+#if defined(CONFIG_MTD_NAND_AT91_BUSWIDTH_16) -+ .bus_width_16 = 1, ++/* Driver datas */ ++static struct atmel_lcdfb_info __initdata ek_lcdc_data = { ++ .default_bpp = 16, ++ .default_dmacon = ATMEL_LCDC_DMAEN, ++ .default_lcdcon2 = AT91SAM9263_DEFAULT_LCDCON2, ++ .default_monspecs = &at91fb_default_monspecs, ++ .atmel_lcdfb_power_control = at91_lcdc_power_control, ++ .guard_time = 1, ++}; ++ +#else -+ .bus_width_16 = 0, ++static struct atmel_lcdfb_info __initdata ek_lcdc_data; +#endif -+}; + + +/* -+ * MCI (SD/MMC) ++ * AC97 + */ -+static struct at91_mmc_data __initdata ek_mmc_data = { -+ .slot_b = 1, -+ .wire4 = 1, -+// .det_pin = ... not connected -+// .wp_pin = ... not connected -+// .vcc_pin = ... not connected ++static struct atmel_ac97_data ek_ac97_data = { ++ .reset_pin = AT91_PIN_PA13, +}; + -+static void __init ek_board_init(void) -+{ -+ /* Serial */ -+ at91_add_device_serial(); -+ /* USB Host */ -+ at91_add_device_usbh(&ek_usbh_data); -+ /* USB Device */ -+ at91_add_device_udc(&ek_udc_data); -+ /* SPI */ -+ at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices)); -+ /* NAND */ -+ at91_add_device_nand(&ek_nand_data); ++ + static void __init ek_board_init(void) + { + /* Serial */ +@@ -157,11 +280,22 @@ + /* USB Device */ + at91_add_device_udc(&ek_udc_data); + /* SPI */ ++ at91_set_gpio_output(AT91_PIN_PE20, 1); /* select spi0 clock */ + at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices)); ++ /* Touchscreen */ ++ ek_add_device_ts(); + /* MMC */ + at91_add_device_mmc(1, &ek_mmc_data); + /* Ethernet */ + at91_add_device_eth(&ek_macb_data); -+ /* MMC */ -+ at91_add_device_mmc(&ek_mmc_data); -+} -+ -+MACHINE_START(AT91SAM9260EK, "Atmel AT91SAM9260-EK") -+ /* Maintainer: Atmel */ -+ .phys_io = AT91_BASE_SYS, -+ .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc, -+ .boot_params = AT91_SDRAM_BASE + 0x100, -+ .timer = &at91sam926x_timer, -+ .map_io = ek_map_io, -+ .init_irq = ek_init_irq, -+ .init_machine = ek_board_init, -+MACHINE_END -diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/board-sam9261ek.c linux-2.6.19/arch/arm/mach-at91rm9200/board-sam9261ek.c ---- linux-2.6.19-final/arch/arm/mach-at91rm9200/board-sam9261ek.c Thu Jan 1 02:00:00 1970 -+++ linux-2.6.19/arch/arm/mach-at91rm9200/board-sam9261ek.c Sat Nov 25 11:07:44 2006 -@@ -0,0 +1,259 @@ + /* NAND */ + at91_add_device_nand(&ek_nand_data); ++ /* I2C */ ++ at91_add_device_i2c(); ++ /* LCD Controller */ ++ at91_add_device_lcdc(&ek_lcdc_data); ++ /* AC97 */ ++ at91_add_device_ac97(&ek_ac97_data); + } + + MACHINE_START(AT91SAM9263EK, "Atmel AT91SAM9263-EK") +diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/board-sam9rlek.c linux-2.6-stable/arch/arm/mach-at91/board-sam9rlek.c +--- linux-2.6.21/arch/arm/mach-at91/board-sam9rlek.c Thu Jan 1 02:00:00 1970 ++++ linux-2.6-stable/arch/arm/mach-at91/board-sam9rlek.c Wed May 9 10:58:34 2007 +@@ -0,0 +1,204 @@ +/* -+ * linux/arch/arm/mach-at91rm9200/board-ek.c -+ * + * Copyright (C) 2005 SAN People -+ * Copyright (C) 2006 Atmel -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. ++ * Copyright (C) 2007 Atmel Corporation + * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file COPYING in the main directory of this archive for ++ * more details. + */ + +#include <linux/types.h> @@ -6657,7 +3464,10 @@ diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/board-sam9261ek.c l +#include <linux/module.h> +#include <linux/platform_device.h> +#include <linux/spi/spi.h> -+#include <linux/dm9000.h> ++#include <linux/fb.h> ++#include <linux/clk.h> ++ ++#include <video/atmel_lcdc.h> + +#include <asm/hardware.h> +#include <asm/setup.h> @@ -6677,19 +3487,19 @@ diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/board-sam9261ek.c l + +/* + * Serial port configuration. -+ * 0 .. 2 = USART0 .. USART2 -+ * 3 = DBGU ++ * 0 .. 3 = USART0 .. USART3 ++ * 4 = DBGU + */ +static struct at91_uart_config __initdata ek_uart_config = { + .console_tty = 0, /* ttyS0 */ -+ .nr_tty = 1, -+ .tty_map = { 3, -1, -1, -1 } /* ttyS0, ..., ttyS3 */ ++ .nr_tty = 2, ++ .tty_map = { 4, 0, -1, -1, -1 } /* ttyS0, ..., ttyS4 */ +}; + +static void __init ek_map_io(void) +{ -+ /* Initialize processor: 18.432 MHz crystal */ -+ at91sam9261_initialize(18432000); ++ /* Initialize processor: 12.000 MHz crystal */ ++ at91sam9rl_initialize(12000000); + + /* Setup the serial ports and console */ + at91_init_serial(&ek_uart_config); @@ -6697,94 +3507,16 @@ diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/board-sam9261ek.c l + +static void __init ek_init_irq(void) +{ -+ at91sam9261_init_interrupts(NULL); ++ at91sam9rl_init_interrupts(NULL); +} + + +/* -+ * DM9000 ethernet device -+ */ -+#if defined(CONFIG_DM9000) -+static struct resource at91sam9261_dm9000_resource[] = { -+ [0] = { -+ .start = AT91_CHIPSELECT_2, -+ .end = AT91_CHIPSELECT_2 + 3, -+ .flags = IORESOURCE_MEM -+ }, -+ [1] = { -+ .start = AT91_CHIPSELECT_2 + 0x44, -+ .end = AT91_CHIPSELECT_2 + 0xFF, -+ .flags = IORESOURCE_MEM -+ }, -+ [2] = { -+ .start = AT91_PIN_PC11, -+ .end = AT91_PIN_PC11, -+ .flags = IORESOURCE_IRQ -+ } -+}; -+ -+static struct dm9000_plat_data dm9000_platdata = { -+ .flags = DM9000_PLATF_16BITONLY, -+}; -+ -+static struct platform_device at91sam9261_dm9000_device = { -+ .name = "dm9000", -+ .id = 0, -+ .num_resources = ARRAY_SIZE(at91sam9261_dm9000_resource), -+ .resource = at91sam9261_dm9000_resource, -+ .dev = { -+ .platform_data = &dm9000_platdata, -+ } -+}; -+ -+static void __init ek_add_device_dm9000(void) -+{ -+ /* -+ * Configure Chip-Select 2 on SMC for the DM9000. -+ * Note: These timings were calculated for MASTER_CLOCK = 100000000 -+ * according to the DM9000 timings. -+ */ -+ at91_sys_write(AT91_SMC_SETUP(2), AT91_SMC_NWESETUP_(2) | AT91_SMC_NCS_WRSETUP_(0) | AT91_SMC_NRDSETUP_(2) | AT91_SMC_NCS_RDSETUP_(0)); -+ at91_sys_write(AT91_SMC_PULSE(2), AT91_SMC_NWEPULSE_(4) | AT91_SMC_NCS_WRPULSE_(8) | AT91_SMC_NRDPULSE_(4) | AT91_SMC_NCS_RDPULSE_(8)); -+ at91_sys_write(AT91_SMC_CYCLE(2), AT91_SMC_NWECYCLE_(16) | AT91_SMC_NRDCYCLE_(16)); -+ at91_sys_write(AT91_SMC_MODE(2), AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_BAT_WRITE | AT91_SMC_DBW_16 | AT91_SMC_TDF_(1)); -+ -+ /* Configure Reset signal as output */ -+ at91_set_gpio_output(AT91_PIN_PC10, 0); -+ -+ /* Configure Interrupt pin as input, no pull-up */ -+ at91_set_gpio_input(AT91_PIN_PC11, 0); -+ -+ platform_device_register(&at91sam9261_dm9000_device); -+} -+#else -+static void __init ek_add_device_dm9000(void) {} -+#endif /* CONFIG_DM9000 */ -+ -+ -+/* -+ * USB Host Port -+ */ -+static struct at91_usbh_data __initdata ek_usbh_data = { -+ .ports = 2, -+}; -+ -+ -+/* -+ * USB Device Port -+ */ -+static struct at91_udc_data __initdata ek_udc_data = { -+ .vbus_pin = AT91_PIN_PB29, -+ .pullup_pin = 0, /* pull-up driven by UDC */ -+}; -+ -+ -+/* + * MCI (SD/MMC) + */ +static struct at91_mmc_data __initdata ek_mmc_data = { + .wire4 = 1, -+// .det_pin = ... not connected ++ .det_pin = AT91_PIN_PA15, +// .wp_pin = ... not connected +// .vcc_pin = ... not connected +}; @@ -6813,19 +3545,16 @@ diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/board-sam9261ek.c l +} + +static struct at91_nand_data __initdata ek_nand_data = { -+ .ale = 22, -+ .cle = 21, ++ .ale = 21, ++ .cle = 22, +// .det_pin = ... not connected -+ .rdy_pin = AT91_PIN_PC15, -+ .enable_pin = AT91_PIN_PC14, ++ .rdy_pin = AT91_PIN_PD17, ++ .enable_pin = AT91_PIN_PB6, + .partition_info = nand_partitions, -+#if defined(CONFIG_MTD_NAND_AT91_BUSWIDTH_16) -+ .bus_width_16 = 1, -+#else + .bus_width_16 = 0, -+#endif +}; + ++ +/* + * SPI devices + */ @@ -6836,50 +3565,85 @@ diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/board-sam9261ek.c l + .max_speed_hz = 15 * 1000 * 1000, + .bus_num = 0, + }, -+#if defined(CONFIG_MTD_AT91_DATAFLASH_CARD) -+ { /* DataFlash card - jumper (J12) configurable to CS3 or CS0 */ -+ .modalias = "mtd_dataflash", -+ .chip_select = 3, -+ .max_speed_hz = 15 * 1000 * 1000, -+ .bus_num = 0, -+ }, -+#elif defined(CONFIG_SND_AT73C213) -+ { /* AT73C213 DAC */ -+ .modalias = "snd_at73c213", -+ .chip_select = 3, -+ .max_speed_hz = 10 * 1000 * 1000, -+ .bus_num = 0, ++}; ++ ++ ++/* ++ * LCD Controller ++ */ ++#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE) ++static struct fb_videomode at91_tft_vga_modes[] = { ++ { ++ .name = "TX09D50VM1CCA @ 60", ++ .refresh = 60, ++ .xres = 240, .yres = 320, ++ .pixclock = KHZ2PICOS(4965), ++ ++ .left_margin = 1, .right_margin = 33, ++ .upper_margin = 1, .lower_margin = 0, ++ .hsync_len = 5, .vsync_len = 1, ++ ++ .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, ++ .vmode = FB_VMODE_NONINTERLACED, + }, -+#endif +}; + ++static struct fb_monspecs at91fb_default_monspecs = { ++ .manufacturer = "HIT", ++ .monitor = "TX09D50VM1CCA", ++ ++ .modedb = at91_tft_vga_modes, ++ .modedb_len = ARRAY_SIZE(at91_tft_vga_modes), ++ .hfmin = 15000, ++ .hfmax = 64000, ++ .vfmin = 50, ++ .vfmax = 150, ++}; ++ ++#define AT91SAM9RL_DEFAULT_LCDCON2 (ATMEL_LCDC_MEMOR_LITTLE \ ++ | ATMEL_LCDC_DISTYPE_TFT \ ++ | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE) ++ ++static void at91_lcdc_power_control(int on) ++{ ++ if (on) ++ at91_set_gpio_value(AT91_PIN_PA30, 0); /* power up */ ++ else ++ at91_set_gpio_value(AT91_PIN_PA30, 1); /* power down */ ++} ++ ++/* Driver datas */ ++static struct atmel_lcdfb_info __initdata ek_lcdc_data = { ++ .default_bpp = 16, ++ .default_dmacon = ATMEL_LCDC_DMAEN, ++ .default_lcdcon2 = AT91SAM9RL_DEFAULT_LCDCON2, ++ .default_monspecs = &at91fb_default_monspecs, ++ .atmel_lcdfb_power_control = at91_lcdc_power_control, ++ .guard_time = 1, ++}; ++ ++#else ++static struct atmel_lcdfb_info __initdata ek_lcdc_data; ++#endif ++ + +static void __init ek_board_init(void) +{ + /* Serial */ + at91_add_device_serial(); -+ /* USB Host */ -+ at91_add_device_usbh(&ek_usbh_data); -+ /* USB Device */ -+ at91_add_device_udc(&ek_udc_data); + /* I2C */ + at91_add_device_i2c(); + /* NAND */ + at91_add_device_nand(&ek_nand_data); -+ /* DM9000 ethernet */ -+ ek_add_device_dm9000(); -+ -+ /* spi0 and mmc/sd share the same PIO pins */ -+#if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE) + /* SPI */ + at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices)); -+#else + /* MMC */ -+ at91_add_device_mmc(&ek_mmc_data); -+#endif ++ at91_add_device_mmc(0, &ek_mmc_data); ++ /* LCD Controller */ ++ at91_add_device_lcdc(&ek_lcdc_data); +} + -+MACHINE_START(AT91SAM9261EK, "Atmel AT91SAM9261-EK") ++MACHINE_START(AT91SAM9RLEK, "Atmel AT91SAM9RL-EK") + /* Maintainer: Atmel */ + .phys_io = AT91_BASE_SYS, + .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc, @@ -6889,41 +3653,42 @@ diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/board-sam9261ek.c l + .init_irq = ek_init_irq, + .init_machine = ek_board_init, +MACHINE_END -diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/clock.c linux-2.6.19/arch/arm/mach-at91rm9200/clock.c ---- linux-2.6.19-final/arch/arm/mach-at91rm9200/clock.c Mon Dec 4 16:39:29 2006 -+++ linux-2.6.19/arch/arm/mach-at91rm9200/clock.c Thu Nov 23 15:37:15 2006 -@@ -28,6 +28,8 @@ - #include <asm/mach-types.h> - - #include <asm/hardware.h> -+#include <asm/arch/at91_pmc.h> -+#include <asm/arch/cpu.h> +diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/clock.c linux-2.6-stable/arch/arm/mach-at91/clock.c +--- linux-2.6.21/arch/arm/mach-at91/clock.c Thu Apr 26 05:08:32 2007 ++++ linux-2.6-stable/arch/arm/mach-at91/clock.c Tue May 8 12:13:30 2007 +@@ -32,6 +32,7 @@ + #include <asm/arch/cpu.h> #include "clock.h" ++#include "generic.h" -@@ -41,6 +43,7 @@ - #define clk_is_primary(x) ((x)->type & CLK_TYPE_PRIMARY) - #define clk_is_programmable(x) ((x)->type & CLK_TYPE_PROGRAMMABLE) - #define clk_is_peripheral(x) ((x)->type & CLK_TYPE_PERIPHERAL) -+#define clk_is_sys(x) ((x)->type & CLK_TYPE_SYSTEM) + /* +@@ -254,6 +255,23 @@ - static LIST_HEAD(clocks); -@@ -114,13 +117,11 @@ - static struct clk udpck = { - .name = "udpck", - .parent = &pllb, -- .pmc_mask = AT91_PMC_UDP, - .mode = pmc_sys_mode, - }; - static struct clk uhpck = { - .name = "uhpck", - .parent = &pllb, -- .pmc_mask = AT91_PMC_UHP, - .mode = pmc_sys_mode, - }; + /*------------------------------------------------------------------------*/ + ++#ifdef CONFIG_PM ++ ++int clk_must_disable(struct clk *clk) ++{ ++ if (!at91_suspend_entering_slow_clock()) ++ return 0; ++ ++ while (clk->parent) ++ clk = clk->parent; ++ return clk != &clk32k; ++} ++EXPORT_SYMBOL(clk_must_disable); ++ ++#endif ++ ++/*------------------------------------------------------------------------*/ ++ + #ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS -@@ -374,6 +375,7 @@ + /* +@@ -375,6 +393,7 @@ seq_printf(s, "PLLB = %8x\n", at91_sys_read(AT91_CKGR_PLLBR)); seq_printf(s, "MCKR = %8x\n", at91_sys_read(AT91_PMC_MCKR)); @@ -6931,917 +3696,36 @@ diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/clock.c linux-2.6.1 for (i = 0; i < 4; i++) seq_printf(s, "PCK%d = %8x\n", i, at91_sys_read(AT91_PMC_PCKR(i))); seq_printf(s, "SR = %8x\n", sr = at91_sys_read(AT91_PMC_SR)); -@@ -434,6 +436,12 @@ - clk->mode = pmc_periph_mode; - list_add_tail(&clk->node, &clocks); - } -+ else if (clk_is_sys(clk)) { -+ clk->parent = &mck; -+ clk->mode = pmc_sys_mode; -+ -+ list_add_tail(&clk->node, &clocks); -+ } - #ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS - else if (clk_is_programmable(clk)) { - clk->mode = pmc_sys_mode; -@@ -586,9 +594,21 @@ - */ - at91_pllb_usb_init = at91_pll_calc(main_clock, 48000000 * 2) | AT91_PMC_USB96M; - pllb.rate_hz = at91_pll_rate(&pllb, main_clock, at91_pllb_usb_init); -- at91_sys_write(AT91_PMC_SCDR, AT91_PMC_UHP | AT91_PMC_UDP); -+ if (cpu_is_at91rm9200()) { -+ uhpck.pmc_mask = AT91RM9200_PMC_UHP; -+ udpck.pmc_mask = AT91RM9200_PMC_UDP; -+ at91_sys_write(AT91_PMC_SCDR, AT91RM9200_PMC_UHP | AT91RM9200_PMC_UDP); -+ at91_sys_write(AT91_PMC_SCER, AT91RM9200_PMC_MCKUDP); -+ } else if (cpu_is_at91sam9260()) { -+ uhpck.pmc_mask = AT91SAM926x_PMC_UHP; -+ udpck.pmc_mask = AT91SAM926x_PMC_UDP; -+ at91_sys_write(AT91_PMC_SCDR, AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP); -+ } else if (cpu_is_at91sam9261()) { -+ uhpck.pmc_mask = (AT91SAM926x_PMC_UHP | AT91_PMC_HCK0); -+ udpck.pmc_mask = AT91SAM926x_PMC_UDP; -+ at91_sys_write(AT91_PMC_SCDR, AT91SAM926x_PMC_UHP | AT91_PMC_HCK0 | AT91SAM926x_PMC_UDP); -+ } - at91_sys_write(AT91_CKGR_PLLBR, 0); -- at91_sys_write(AT91_PMC_SCER, AT91_PMC_MCKUDP); - - udpck.rate_hz = at91_usb_rate(&pllb, pllb.rate_hz, at91_pllb_usb_init); - uhpck.rate_hz = at91_usb_rate(&pllb, pllb.rate_hz, at91_pllb_usb_init); -diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/clock.h linux-2.6.19/arch/arm/mach-at91rm9200/clock.h ---- linux-2.6.19-final/arch/arm/mach-at91rm9200/clock.h Mon Dec 4 16:39:29 2006 -+++ linux-2.6.19/arch/arm/mach-at91rm9200/clock.h Thu Nov 23 15:40:21 2006 -@@ -10,6 +10,7 @@ - #define CLK_TYPE_PLL 0x2 - #define CLK_TYPE_PROGRAMMABLE 0x4 - #define CLK_TYPE_PERIPHERAL 0x8 -+#define CLK_TYPE_SYSTEM 0x10 - - - struct clk { -diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/devices.c linux-2.6.19/arch/arm/mach-at91rm9200/devices.c ---- linux-2.6.19-final/arch/arm/mach-at91rm9200/devices.c Mon Dec 4 16:39:29 2006 -+++ linux-2.6.19/arch/arm/mach-at91rm9200/devices.c Thu Jan 1 02:00:00 1970 -@@ -1,813 +0,0 @@ --/* -- * arch/arm/mach-at91rm9200/devices.c -- * -- * Copyright (C) 2005 Thibaut VARENE <varenet@parisc-linux.org> -- * Copyright (C) 2005 David Brownell -- * -- * This program is free software; you can redistribute it and/or modify -- * it under the terms of the GNU General Public License as published by -- * the Free Software Foundation; either version 2 of the License, or -- * (at your option) any later version. -- * -- */ --#include <asm/mach/arch.h> --#include <asm/mach/map.h> -- --#include <linux/platform_device.h> -- --#include <asm/hardware.h> --#include <asm/arch/board.h> --#include <asm/arch/gpio.h> -- --#include "generic.h" -- --#define SZ_512 0x00000200 --#define SZ_256 0x00000100 --#define SZ_16 0x00000010 -- --/* -------------------------------------------------------------------- -- * USB Host -- * -------------------------------------------------------------------- */ -- --#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) --static u64 ohci_dmamask = 0xffffffffUL; --static struct at91_usbh_data usbh_data; -- --static struct resource at91_usbh_resources[] = { -- [0] = { -- .start = AT91RM9200_UHP_BASE, -- .end = AT91RM9200_UHP_BASE + SZ_1M - 1, -- .flags = IORESOURCE_MEM, -- }, -- [1] = { -- .start = AT91RM9200_ID_UHP, -- .end = AT91RM9200_ID_UHP, -- .flags = IORESOURCE_IRQ, -- }, --}; -- --static struct platform_device at91rm9200_usbh_device = { -- .name = "at91_ohci", -- .id = -1, -- .dev = { -- .dma_mask = &ohci_dmamask, -- .coherent_dma_mask = 0xffffffff, -- .platform_data = &usbh_data, -- }, -- .resource = at91_usbh_resources, -- .num_resources = ARRAY_SIZE(at91_usbh_resources), --}; -- --void __init at91_add_device_usbh(struct at91_usbh_data *data) --{ -- if (!data) -- return; -- -- usbh_data = *data; -- platform_device_register(&at91rm9200_usbh_device); --} --#else --void __init at91_add_device_usbh(struct at91_usbh_data *data) {} --#endif -- -- --/* -------------------------------------------------------------------- -- * USB Device (Gadget) -- * -------------------------------------------------------------------- */ -- --#ifdef CONFIG_USB_GADGET_AT91 --static struct at91_udc_data udc_data; -- --static struct resource at91_udc_resources[] = { -- [0] = { -- .start = AT91RM9200_BASE_UDP, -- .end = AT91RM9200_BASE_UDP + SZ_16K - 1, -- .flags = IORESOURCE_MEM, -- }, -- [1] = { -- .start = AT91RM9200_ID_UDP, -- .end = AT91RM9200_ID_UDP, -- .flags = IORESOURCE_IRQ, -- }, --}; -- --static struct platform_device at91rm9200_udc_device = { -- .name = "at91_udc", -- .id = -1, -- .dev = { -- .platform_data = &udc_data, -- }, -- .resource = at91_udc_resources, -- .num_resources = ARRAY_SIZE(at91_udc_resources), --}; -- --void __init at91_add_device_udc(struct at91_udc_data *data) --{ -- if (!data) -- return; -- -- if (data->vbus_pin) { -- at91_set_gpio_input(data->vbus_pin, 0); -- at91_set_deglitch(data->vbus_pin, 1); -- } -- if (data->pullup_pin) -- at91_set_gpio_output(data->pullup_pin, 0); -- -- udc_data = *data; -- platform_device_register(&at91rm9200_udc_device); --} --#else --void __init at91_add_device_udc(struct at91_udc_data *data) {} --#endif -- -- --/* -------------------------------------------------------------------- -- * Ethernet -- * -------------------------------------------------------------------- */ -- --#if defined(CONFIG_ARM_AT91_ETHER) || defined(CONFIG_ARM_AT91_ETHER_MODULE) --static u64 eth_dmamask = 0xffffffffUL; --static struct at91_eth_data eth_data; -- --static struct resource at91_eth_resources[] = { -- [0] = { -- .start = AT91_VA_BASE_EMAC, -- .end = AT91_VA_BASE_EMAC + SZ_16K - 1, -- .flags = IORESOURCE_MEM, -- }, -- [1] = { -- .start = AT91RM9200_ID_EMAC, -- .end = AT91RM9200_ID_EMAC, -- .flags = IORESOURCE_IRQ, -- }, --}; -- --static struct platform_device at91rm9200_eth_device = { -- .name = "at91_ether", -- .id = -1, -- .dev = { -- .dma_mask = ð_dmamask, -- .coherent_dma_mask = 0xffffffff, -- .platform_data = ð_data, -- }, -- .resource = at91_eth_resources, -- .num_resources = ARRAY_SIZE(at91_eth_resources), --}; -- --void __init at91_add_device_eth(struct at91_eth_data *data) --{ -- if (!data) -- return; -- -- if (data->phy_irq_pin) { -- at91_set_gpio_input(data->phy_irq_pin, 0); -- at91_set_deglitch(data->phy_irq_pin, 1); -- } -- -- /* Pins used for MII and RMII */ -- at91_set_A_periph(AT91_PIN_PA16, 0); /* EMDIO */ -- at91_set_A_periph(AT91_PIN_PA15, 0); /* EMDC */ -- at91_set_A_periph(AT91_PIN_PA14, 0); /* ERXER */ -- at91_set_A_periph(AT91_PIN_PA13, 0); /* ERX1 */ -- at91_set_A_periph(AT91_PIN_PA12, 0); /* ERX0 */ -- at91_set_A_periph(AT91_PIN_PA11, 0); /* ECRS_ECRSDV */ -- at91_set_A_periph(AT91_PIN_PA10, 0); /* ETX1 */ -- at91_set_A_periph(AT91_PIN_PA9, 0); /* ETX0 */ -- at91_set_A_periph(AT91_PIN_PA8, 0); /* ETXEN */ -- at91_set_A_periph(AT91_PIN_PA7, 0); /* ETXCK_EREFCK */ -- -- if (!data->is_rmii) { -- at91_set_B_periph(AT91_PIN_PB19, 0); /* ERXCK */ -- at91_set_B_periph(AT91_PIN_PB18, 0); /* ECOL */ -- at91_set_B_periph(AT91_PIN_PB17, 0); /* ERXDV */ -- at91_set_B_periph(AT91_PIN_PB16, 0); /* ERX3 */ -- at91_set_B_periph(AT91_PIN_PB15, 0); /* ERX2 */ -- at91_set_B_periph(AT91_PIN_PB14, 0); /* ETXER */ -- at91_set_B_periph(AT91_PIN_PB13, 0); /* ETX3 */ -- at91_set_B_periph(AT91_PIN_PB12, 0); /* ETX2 */ -- } -- -- eth_data = *data; -- platform_device_register(&at91rm9200_eth_device); --} --#else --void __init at91_add_device_eth(struct at91_eth_data *data) {} --#endif -- -- --/* -------------------------------------------------------------------- -- * Compact Flash / PCMCIA -- * -------------------------------------------------------------------- */ -- --#if defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE) --static struct at91_cf_data cf_data; -- --static struct resource at91_cf_resources[] = { -- [0] = { -- .start = AT91_CF_BASE, -- /* ties up CS4, CS5 and CS6 */ -- .end = AT91_CF_BASE + (0x30000000 - 1), -- .flags = IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT, -- }, --}; -- --static struct platform_device at91rm9200_cf_device = { -- .name = "at91_cf", -- .id = -1, -- .dev = { -- .platform_data = &cf_data, -- }, -- .resource = at91_cf_resources, -- .num_resources = ARRAY_SIZE(at91_cf_resources), --}; -- --void __init at91_add_device_cf(struct at91_cf_data *data) --{ -- if (!data) -- return; -- -- /* input/irq */ -- if (data->irq_pin) { -- at91_set_gpio_input(data->irq_pin, 1); -- at91_set_deglitch(data->irq_pin, 1); -- } -- at91_set_gpio_input(data->det_pin, 1); -- at91_set_deglitch(data->det_pin, 1); -- -- /* outputs, initially off */ -- if (data->vcc_pin) -- at91_set_gpio_output(data->vcc_pin, 0); -- at91_set_gpio_output(data->rst_pin, 0); -- -- /* force poweron defaults for these pins ... */ -- at91_set_A_periph(AT91_PIN_PC9, 0); /* A25/CFRNW */ -- at91_set_A_periph(AT91_PIN_PC10, 0); /* NCS4/CFCS */ -- at91_set_A_periph(AT91_PIN_PC11, 0); /* NCS5/CFCE1 */ -- at91_set_A_periph(AT91_PIN_PC12, 0); /* NCS6/CFCE2 */ -- -- cf_data = *data; -- platform_device_register(&at91rm9200_cf_device); --} --#else --void __init at91_add_device_cf(struct at91_cf_data *data) {} --#endif -- -- --/* -------------------------------------------------------------------- -- * MMC / SD -- * -------------------------------------------------------------------- */ -- --#if defined(CONFIG_MMC_AT91RM9200) || defined(CONFIG_MMC_AT91RM9200_MODULE) --static u64 mmc_dmamask = 0xffffffffUL; --static struct at91_mmc_data mmc_data; -- --static struct resource at91_mmc_resources[] = { -- [0] = { -- .start = AT91RM9200_BASE_MCI, -- .end = AT91RM9200_BASE_MCI + SZ_16K - 1, -- .flags = IORESOURCE_MEM, -- }, -- [1] = { -- .start = AT91RM9200_ID_MCI, -- .end = AT91RM9200_ID_MCI, -- .flags = IORESOURCE_IRQ, -- }, --}; -- --static struct platform_device at91rm9200_mmc_device = { -- .name = "at91_mci", -- .id = -1, -- .dev = { -- .dma_mask = &mmc_dmamask, -- .coherent_dma_mask = 0xffffffff, -- .platform_data = &mmc_data, -- }, -- .resource = at91_mmc_resources, -- .num_resources = ARRAY_SIZE(at91_mmc_resources), --}; -- --void __init at91_add_device_mmc(struct at91_mmc_data *data) --{ -- if (!data) -- return; -- -- /* input/irq */ -- if (data->det_pin) { -- at91_set_gpio_input(data->det_pin, 1); -- at91_set_deglitch(data->det_pin, 1); -- } -- if (data->wp_pin) -- at91_set_gpio_input(data->wp_pin, 1); -- -- /* CLK */ -- at91_set_A_periph(AT91_PIN_PA27, 0); -- -- if (data->is_b) { -- /* CMD */ -- at91_set_B_periph(AT91_PIN_PA8, 0); -- -- /* DAT0, maybe DAT1..DAT3 */ -- at91_set_B_periph(AT91_PIN_PA9, 0); -- if (data->wire4) { -- at91_set_B_periph(AT91_PIN_PA10, 0); -- at91_set_B_periph(AT91_PIN_PA11, 0); -- at91_set_B_periph(AT91_PIN_PA12, 0); -- } -- } else { -- /* CMD */ -- at91_set_A_periph(AT91_PIN_PA28, 0); -- -- /* DAT0, maybe DAT1..DAT3 */ -- at91_set_A_periph(AT91_PIN_PA29, 0); -- if (data->wire4) { -- at91_set_B_periph(AT91_PIN_PB3, 0); -- at91_set_B_periph(AT91_PIN_PB4, 0); -- at91_set_B_periph(AT91_PIN_PB5, 0); -- } -- } -- -- mmc_data = *data; -- platform_device_register(&at91rm9200_mmc_device); --} --#else --void __init at91_add_device_mmc(struct at91_mmc_data *data) {} --#endif -- -- --/* -------------------------------------------------------------------- -- * NAND / SmartMedia -- * -------------------------------------------------------------------- */ -- --#if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE) --static struct at91_nand_data nand_data; -- --static struct resource at91_nand_resources[] = { -- { -- .start = AT91_SMARTMEDIA_BASE, -- .end = AT91_SMARTMEDIA_BASE + SZ_8M - 1, -- .flags = IORESOURCE_MEM, -- } --}; -- --static struct platform_device at91_nand_device = { -- .name = "at91_nand", -- .id = -1, -- .dev = { -- .platform_data = &nand_data, -- }, -- .resource = at91_nand_resources, -- .num_resources = ARRAY_SIZE(at91_nand_resources), --}; -- --void __init at91_add_device_nand(struct at91_nand_data *data) --{ -- if (!data) -- return; -- -- /* enable pin */ -- if (data->enable_pin) -- at91_set_gpio_output(data->enable_pin, 1); -- -- /* ready/busy pin */ -- if (data->rdy_pin) -- at91_set_gpio_input(data->rdy_pin, 1); -- -- /* card detect pin */ -- if (data->det_pin) -- at91_set_gpio_input(data->det_pin, 1); -- -- at91_set_A_periph(AT91_PIN_PC1, 0); /* SMOE */ -- at91_set_A_periph(AT91_PIN_PC3, 0); /* SMWE */ -- -- nand_data = *data; -- platform_device_register(&at91_nand_device); --} --#else --void __init at91_add_device_nand(struct at91_nand_data *data) {} --#endif -- -- --/* -------------------------------------------------------------------- -- * TWI (i2c) -- * -------------------------------------------------------------------- */ -- --#if defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE) --static struct platform_device at91rm9200_twi_device = { -- .name = "at91_i2c", -- .id = -1, -- .num_resources = 0, --}; -- --void __init at91_add_device_i2c(void) --{ -- /* pins used for TWI interface */ -- at91_set_A_periph(AT91_PIN_PA25, 0); /* TWD */ -- at91_set_multi_drive(AT91_PIN_PA25, 1); -- -- at91_set_A_periph(AT91_PIN_PA26, 0); /* TWCK */ -- at91_set_multi_drive(AT91_PIN_PA26, 1); -- -- platform_device_register(&at91rm9200_twi_device); --} --#else --void __init at91_add_device_i2c(void) {} --#endif -- -- --/* -------------------------------------------------------------------- -- * SPI -- * -------------------------------------------------------------------- */ -- --#if defined(CONFIG_SPI_AT91) || defined(CONFIG_SPI_AT91_MODULE) || defined(CONFIG_AT91_SPI) || defined(CONFIG_AT91_SPI_MODULE) --static u64 spi_dmamask = 0xffffffffUL; -- --static struct resource at91_spi_resources[] = { -- [0] = { -- .start = AT91RM9200_BASE_SPI, -- .end = AT91RM9200_BASE_SPI + SZ_16K - 1, -- .flags = IORESOURCE_MEM, -- }, -- [1] = { -- .start = AT91RM9200_ID_SPI, -- .end = AT91RM9200_ID_SPI, -- .flags = IORESOURCE_IRQ, -- }, --}; -- --static struct platform_device at91rm9200_spi_device = { -- .name = "at91_spi", -- .id = 0, -- .dev = { -- .dma_mask = &spi_dmamask, -- .coherent_dma_mask = 0xffffffff, -- }, -- .resource = at91_spi_resources, -- .num_resources = ARRAY_SIZE(at91_spi_resources), --}; -- --static const unsigned at91_spi_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PA5, AT91_PIN_PA6 }; -- --void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) --{ -- int i; -- unsigned long cs_pin; -- -- at91_set_A_periph(AT91_PIN_PA0, 0); /* MISO */ -- at91_set_A_periph(AT91_PIN_PA1, 0); /* MOSI */ -- at91_set_A_periph(AT91_PIN_PA2, 0); /* SPCK */ -- -- /* Enable SPI chip-selects */ -- for (i = 0; i < nr_devices; i++) { -- if (devices[i].controller_data) -- cs_pin = (unsigned long) devices[i].controller_data; -- else -- cs_pin = at91_spi_standard_cs[devices[i].chip_select]; -- --#ifdef CONFIG_SPI_AT91_MANUAL_CS -- at91_set_gpio_output(cs_pin, 1); --#else -- at91_set_A_periph(cs_pin, 0); --#endif -- -- /* pass chip-select pin to driver */ -- devices[i].controller_data = (void *) cs_pin; -- } -- -- spi_register_board_info(devices, nr_devices); -- at91_clock_associate("spi0_clk", &at91rm9200_spi_device.dev, "spi"); -- platform_device_register(&at91rm9200_spi_device); --} --#else --void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {} --#endif -- -- --/* -------------------------------------------------------------------- -- * RTC -- * -------------------------------------------------------------------- */ -- --#if defined(CONFIG_RTC_DRV_AT91) || defined(CONFIG_RTC_DRV_AT91_MODULE) --static struct platform_device at91rm9200_rtc_device = { -- .name = "at91_rtc", -- .id = -1, -- .num_resources = 0, --}; -- --static void __init at91_add_device_rtc(void) --{ -- platform_device_register(&at91rm9200_rtc_device); --} --#else --static void __init at91_add_device_rtc(void) {} --#endif -- -- --/* -------------------------------------------------------------------- -- * Watchdog -- * -------------------------------------------------------------------- */ -- --#if defined(CONFIG_AT91_WATCHDOG) || defined(CONFIG_AT91_WATCHDOG_MODULE) --static struct platform_device at91rm9200_wdt_device = { -- .name = "at91_wdt", -- .id = -1, -- .num_resources = 0, --}; -- --static void __init at91_add_device_watchdog(void) --{ -- platform_device_register(&at91rm9200_wdt_device); --} --#else --static void __init at91_add_device_watchdog(void) {} --#endif -- -- --/* -------------------------------------------------------------------- -- * LEDs -- * -------------------------------------------------------------------- */ -- --#if defined(CONFIG_LEDS) --u8 at91_leds_cpu; --u8 at91_leds_timer; -- --void __init at91_init_leds(u8 cpu_led, u8 timer_led) --{ -- at91_leds_cpu = cpu_led; -- at91_leds_timer = timer_led; --} --#else --void __init at91_init_leds(u8 cpu_led, u8 timer_led) {} --#endif -- -- --/* -------------------------------------------------------------------- -- * UART -- * -------------------------------------------------------------------- */ -- --#if defined(CONFIG_SERIAL_ATMEL) --static struct resource dbgu_resources[] = { -- [0] = { -- .start = AT91_VA_BASE_SYS + AT91_DBGU, -- .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1, -- .flags = IORESOURCE_MEM, -- }, -- [1] = { -- .start = AT91_ID_SYS, -- .end = AT91_ID_SYS, -- .flags = IORESOURCE_IRQ, -- }, --}; -- --static struct atmel_uart_data dbgu_data = { -- .use_dma_tx = 0, -- .use_dma_rx = 0, /* DBGU not capable of receive DMA */ -- .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU), --}; -- --static struct platform_device at91rm9200_dbgu_device = { -- .name = "atmel_usart", -- .id = 0, -- .dev = { -- .platform_data = &dbgu_data, -- .coherent_dma_mask = 0xffffffff, -- }, -- .resource = dbgu_resources, -- .num_resources = ARRAY_SIZE(dbgu_resources), --}; -- --static inline void configure_dbgu_pins(void) --{ -- at91_set_A_periph(AT91_PIN_PA30, 0); /* DRXD */ -- at91_set_A_periph(AT91_PIN_PA31, 1); /* DTXD */ --} -- --static struct resource uart0_resources[] = { -- [0] = { -- .start = AT91RM9200_BASE_US0, -- .end = AT91RM9200_BASE_US0 + SZ_16K - 1, -- .flags = IORESOURCE_MEM, -- }, -- [1] = { -- .start = AT91RM9200_ID_US0, -- .end = AT91RM9200_ID_US0, -- .flags = IORESOURCE_IRQ, -- }, --}; -- --static struct atmel_uart_data uart0_data = { -- .use_dma_tx = 1, -- .use_dma_rx = 1, --}; -- --static struct platform_device at91rm9200_uart0_device = { -- .name = "atmel_usart", -- .id = 1, -- .dev = { -- .platform_data = &uart0_data, -- .coherent_dma_mask = 0xffffffff, -- }, -- .resource = uart0_resources, -- .num_resources = ARRAY_SIZE(uart0_resources), --}; -- --static inline void configure_usart0_pins(void) --{ -- at91_set_A_periph(AT91_PIN_PA17, 1); /* TXD0 */ -- at91_set_A_periph(AT91_PIN_PA18, 0); /* RXD0 */ -- at91_set_A_periph(AT91_PIN_PA20, 0); /* CTS0 */ -- -- /* -- * AT91RM9200 Errata #39 - RTS0 is not internally connected to PA21. -- * We need to drive the pin manually. Default is off (RTS is active low). -- */ -- at91_set_gpio_output(AT91_PIN_PA21, 1); --} -- --static struct resource uart1_resources[] = { -- [0] = { -- .start = AT91RM9200_BASE_US1, -- .end = AT91RM9200_BASE_US1 + SZ_16K - 1, -- .flags = IORESOURCE_MEM, -- }, -- [1] = { -- .start = AT91RM9200_ID_US1, -- .end = AT91RM9200_ID_US1, -- .flags = IORESOURCE_IRQ, -- }, --}; -- --static struct atmel_uart_data uart1_data = { -- .use_dma_tx = 1, -- .use_dma_rx = 1, --}; -- --static struct platform_device at91rm9200_uart1_device = { -- .name = "atmel_usart", -- .id = 2, -- .dev = { -- .platform_data = &uart1_data, -- .coherent_dma_mask = 0xffffffff, -- }, -- .resource = uart1_resources, -- .num_resources = ARRAY_SIZE(uart1_resources), --}; -- --static inline void configure_usart1_pins(void) --{ -- at91_set_A_periph(AT91_PIN_PB18, 0); /* RI1 */ -- at91_set_A_periph(AT91_PIN_PB19, 0); /* DTR1 */ -- at91_set_A_periph(AT91_PIN_PB20, 1); /* TXD1 */ -- at91_set_A_periph(AT91_PIN_PB21, 0); /* RXD1 */ -- at91_set_A_periph(AT91_PIN_PB23, 0); /* DCD1 */ -- at91_set_A_periph(AT91_PIN_PB24, 0); /* CTS1 */ -- at91_set_A_periph(AT91_PIN_PB25, 0); /* DSR1 */ -- at91_set_A_periph(AT91_PIN_PB26, 0); /* RTS1 */ --} -- --static struct resource uart2_resources[] = { -- [0] = { -- .start = AT91RM9200_BASE_US2, -- .end = AT91RM9200_BASE_US2 + SZ_16K - 1, -- .flags = IORESOURCE_MEM, -- }, -- [1] = { -- .start = AT91RM9200_ID_US2, -- .end = AT91RM9200_ID_US2, -- .flags = IORESOURCE_IRQ, -- }, --}; -- --static struct atmel_uart_data uart2_data = { -- .use_dma_tx = 1, -- .use_dma_rx = 1, --}; -- --static struct platform_device at91rm9200_uart2_device = { -- .name = "atmel_usart", -- .id = 3, -- .dev = { -- .platform_data = &uart2_data, -- .coherent_dma_mask = 0xffffffff, -- }, -- .resource = uart2_resources, -- .num_resources = ARRAY_SIZE(uart2_resources), --}; -- --static inline void configure_usart2_pins(void) --{ -- at91_set_A_periph(AT91_PIN_PA22, 0); /* RXD2 */ -- at91_set_A_periph(AT91_PIN_PA23, 1); /* TXD2 */ --} -- --static struct resource uart3_resources[] = { -- [0] = { -- .start = AT91RM9200_BASE_US3, -- .end = AT91RM9200_BASE_US3 + SZ_16K - 1, -- .flags = IORESOURCE_MEM, -- }, -- [1] = { -- .start = AT91RM9200_ID_US3, -- .end = AT91RM9200_ID_US3, -- .flags = IORESOURCE_IRQ, -- }, --}; -- --static struct atmel_uart_data uart3_data = { -- .use_dma_tx = 1, -- .use_dma_rx = 1, --}; -- --static struct platform_device at91rm9200_uart3_device = { -- .name = "atmel_usart", -- .id = 4, -- .dev = { -- .platform_data = &uart3_data, -- .coherent_dma_mask = 0xffffffff, -- }, -- .resource = uart3_resources, -- .num_resources = ARRAY_SIZE(uart3_resources), --}; -- --static inline void configure_usart3_pins(void) --{ -- at91_set_B_periph(AT91_PIN_PA5, 1); /* TXD3 */ -- at91_set_B_periph(AT91_PIN_PA6, 0); /* RXD3 */ --} -- --struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */ --struct platform_device *atmel_default_console_device; /* the serial console device */ -- --void __init at91_init_serial(struct at91_uart_config *config) --{ -- int i; -- -- /* Fill in list of supported UARTs */ -- for (i = 0; i < config->nr_tty; i++) { -- switch (config->tty_map[i]) { -- case 0: -- configure_usart0_pins(); -- at91_uarts[i] = &at91rm9200_uart0_device; -- at91_clock_associate("usart0_clk", &at91rm9200_uart0_device.dev, "usart"); -- break; -- case 1: -- configure_usart1_pins(); -- at91_uarts[i] = &at91rm9200_uart1_device; -- at91_clock_associate("usart1_clk", &at91rm9200_uart1_device.dev, "usart"); -- break; -- case 2: -- configure_usart2_pins(); -- at91_uarts[i] = &at91rm9200_uart2_device; -- at91_clock_associate("usart2_clk", &at91rm9200_uart2_device.dev, "usart"); -- break; -- case 3: -- configure_usart3_pins(); -- at91_uarts[i] = &at91rm9200_uart3_device; -- at91_clock_associate("usart3_clk", &at91rm9200_uart3_device.dev, "usart"); -- break; -- case 4: -- configure_dbgu_pins(); -- at91_uarts[i] = &at91rm9200_dbgu_device; -- at91_clock_associate("mck", &at91rm9200_dbgu_device.dev, "usart"); -- break; -- default: -- continue; -- } -- at91_uarts[i]->id = i; /* update ID number to mapped ID */ -- } -- -- /* Set serial console device */ -- if (config->console_tty < ATMEL_MAX_UART) -- atmel_default_console_device = at91_uarts[config->console_tty]; -- if (!atmel_default_console_device) -- printk(KERN_INFO "AT91: No default serial console defined.\n"); --} -- --void __init at91_add_device_serial(void) --{ -- int i; -- -- for (i = 0; i < ATMEL_MAX_UART; i++) { -- if (at91_uarts[i]) -- platform_device_register(at91_uarts[i]); -- } --} --#else --void __init at91_init_serial(struct at91_uart_config *config) {} --void __init at91_add_device_serial(void) {} --#endif -- -- --/* -------------------------------------------------------------------- */ -- --/* -- * These devices are always present and don't need any board-specific -- * setup. -- */ --static int __init at91_add_standard_devices(void) --{ -- at91_add_device_rtc(); -- at91_add_device_watchdog(); -- return 0; --} -- --arch_initcall(at91_add_standard_devices); -diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/generic.h linux-2.6.19/arch/arm/mach-at91rm9200/generic.h ---- linux-2.6.19-final/arch/arm/mach-at91rm9200/generic.h Mon Dec 4 16:39:29 2006 -+++ linux-2.6.19/arch/arm/mach-at91rm9200/generic.h Wed Nov 15 09:01:27 2006 -@@ -10,14 +10,19 @@ - - /* Processors */ - extern void __init at91rm9200_initialize(unsigned long main_clock, unsigned short banks); -+extern void __init at91sam9260_initialize(unsigned long main_clock); -+extern void __init at91sam9261_initialize(unsigned long main_clock); +diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/generic.h linux-2.6-stable/arch/arm/mach-at91/generic.h +--- linux-2.6.21/arch/arm/mach-at91/generic.h Thu Apr 26 05:08:32 2007 ++++ linux-2.6-stable/arch/arm/mach-at91/generic.h Wed May 9 10:20:54 2007 +@@ -13,12 +13,14 @@ + extern void __init at91sam9260_initialize(unsigned long main_clock); + extern void __init at91sam9261_initialize(unsigned long main_clock); + extern void __init at91sam9263_initialize(unsigned long main_clock); ++extern void __init at91sam9rl_initialize(unsigned long main_clock); /* Interrupts */ extern void __init at91rm9200_init_interrupts(unsigned int priority[]); -+extern void __init at91sam9260_init_interrupts(unsigned int priority[]); -+extern void __init at91sam9261_init_interrupts(unsigned int priority[]); + extern void __init at91sam9260_init_interrupts(unsigned int priority[]); + extern void __init at91sam9261_init_interrupts(unsigned int priority[]); + extern void __init at91sam9263_init_interrupts(unsigned int priority[]); ++extern void __init at91sam9rl_init_interrupts(unsigned int priority[]); extern void __init at91_aic_init(unsigned int priority[]); /* Timer */ - struct sys_timer; - extern struct sys_timer at91rm9200_timer; -+extern struct sys_timer at91sam926x_timer; - - /* Clocks */ - extern int __init at91_clock_init(unsigned long main_clock); -@@ -39,3 +44,6 @@ - }; - extern void __init at91_gpio_init(struct at91_gpio_bank *, int nr_banks); - extern void __init at91_gpio_irq_setup(void); -+ -+extern void (*at91_arch_reset)(void); -+extern int at91_extern_irq; -diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/gpio.c linux-2.6.19/arch/arm/mach-at91rm9200/gpio.c ---- linux-2.6.19-final/arch/arm/mach-at91rm9200/gpio.c Mon Dec 4 16:39:29 2006 -+++ linux-2.6.19/arch/arm/mach-at91rm9200/gpio.c Wed Nov 1 12:37:25 2006 -@@ -19,6 +19,8 @@ - - #include <asm/io.h> - #include <asm/hardware.h> -+#include <asm/arch/at91_pio.h> -+#include <asm/arch/at91_pmc.h> - #include <asm/arch/gpio.h> - - #include "generic.h" -diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/ics1523.c linux-2.6.19/arch/arm/mach-at91rm9200/ics1523.c ---- linux-2.6.19-final/arch/arm/mach-at91rm9200/ics1523.c Thu Jan 1 02:00:00 1970 -+++ linux-2.6.19/arch/arm/mach-at91rm9200/ics1523.c Tue Oct 24 14:59:00 2006 -@@ -0,0 +1,227 @@ +@@ -34,6 +36,7 @@ + /* Power Management */ + extern void at91_irq_suspend(void); + extern void at91_irq_resume(void); ++extern int at91_suspend_entering_slow_clock(void); + + /* GPIO */ + #define AT91RM9200_PQFP 3 /* AT91RM9200 PQFP package has 3 banks */ +diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/ics1523.c linux-2.6-stable/arch/arm/mach-at91/ics1523.c +--- linux-2.6.21/arch/arm/mach-at91/ics1523.c Thu Jan 1 02:00:00 1970 ++++ linux-2.6-stable/arch/arm/mach-at91/ics1523.c Tue May 8 12:13:30 2007 +@@ -0,0 +1,207 @@ +/* + * arch/arm/mach-at91rm9200/ics1523.c + * @@ -7864,7 +3748,11 @@ diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/ics1523.c linux-2.6 + +#include <asm/hardware.h> +#include <asm/io.h> ++ ++#include <linux/clk.h> +#include <linux/delay.h> ++#include <linux/err.h> ++#include <linux/init.h> + +#include <asm/arch/ics1523.h> +#include <asm/arch/at91_twi.h> @@ -7874,65 +3762,47 @@ diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/ics1523.c linux-2.6 +#define AT91_TWI_ERROR (AT91_TWI_NACK | AT91_TWI_UNRE | AT91_TWI_OVRE) + + -+//----------------------------------------------------------------------------- -+// -+// TWI Register access -+// -+//----------------------------------------------------------------------------- -+ -+static inline unsigned long at91_twi_read(unsigned int reg) -+{ -+ void __iomem *twi_base = (void __iomem *)AT91_VA_BASE_TWI; -+ -+ return __raw_readl(twi_base + reg); -+} ++static void __iomem *twi_base; + -+static inline void at91_twi_write(unsigned int reg, unsigned long value) -+{ -+ void __iomem *twi_base = (void __iomem *)AT91_VA_BASE_TWI; ++#define at91_twi_read(reg) __raw_readl(twi_base + (reg)) ++#define at91_twi_write(reg, val) __raw_writel((val), twi_base + (reg)) + -+ __raw_writel(value, twi_base + reg); -+} + -+//----------------------------------------------------------------------------- -+// -+// Initialization of TWI CLOCK -+// -+//----------------------------------------------------------------------------- ++/* ----------------------------------------------------------------------------- ++ * Initialization of TWI CLOCK ++ * ----------------------------------------------------------------------------- */ + -+static void AT91F_SetTwiClock(unsigned int mck_khz) ++static void at91_ics1523_SetTwiClock(unsigned int mck_khz) +{ + int sclock; + + /* Here, CKDIV = 1 and CHDIV = CLDIV ==> CLDIV = CHDIV = 1/4*((Fmclk/FTWI) -6) */ -+ sclock = (10*mck_khz /ICS_TRANSFER_RATE); ++ sclock = (10*mck_khz / ICS_TRANSFER_RATE); + if (sclock % 10 >= 5) + sclock = (sclock /10) - 5; + else + sclock = (sclock /10)- 6; -+ sclock = (sclock + (4 - sclock %4)) >> 2; // div 4 ++ sclock = (sclock + (4 - sclock %4)) >> 2; /* div 4 */ + + at91_twi_write(AT91_TWI_CWGR, 0x00010000 | sclock | (sclock << 8)); +} + -+//----------------------------------------------------------------------------- -+// -+// Read a byte with TWI Interface from the Clock Generator ICS1523 -+// -+//----------------------------------------------------------------------------- ++/* ----------------------------------------------------------------------------- ++ * Read a byte with TWI Interface from the Clock Generator ICS1523 ++ * ----------------------------------------------------------------------------- */ + -+static int AT91F_ICS1523_ReadByte(unsigned char reg_address, unsigned char *data_in) ++static int at91_ics1523_ReadByte(unsigned char reg_address, unsigned char *data_in) +{ + int Status, nb_trial; + -+ at91_twi_write(AT91_TWI_MMR, AT91_TWI_MREAD | AT91_TWI_IADRSZ_1 | ((ICS_ADD << 16) & AT91_TWI_DADR)); ++ at91_twi_write(AT91_TWI_MMR, AT91_TWI_MREAD | AT91_TWI_IADRSZ_1 | ((ICS_ADDR << 16) & AT91_TWI_DADR)); + at91_twi_write(AT91_TWI_IADR, reg_address); + at91_twi_write(AT91_TWI_CR, AT91_TWI_START | AT91_TWI_STOP); + -+ // Program temporizing period (300us) ++ /* Program temporizing period (300us) */ + udelay(300); + -+ // Wait TXcomplete ... ++ /* Wait TXcomplete ... */ + nb_trial = 0; + Status = at91_twi_read(AT91_TWI_SR); + while (!(Status & AT91_TWI_TXCOMP) && (nb_trial < 10)) { @@ -7942,27 +3812,26 @@ diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/ics1523.c linux-2.6 + + if (Status & AT91_TWI_TXCOMP) { + *data_in = (unsigned char) at91_twi_read(AT91_TWI_RHR); -+ return ((int) ICS1523_ACCESS_OK); ++ return ICS1523_ACCESS_OK; + } -+ return ((int) ICS1523_ACCESS_ERROR); ++ else ++ return ICS1523_ACCESS_ERROR; +} + -+//----------------------------------------------------------------------------- -+// -+// Write a byte with TWI Interface to the Clock Generator ICS1523 -+// -+//----------------------------------------------------------------------------- ++/* ----------------------------------------------------------------------------- ++ * Write a byte with TWI Interface to the Clock Generator ICS1523 ++ * ----------------------------------------------------------------------------- */ + -+static int AT91F_ICS1523_WriteByte(unsigned char reg_address, unsigned char data_out) ++static int at91_ics1523_WriteByte(unsigned char reg_address, unsigned char data_out) +{ + int Status, nb_trial; + -+ at91_twi_write(AT91_TWI_MMR, AT91_TWI_IADRSZ_1 | ((ICS_ADD << 16) & AT91_TWI_DADR)); ++ at91_twi_write(AT91_TWI_MMR, AT91_TWI_IADRSZ_1 | ((ICS_ADDR << 16) & AT91_TWI_DADR)); + at91_twi_write(AT91_TWI_IADR, reg_address); + at91_twi_write(AT91_TWI_THR, data_out); + at91_twi_write(AT91_TWI_CR, AT91_TWI_START | AT91_TWI_STOP); + -+ // Program temporizing period (300us) ++ /* Program temporizing period (300us) */ + udelay(300); + + nb_trial = 0; @@ -7970,34 +3839,36 @@ diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/ics1523.c linux-2.6 + while (!(Status & AT91_TWI_TXCOMP) && (nb_trial < 10)) { + nb_trial++; + if (Status & AT91_TWI_ERROR) { -+ // Si Under run OR NACK Start again ++ /* If Underrun OR NACK - Start again */ + at91_twi_write(AT91_TWI_CR, AT91_TWI_START | AT91_TWI_STOP); + -+ // Program temporizing period (300us) ++ /* Program temporizing period (300us) */ + udelay(300); + } + Status = at91_twi_read(AT91_TWI_SR); + }; + + if (Status & AT91_TWI_TXCOMP) -+ return ((int) ICS1523_ACCESS_OK); ++ return ICS1523_ACCESS_OK; + else -+ return ((int) ICS1523_ACCESS_ERROR); ++ return ICS1523_ACCESS_ERROR; +} + -+//----------------------------------------------------------------------------- -+// -+// Initialization of the Clock Generator ICS1523 -+// -+//----------------------------------------------------------------------------- ++/* ----------------------------------------------------------------------------- ++ * Initialization of the Clock Generator ICS1523 ++ * ----------------------------------------------------------------------------- */ + -+int AT91F_ICS1523_clockinit(void) ++int at91_ics1523_init(void) +{ -+ int ack, nb_trial, error_status; ++ int nb_trial; ++ int ack = ICS1523_ACCESS_OK; + unsigned int status = 0xffffffff; + struct clk *twi_clk; + -+ error_status = (int) ICS1523_ACCESS_OK; ++ /* Map in TWI peripheral */ ++ twi_base = ioremap(AT91RM9200_BASE_TWI, SZ_16K); ++ if (!twi_base) ++ return -ENOMEM; + + /* pins used for TWI interface */ + at91_set_A_periph(AT91_PIN_PA25, 0); /* TWD */ @@ -8005,120 +3876,67 @@ diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/ics1523.c linux-2.6 + at91_set_A_periph(AT91_PIN_PA26, 0); /* TWCK */ + at91_set_multi_drive(AT91_PIN_PA26, 1); + -+ // Enable the TWI clock. ++ /* Enable the TWI clock */ + twi_clk = clk_get(NULL, "twi_clk"); + if (IS_ERR(twi_clk)) + return ICS1523_ACCESS_ERROR; + clk_enable(twi_clk); + -+ // Disable interrupts ++ /* Disable interrupts */ + at91_twi_write(AT91_TWI_IDR, -1); + -+ // Reset peripheral ++ /* Reset peripheral */ + at91_twi_write(AT91_TWI_CR, AT91_TWI_SWRST); + -+ // Set Master mode ++ /* Set Master mode */ + at91_twi_write(AT91_TWI_CR, AT91_TWI_MSEN); + -+ // Set TWI Clock Waveform Generator Register -+ AT91F_SetTwiClock(60000); // MCK in KHz = 60000 KHz ++ /* Set TWI Clock Waveform Generator Register */ ++ at91_ics1523_SetTwiClock(60000); /* MCK in KHz = 60000 KHz */ + -+ // ICS1523 Initialisation -+ ack = AT91F_ICS1523_WriteByte ((unsigned char) ICS_ICR, (unsigned char) 0); -+ error_status |= ack; -+ ack = AT91F_ICS1523_WriteByte ((unsigned char) ICS_OE, (unsigned char) (ICS_OEF | ICS_OET2 | ICS_OETCK)); -+ error_status |= ack; -+ ack = AT91F_ICS1523_WriteByte ((unsigned char) ICS_OD, (unsigned char) (ICS_INSEL | 0x7F)); -+ error_status |= ack; -+ ack = AT91F_ICS1523_WriteByte ((unsigned char) ICS_DPAO, (unsigned char) 0); -+ error_status |= ack; ++ /* ICS1523 Initialisation */ ++ ack |= at91_ics1523_WriteByte ((unsigned char) ICS_ICR, (unsigned char) 0); ++ ack |= at91_ics1523_WriteByte ((unsigned char) ICS_OE, (unsigned char) (ICS_OEF | ICS_OET2 | ICS_OETCK)); ++ ack |= at91_ics1523_WriteByte ((unsigned char) ICS_OD, (unsigned char) (ICS_INSEL | 0x7F)); ++ ack |= at91_ics1523_WriteByte ((unsigned char) ICS_DPAO, (unsigned char) 0); + + nb_trial = 0; + do { + nb_trial++; -+ ack = AT91F_ICS1523_WriteByte ((unsigned char) ICS_ICR, (unsigned char) (ICS_ENDLS | ICS_ENPLS | ICS_PDEN /*| ICS_FUNCSEL*/)); -+ error_status |= ack; -+ ack = AT91F_ICS1523_WriteByte ((unsigned char) ICS_LCR, (unsigned char) (ICS_PSD | ICS_PFD)); -+ error_status |= ack; -+ ack = AT91F_ICS1523_WriteByte ((unsigned char) ICS_FD0, (unsigned char) 0x39) ; /* 0x7A */ -+ error_status |= ack; -+ ack = AT91F_ICS1523_WriteByte ((unsigned char) ICS_FD1, (unsigned char) 0x00); -+ error_status |= ack; -+ ack = AT91F_ICS1523_WriteByte ((unsigned char) ICS_SWRST, (unsigned char) (ICS_PLLR)); -+ error_status |= ack; -+ -+ // Program 1ms temporizing period ++ ack |= at91_ics1523_WriteByte ((unsigned char) ICS_ICR, (unsigned char) (ICS_ENDLS | ICS_ENPLS | ICS_PDEN /*| ICS_FUNCSEL*/)); ++ ack |= at91_ics1523_WriteByte ((unsigned char) ICS_LCR, (unsigned char) (ICS_PSD | ICS_PFD)); ++ ack |= at91_ics1523_WriteByte ((unsigned char) ICS_FD0, (unsigned char) 0x39) ; /* 0x7A */ ++ ack |= at91_ics1523_WriteByte ((unsigned char) ICS_FD1, (unsigned char) 0x00); ++ ack |= at91_ics1523_WriteByte ((unsigned char) ICS_SWRST, (unsigned char) (ICS_PLLR)); ++ ++ /* Program 1ms temporizing period */ + mdelay(1); + -+ AT91F_ICS1523_ReadByte ((unsigned char) ICS_SR, (char *)&status); ++ at91_ics1523_ReadByte ((unsigned char) ICS_SR, (char *)&status); + } while (!((unsigned int) status & (unsigned int) ICS_PLLLOCK) && (nb_trial < 10)); + -+ ack = AT91F_ICS1523_WriteByte ((unsigned char) ICS_DPAC, (unsigned char) 0x03) ; /* 0x01 */ -+ error_status |= ack; -+ ack = AT91F_ICS1523_WriteByte ((unsigned char) ICS_SWRST, (unsigned char) (ICS_DPAR)); -+ error_status |= ack; ++ ack |= at91_ics1523_WriteByte ((unsigned char) ICS_DPAC, (unsigned char) 0x03) ; /* 0x01 */ ++ ack |= at91_ics1523_WriteByte ((unsigned char) ICS_SWRST, (unsigned char) (ICS_DPAR)); + + /* Program 1ms temporizing period */ + mdelay(1); + -+ ack = AT91F_ICS1523_WriteByte ((unsigned char) ICS_DPAO, (unsigned char) 0x00); -+ error_status |= ack; ++ ack |= at91_ics1523_WriteByte ((unsigned char) ICS_DPAO, (unsigned char) 0x00); + + /* Program 1ms temporizing period */ + mdelay(1); ++ ++ /* All done - cleanup */ ++ iounmap(twi_base); ++ clk_disable(twi_clk); ++ clk_put(twi_clk); + -+ return (error_status); ++ return ack; +} -diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/irq.c linux-2.6.19/arch/arm/mach-at91rm9200/irq.c ---- linux-2.6.19-final/arch/arm/mach-at91rm9200/irq.c Mon Dec 4 16:39:29 2006 -+++ linux-2.6.19/arch/arm/mach-at91rm9200/irq.c Wed Nov 1 12:40:39 2006 -@@ -47,6 +47,10 @@ - at91_sys_write(AT91_AIC_IECR, 1 << irq); - } - -+unsigned int at91_extern_irq; -+ -+#define is_extern_irq(irq) ((1 << (irq)) & at91_extern_irq) -+ - static int at91_aic_set_type(unsigned irq, unsigned type) - { - unsigned int smr, srctype; -@@ -59,14 +63,16 @@ - srctype = AT91_AIC_SRCTYPE_RISING; - break; - case IRQT_LOW: -- if ((irq > AT91_ID_FIQ) && (irq < AT91RM9200_ID_IRQ0)) /* only supported on external interrupts */ -+ if ((irq == AT91_ID_FIQ) || is_extern_irq(irq)) /* only supported on external interrupts */ -+ srctype = AT91_AIC_SRCTYPE_LOW; -+ else - return -EINVAL; -- srctype = AT91_AIC_SRCTYPE_LOW; - break; - case IRQT_FALLING: -- if ((irq > AT91_ID_FIQ) && (irq < AT91RM9200_ID_IRQ0)) /* only supported on external interrupts */ -+ if ((irq == AT91_ID_FIQ) || is_extern_irq(irq)) /* only supported on external interrupts */ -+ srctype = AT91_AIC_SRCTYPE_FALLING; -+ else - return -EINVAL; -- srctype = AT91_AIC_SRCTYPE_FALLING; - break; - default: - return -EINVAL; -diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/pm.c linux-2.6.19/arch/arm/mach-at91rm9200/pm.c ---- linux-2.6.19-final/arch/arm/mach-at91rm9200/pm.c Mon Dec 4 16:39:29 2006 -+++ linux-2.6.19/arch/arm/mach-at91rm9200/pm.c Thu Nov 16 11:51:41 2006 -@@ -26,7 +26,10 @@ - #include <asm/mach/irq.h> - #include <asm/mach-types.h> - -+#include <asm/arch/at91_pmc.h> -+#include <asm/arch/at91rm9200_mc.h> - #include <asm/arch/gpio.h> -+#include <asm/arch/cpu.h> - - #include "generic.h" - -@@ -60,6 +63,7 @@ +diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/pm.c linux-2.6-stable/arch/arm/mach-at91/pm.c +--- linux-2.6.21/arch/arm/mach-at91/pm.c Thu Apr 26 05:08:32 2007 ++++ linux-2.6-stable/arch/arm/mach-at91/pm.c Tue May 8 12:13:31 2007 +@@ -63,6 +63,7 @@ * Verify that all the clocks are correct before entering * slow-clock mode. */ @@ -8126,49 +3944,29 @@ diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/pm.c linux-2.6.19/a static int at91_pm_verify_clocks(void) { unsigned long scsr; -@@ -68,9 +72,15 @@ - scsr = at91_sys_read(AT91_PMC_SCSR); - - /* USB must not be using PLLB */ -- if ((scsr & (AT91_PMC_UHP | AT91_PMC_UDP)) != 0) { -- pr_debug("AT91: PM - Suspend-to-RAM with USB still active\n"); -- return 0; -+ if (cpu_is_at91rm9200()) { -+ if ((scsr & (AT91RM9200_PMC_UHP | AT91RM9200_PMC_UDP)) != 0) { -+ pr_debug("AT91: PM - Suspend-to-RAM with USB still active\n"); -+ return 0; -+ } -+ } else if (cpu_is_at91sam9261()) { -+#warning "Check SAM9261 USB clocks" -+ } else if (cpu_is_at91sam9260()) { -+#warning "Check SAM9260 USB clocks" - } - - #ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS -@@ -112,7 +122,6 @@ - static void (*slow_clock)(void); - +@@ -104,20 +105,15 @@ + } -- - static int at91_pm_enter(suspend_state_t state) + /* +- * Call this from platform driver suspend() to see how deeply to suspend. ++ * This is called from clk_must_disable(), to see how deeply to suspend. + * For example, some controllers (like OHCI) need one of the PLL clocks + * in order to act as a wakeup source, and those are not available when + * going into slow clock mode. +- * +- * REVISIT: generalize as clk_will_be_available(clk)? Other platforms have +- * the very same problem (but not using at91 main_clk), and it'd be better +- * to add one generic API rather than lots of platform-specific ones. + */ + int at91_suspend_entering_slow_clock(void) { - at91_gpio_suspend(); -@@ -123,13 +132,7 @@ - (at91_sys_read(AT91_PMC_PCSR) - | (1 << AT91_ID_FIQ) - | (1 << AT91_ID_SYS) -- | (1 << AT91RM9200_ID_IRQ0) -- | (1 << AT91RM9200_ID_IRQ1) -- | (1 << AT91RM9200_ID_IRQ2) -- | (1 << AT91RM9200_ID_IRQ3) -- | (1 << AT91RM9200_ID_IRQ4) -- | (1 << AT91RM9200_ID_IRQ5) -- | (1 << AT91RM9200_ID_IRQ6)) -+ | (at91_extern_irq)) - & at91_sys_read(AT91_AIC_IMR), - state); + return (target_state == PM_SUSPEND_MEM); + } +-EXPORT_SYMBOL(at91_suspend_entering_slow_clock); + -@@ -203,16 +206,23 @@ + static void (*slow_clock)(void); +@@ -207,16 +203,23 @@ .enter = at91_pm_enter, }; @@ -8193,16 +3991,16 @@ diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/pm.c linux-2.6.19/a memcpy(slow_clock, at91rm9200_slow_clock, at91rm9200_slow_clock_sz); + printk("AT91: Power Management (with slow clock mode)\n"); +#else -+ printk("AT91: Power Management\n"); ++ printk("AT91: Power Management\n"); #endif /* Disable SDRAM low-power mode. Cannot be used with self-refresh. */ -diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/pm_slowclock.S linux-2.6.19/arch/arm/mach-at91rm9200/pm_slowclock.S ---- linux-2.6.19-final/arch/arm/mach-at91rm9200/pm_slowclock.S Thu Jan 1 02:00:00 1970 -+++ linux-2.6.19/arch/arm/mach-at91rm9200/pm_slowclock.S Thu Nov 16 11:47:10 2006 -@@ -0,0 +1,170 @@ +diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/pm_slowclock.S linux-2.6-stable/arch/arm/mach-at91/pm_slowclock.S +--- linux-2.6.21/arch/arm/mach-at91/pm_slowclock.S Thu Jan 1 02:00:00 1970 ++++ linux-2.6-stable/arch/arm/mach-at91/pm_slowclock.S Tue May 8 12:13:31 2007 +@@ -0,0 +1,172 @@ +/* -+ * arch/arm/mach-at91rm9200/pm_slow_clock.S ++ * arch/arm/mach-at91/pm_slow_clock.S + * + * Copyright (C) 2006 Savin Zlobec + * @@ -8214,6 +4012,8 @@ diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/pm_slowclock.S linu + +#include <linux/linkage.h> +#include <asm/hardware.h> ++#include <asm/arch/at91_pmc.h> ++#include <asm/arch/at91rm9200_mc.h> + +#define MCKRDY_TIMEOUT 1000 +#define MOSCRDY_TIMEOUT 1000 @@ -8371,12 +4171,98 @@ diff -urN -x CVS linux-2.6.19-final/arch/arm/mach-at91rm9200/pm_slowclock.S linu + +ENTRY(at91rm9200_slow_clock_sz) + .word .-at91rm9200_slow_clock -diff -urN -x CVS linux-2.6.19-final/drivers/char/Kconfig linux-2.6.19/drivers/char/Kconfig ---- linux-2.6.19-final/drivers/char/Kconfig Mon Dec 4 16:39:54 2006 -+++ linux-2.6.19/drivers/char/Kconfig Thu Nov 16 16:34:39 2006 -@@ -1048,5 +1048,21 @@ - sysfs directory, /sys/devices/platform/telco_clock, with a number of - files for controlling the behavior of this hardware. +diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/tclib.c linux-2.6-stable/arch/arm/mach-at91/tclib.c +--- linux-2.6.21/arch/arm/mach-at91/tclib.c Thu Jan 1 02:00:00 1970 ++++ linux-2.6-stable/arch/arm/mach-at91/tclib.c Tue May 8 12:13:31 2007 +@@ -0,0 +1,17 @@ ++#include <linux/clk.h> ++#include <linux/kernel.h> ++#include <linux/module.h> ++ ++#include "tclib.h" ++ ++static struct atmel_tcblock *blocks; ++static int nblocks; ++ ++/* ++ * Called from the processor-specific init to register the TC Blocks. ++ */ ++void __init atmel_tc_init(struct atmel_tcblock *tcblocks, int n) ++{ ++ blocks = tcblocks; ++ nblocks = n; ++} +diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/tclib.h linux-2.6-stable/arch/arm/mach-at91/tclib.h +--- linux-2.6.21/arch/arm/mach-at91/tclib.h Thu Jan 1 02:00:00 1970 ++++ linux-2.6-stable/arch/arm/mach-at91/tclib.h Tue May 8 12:13:31 2007 +@@ -0,0 +1,11 @@ ++ ++#define TC_PER_TCB 3 ++ ++struct atmel_tcblock { ++ u32 physaddr; ++ void __iomem *ioaddr; ++ struct clk *clk[TC_PER_TCB]; ++ int irq[TC_PER_TCB]; ++}; ++ ++extern void __init atmel_tc_init(struct atmel_tcblock *tcblocks, int n); +diff -urN -x CVS linux-2.6.21/arch/arm/mm/Kconfig linux-2.6-stable/arch/arm/mm/Kconfig +--- linux-2.6.21/arch/arm/mm/Kconfig Thu Apr 26 05:08:32 2007 ++++ linux-2.6-stable/arch/arm/mm/Kconfig Wed May 9 10:20:54 2007 +@@ -171,8 +171,8 @@ + # ARM926T + config CPU_ARM926T + bool "Support ARM926T processor" +- depends on ARCH_INTEGRATOR || ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX || MACH_REALVIEW_EB || ARCH_PNX4008 || ARCH_NETX || CPU_S3C2412 || ARCH_AT91SAM9260 || ARCH_AT91SAM9261 || ARCH_AT91SAM9263 || ARCH_NS9XXX +- default y if ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX || ARCH_PNX4008 || ARCH_NETX || CPU_S3C2412 || ARCH_AT91SAM9260 || ARCH_AT91SAM9261 || ARCH_AT91SAM9263 || ARCH_NS9XXX ++ depends on ARCH_INTEGRATOR || ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX || MACH_REALVIEW_EB || ARCH_PNX4008 || ARCH_NETX || CPU_S3C2412 || ARCH_AT91SAM9260 || ARCH_AT91SAM9261 || ARCH_AT91SAM9263 || ARCH_AT91SAM9RL || ARCH_NS9XXX ++ default y if ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX || ARCH_PNX4008 || ARCH_NETX || CPU_S3C2412 || ARCH_AT91SAM9260 || ARCH_AT91SAM9261 || ARCH_AT91SAM9263 || ARCH_AT91SAM9RL || ARCH_NS9XXX + select CPU_32v5 + select CPU_ABRT_EV5TJ + select CPU_CACHE_VIVT +diff -urN -x CVS linux-2.6.21/arch/arm/tools/mach-types linux-2.6-stable/arch/arm/tools/mach-types +--- linux-2.6.21/arch/arm/tools/mach-types Thu Apr 26 05:08:32 2007 ++++ linux-2.6-stable/arch/arm/tools/mach-types Tue May 8 12:13:31 2007 +@@ -1335,3 +1335,32 @@ + comtech_router MACH_COMTECH_ROUTER COMTECH_ROUTER 1327 + sbc2410x MACH_SBC2410X SBC2410X 1328 + at4x0bd MACH_AT4X0BD AT4X0BD 1329 ++cbifr MACH_CBIFR CBIFR 1330 ++arcom_quantum MACH_ARCOM_QUANTUM ARCOM_QUANTUM 1331 ++matrix520 MACH_MATRIX520 MATRIX520 1332 ++matrix510 MACH_MATRIX510 MATRIX510 1333 ++matrix500 MACH_MATRIX500 MATRIX500 1334 ++m501 MACH_M501 M501 1335 ++aaeon1270 MACH_AAEON1270 AAEON1270 1336 ++matrix500ev MACH_MATRIX500EV MATRIX500EV 1337 ++pac500 MACH_PAC500 PAC500 1338 ++pnx8181 MACH_PNX8181 PNX8181 1339 ++colibri320 MACH_COLIBRI320 COLIBRI320 1340 ++aztoolbb MACH_AZTOOLBB AZTOOLBB 1341 ++aztoolg2 MACH_AZTOOLG2 AZTOOLG2 1342 ++dvlhost MACH_DVLHOST DVLHOST 1343 ++zir9200 MACH_ZIR9200 ZIR9200 1344 ++zir9260 MACH_ZIR9260 ZIR9260 1345 ++cocopah MACH_COCOPAH COCOPAH 1346 ++nds MACH_NDS NDS 1347 ++rosencrantz MACH_ROSENCRANTZ ROSENCRANTZ 1348 ++fttx_odsc MACH_FTTX_ODSC FTTX_ODSC 1349 ++classe_r6904 MACH_CLASSE_R6904 CLASSE_R6904 1350 ++cam60 MACH_CAM60 CAM60 1351 ++mxc30031ads MACH_MXC30031ADS MXC30031ADS 1352 ++datacall MACH_DATACALL DATACALL 1353 ++at91eb01 MACH_AT91EB01 AT91EB01 1354 ++rty MACH_RTY RTY 1355 ++dwl2100 MACH_DWL2100 DWL2100 1356 ++vinsi MACH_VINSI VINSI 1357 ++db88f5281 MACH_DB88F5281 DB88F5281 1358 +diff -urN -x CVS linux-2.6.21/drivers/char/Kconfig linux-2.6-stable/drivers/char/Kconfig +--- linux-2.6.21/drivers/char/Kconfig Thu Apr 26 05:08:32 2007 ++++ linux-2.6-stable/drivers/char/Kconfig Tue May 8 14:31:24 2007 +@@ -1071,5 +1071,21 @@ + /sys/devices/platform/telco_clock, with a number of files for + controlling the behavior of this hardware. +config AT91_SPI + bool "SPI driver (legacy) for AT91RM9200 processors" @@ -8396,10 +4282,10 @@ diff -urN -x CVS linux-2.6.19-final/drivers/char/Kconfig linux-2.6.19/drivers/ch + endmenu -diff -urN -x CVS linux-2.6.19-final/drivers/char/Makefile linux-2.6.19/drivers/char/Makefile ---- linux-2.6.19-final/drivers/char/Makefile Mon Dec 4 16:39:54 2006 -+++ linux-2.6.19/drivers/char/Makefile Thu Oct 12 17:07:38 2006 -@@ -90,6 +90,8 @@ +diff -urN -x CVS linux-2.6.21/drivers/char/Makefile linux-2.6-stable/drivers/char/Makefile +--- linux-2.6.21/drivers/char/Makefile Thu Apr 26 05:08:32 2007 ++++ linux-2.6-stable/drivers/char/Makefile Tue May 8 14:31:24 2007 +@@ -93,6 +93,8 @@ obj-$(CONFIG_GPIO_VR41XX) += vr41xx_giu.o obj-$(CONFIG_TANBAC_TB0219) += tb0219.o obj-$(CONFIG_TELCLOCK) += tlclk.o @@ -8408,9 +4294,9 @@ diff -urN -x CVS linux-2.6.19-final/drivers/char/Makefile linux-2.6.19/drivers/c obj-$(CONFIG_WATCHDOG) += watchdog/ obj-$(CONFIG_MWAVE) += mwave/ -diff -urN -x CVS linux-2.6.19-final/drivers/char/at91_spi.c linux-2.6.19/drivers/char/at91_spi.c ---- linux-2.6.19-final/drivers/char/at91_spi.c Thu Jan 1 02:00:00 1970 -+++ linux-2.6.19/drivers/char/at91_spi.c Tue Oct 24 14:31:50 2006 +diff -urN -x CVS linux-2.6.21/drivers/char/at91_spi.c linux-2.6-stable/drivers/char/at91_spi.c +--- linux-2.6.21/drivers/char/at91_spi.c Thu Jan 1 02:00:00 1970 ++++ linux-2.6-stable/drivers/char/at91_spi.c Tue May 8 14:31:24 2007 @@ -0,0 +1,336 @@ +/* + * Serial Peripheral Interface (SPI) driver for the Atmel AT91RM9200 (Thunder) @@ -8431,11 +4317,11 @@ diff -urN -x CVS linux-2.6.19-final/drivers/char/at91_spi.c linux-2.6.19/drivers +#include <linux/interrupt.h> +#include <linux/clk.h> +#include <linux/platform_device.h> ++#include <linux/atmel_pdc.h> +#include <asm/io.h> +#include <asm/semaphore.h> + +#include <asm/arch/at91_spi.h> -+#include <asm/arch/at91_pdc.h> +#include <asm/arch/board.h> +#include <asm/arch/spi.h> + @@ -8535,10 +4421,10 @@ diff -urN -x CVS linux-2.6.19-final/drivers/char/at91_spi.c linux-2.6.19/drivers + device->rx = dma_map_single(NULL, list->rx[0], list->rxlen[0], DMA_FROM_DEVICE); + + /* Program PDC registers */ -+ at91_spi_write(AT91_PDC_TPR, device->tx); -+ at91_spi_write(AT91_PDC_RPR, device->rx); -+ at91_spi_write(AT91_PDC_TCR, list->txlen[0] / tx_size); -+ at91_spi_write(AT91_PDC_RCR, list->rxlen[0] / tx_size); ++ at91_spi_write(ATMEL_PDC_TPR, device->tx); ++ at91_spi_write(ATMEL_PDC_RPR, device->rx); ++ at91_spi_write(ATMEL_PDC_TCR, list->txlen[0] / tx_size); ++ at91_spi_write(ATMEL_PDC_RCR, list->rxlen[0] / tx_size); + + /* Is there a second transfer? */ + if (list->nr_transfers > 1) { @@ -8546,16 +4432,16 @@ diff -urN -x CVS linux-2.6.19-final/drivers/char/at91_spi.c linux-2.6.19/drivers + device->rxnext = dma_map_single(NULL, list->rx[1], list->rxlen[1], DMA_FROM_DEVICE); + + /* Program Next PDC registers */ -+ at91_spi_write(AT91_PDC_TNPR, device->txnext); -+ at91_spi_write(AT91_PDC_RNPR, device->rxnext); -+ at91_spi_write(AT91_PDC_TNCR, list->txlen[1] / tx_size); -+ at91_spi_write(AT91_PDC_RNCR, list->rxlen[1] / tx_size); ++ at91_spi_write(ATMEL_PDC_TNPR, device->txnext); ++ at91_spi_write(ATMEL_PDC_RNPR, device->rxnext); ++ at91_spi_write(ATMEL_PDC_TNCR, list->txlen[1] / tx_size); ++ at91_spi_write(ATMEL_PDC_RNCR, list->rxlen[1] / tx_size); + } + else { + device->txnext = 0; + device->rxnext = 0; -+ at91_spi_write(AT91_PDC_TNCR, 0); -+ at91_spi_write(AT91_PDC_RNCR, 0); ++ at91_spi_write(ATMEL_PDC_TNCR, 0); ++ at91_spi_write(ATMEL_PDC_RNCR, 0); + } + + // TODO: If we are doing consecutive transfers (at high speed, or @@ -8565,7 +4451,7 @@ diff -urN -x CVS linux-2.6.19-final/drivers/char/at91_spi.c linux-2.6.19/drivers + // in the interrupt handler. + + /* Enable transmitter and receiver */ -+ at91_spi_write(AT91_PDC_PTCR, AT91_PDC_RXTEN | AT91_PDC_TXTEN); ++ at91_spi_write(ATMEL_PDC_PTCR, ATMEL_PDC_RXTEN | ATMEL_PDC_TXTEN); + + at91_spi_write(AT91_SPI_IER, AT91_SPI_ENDRX); /* enable buffer complete interrupt */ + wait_for_completion(&transfer_complete); @@ -8608,7 +4494,7 @@ diff -urN -x CVS linux-2.6.19-final/drivers/char/at91_spi.c linux-2.6.19/drivers + at91_spi_write(AT91_SPI_IDR, AT91_SPI_ENDRX); /* disable interrupt */ + + /* Disable transmitter and receiver */ -+ at91_spi_write(AT91_PDC_PTCR, AT91_PDC_RXTDIS | AT91_PDC_TXTDIS); ++ at91_spi_write(ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS); + + device->xfers = NULL; + complete(&transfer_complete); @@ -8616,8 +4502,8 @@ diff -urN -x CVS linux-2.6.19-final/drivers/char/at91_spi.c linux-2.6.19/drivers + else if (list->curr+1 == list->nr_transfers) { /* no more next transfers */ + device->txnext = 0; + device->rxnext = 0; -+ at91_spi_write(AT91_PDC_TNCR, 0); -+ at91_spi_write(AT91_PDC_RNCR, 0); ++ at91_spi_write(ATMEL_PDC_TNCR, 0); ++ at91_spi_write(ATMEL_PDC_RNCR, 0); + } + else { + int i = (list->curr)+1; @@ -8627,10 +4513,10 @@ diff -urN -x CVS linux-2.6.19-final/drivers/char/at91_spi.c linux-2.6.19/drivers + + device->txnext = dma_map_single(NULL, list->tx[i], list->txlen[i], DMA_TO_DEVICE); + device->rxnext = dma_map_single(NULL, list->rx[i], list->rxlen[i], DMA_FROM_DEVICE); -+ at91_spi_write(AT91_PDC_TNPR, device->txnext); -+ at91_spi_write(AT91_PDC_RNPR, device->rxnext); -+ at91_spi_write(AT91_PDC_TNCR, list->txlen[i] / tx_size); -+ at91_spi_write(AT91_PDC_RNCR, list->rxlen[i] / tx_size); ++ at91_spi_write(ATMEL_PDC_TNPR, device->txnext); ++ at91_spi_write(ATMEL_PDC_RNPR, device->rxnext); ++ at91_spi_write(ATMEL_PDC_TNCR, list->txlen[i] / tx_size); ++ at91_spi_write(ATMEL_PDC_RNCR, list->rxlen[i] / tx_size); + } + return IRQ_HANDLED; +} @@ -8651,7 +4537,7 @@ diff -urN -x CVS linux-2.6.19-final/drivers/char/at91_spi.c linux-2.6.19/drivers + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) + return -ENXIO; -+ ++ + if (!request_mem_region(res->start, res->end - res->start + 1, "at91_spi")) + return -EBUSY; + @@ -8670,7 +4556,7 @@ diff -urN -x CVS linux-2.6.19-final/drivers/char/at91_spi.c linux-2.6.19/drivers + } + + at91_spi_write(AT91_SPI_CR, AT91_SPI_SWRST); /* software reset of SPI controller */ -+ ++ + /* + * Calculate the correct SPI baud-rate divisor. + */ @@ -8684,7 +4570,7 @@ diff -urN -x CVS linux-2.6.19-final/drivers/char/at91_spi.c linux-2.6.19/drivers + at91_spi_write(AT91_SPI_CSR(i), AT91_SPI_CPOL | AT91_SPI_BITS_8 | (16 << 16) | (scbr << 8)); + } + -+ at91_spi_write(AT91_PDC_PTCR, AT91_PDC_RXTDIS | AT91_PDC_TXTDIS); ++ at91_spi_write(ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS); + + memset(&spi_dev, 0, sizeof(spi_dev)); + spi_dev[0].pcs = 0xE; @@ -8748,9 +4634,9 @@ diff -urN -x CVS linux-2.6.19-final/drivers/char/at91_spi.c linux-2.6.19/drivers +MODULE_LICENSE("GPL") +MODULE_AUTHOR("Andrew Victor") +MODULE_DESCRIPTION("SPI driver for Atmel AT91RM9200") -diff -urN -x CVS linux-2.6.19-final/drivers/char/at91_spidev.c linux-2.6.19/drivers/char/at91_spidev.c ---- linux-2.6.19-final/drivers/char/at91_spidev.c Thu Jan 1 02:00:00 1970 -+++ linux-2.6.19/drivers/char/at91_spidev.c Tue Oct 24 14:58:33 2006 +diff -urN -x CVS linux-2.6.21/drivers/char/at91_spidev.c linux-2.6-stable/drivers/char/at91_spidev.c +--- linux-2.6.21/drivers/char/at91_spidev.c Thu Jan 1 02:00:00 1970 ++++ linux-2.6-stable/drivers/char/at91_spidev.c Tue May 8 14:31:24 2007 @@ -0,0 +1,236 @@ +/* + * User-space interface to the SPI bus on Atmel AT91RM9200 @@ -8988,35 +4874,25 @@ diff -urN -x CVS linux-2.6.19-final/drivers/char/at91_spidev.c linux-2.6.19/driv +MODULE_LICENSE("GPL") +MODULE_AUTHOR("Andrew Victor") +MODULE_DESCRIPTION("SPI /dev interface for Atmel AT91RM9200") -diff -urN -x CVS linux-2.6.19-final/drivers/char/watchdog/at91rm9200_wdt.c linux-2.6.19/drivers/char/watchdog/at91rm9200_wdt.c ---- linux-2.6.19-final/drivers/char/watchdog/at91rm9200_wdt.c Mon Dec 4 16:39:59 2006 -+++ linux-2.6.19/drivers/char/watchdog/at91rm9200_wdt.c Wed Nov 8 12:40:58 2006 -@@ -21,6 +21,7 @@ - #include <linux/watchdog.h> - #include <asm/bitops.h> - #include <asm/uaccess.h> -+#include <asm/arch/at91_st.h> - - - #define WDT_DEFAULT_TIME 5 /* seconds */ -diff -urN -x CVS linux-2.6.19-final/drivers/i2c/busses/Kconfig linux-2.6.19/drivers/i2c/busses/Kconfig ---- linux-2.6.19-final/drivers/i2c/busses/Kconfig Mon Dec 4 16:40:01 2006 -+++ linux-2.6.19/drivers/i2c/busses/Kconfig Thu Oct 12 17:07:38 2006 -@@ -74,6 +74,13 @@ - This driver can also be built as a module. If so, the module - will be called i2c-amd8111. - -+config I2C_AT91 -+ tristate "Atmel AT91 I2C Two-Wire interface (TWI)" -+ depends on I2C && ARCH_AT91 && EXPERIMENTAL +diff -urN -x CVS linux-2.6.21/drivers/i2c/busses/Kconfig linux-2.6-stable/drivers/i2c/busses/Kconfig +--- linux-2.6.21/drivers/i2c/busses/Kconfig Thu Apr 26 05:08:32 2007 ++++ linux-2.6-stable/drivers/i2c/busses/Kconfig Tue May 8 12:13:31 2007 +@@ -81,6 +81,14 @@ + This supports the use of the I2C interface on Atmel AT91 + processors. + ++config I2C_AT91_CLOCKRATE ++ prompt "Atmel AT91 I2C/TWI clock-rate" ++ depends on I2C_AT91 ++ int ++ default 100000 + help -+ This supports the use of the I2C interface on Atmel AT91 -+ processors. ++ Set the AT91 I2C/TWI clock-rate. + config I2C_AU1550 tristate "Au1550/Au1200 SMBus interface" depends on I2C && (SOC_AU1550 || SOC_AU1200) -@@ -520,6 +527,14 @@ +@@ -545,6 +553,14 @@ This driver can also be built as a module. If so, the module will be called i2c-voodoo3. @@ -9031,358 +4907,64 @@ diff -urN -x CVS linux-2.6.19-final/drivers/i2c/busses/Kconfig linux-2.6.19/driv config I2C_PCA_ISA tristate "PCA9564 on an ISA bus" depends on I2C -diff -urN -x CVS linux-2.6.19-final/drivers/i2c/busses/Makefile linux-2.6.19/drivers/i2c/busses/Makefile ---- linux-2.6.19-final/drivers/i2c/busses/Makefile Mon Dec 4 16:40:01 2006 -+++ linux-2.6.19/drivers/i2c/busses/Makefile Thu Oct 12 17:07:38 2006 -@@ -8,6 +8,7 @@ - obj-$(CONFIG_I2C_AMD756) += i2c-amd756.o - obj-$(CONFIG_I2C_AMD756_S4882) += i2c-amd756-s4882.o - obj-$(CONFIG_I2C_AMD8111) += i2c-amd8111.o -+obj-$(CONFIG_I2C_AT91) += i2c-at91.o - obj-$(CONFIG_I2C_AU1550) += i2c-au1550.o - obj-$(CONFIG_I2C_ELEKTOR) += i2c-elektor.o - obj-$(CONFIG_I2C_HYDRA) += i2c-hydra.o -@@ -27,6 +28,7 @@ - obj-$(CONFIG_I2C_OMAP) += i2c-omap.o +diff -urN -x CVS linux-2.6.21/drivers/i2c/busses/Makefile linux-2.6-stable/drivers/i2c/busses/Makefile +--- linux-2.6.21/drivers/i2c/busses/Makefile Thu Apr 26 05:08:32 2007 ++++ linux-2.6-stable/drivers/i2c/busses/Makefile Tue May 8 12:13:31 2007 +@@ -28,6 +28,7 @@ obj-$(CONFIG_I2C_PARPORT) += i2c-parport.o obj-$(CONFIG_I2C_PARPORT_LIGHT) += i2c-parport-light.o + obj-$(CONFIG_I2C_PASEMI) += i2c-pasemi.o +obj-$(CONFIG_I2C_PCA) += i2c-pca.o obj-$(CONFIG_I2C_PCA_ISA) += i2c-pca-isa.o obj-$(CONFIG_I2C_PIIX4) += i2c-piix4.o - obj-$(CONFIG_I2C_PROSAVAGE) += i2c-prosavage.o -diff -urN -x CVS linux-2.6.19-final/drivers/i2c/busses/i2c-at91.c linux-2.6.19/drivers/i2c/busses/i2c-at91.c ---- linux-2.6.19-final/drivers/i2c/busses/i2c-at91.c Thu Jan 1 02:00:00 1970 -+++ linux-2.6.19/drivers/i2c/busses/i2c-at91.c Fri Nov 10 09:18:41 2006 -@@ -0,0 +1,325 @@ -+/* -+ i2c Support for Atmel's AT91 Two-Wire Interface (TWI) -+ -+ Copyright (C) 2004 Rick Bronson -+ Converted to 2.6 by Andrew Victor <andrew@sanpeople.com> -+ -+ Borrowed heavily from original work by: -+ Copyright (C) 2000 Philip Edelbrock <phil@stimpy.netroedge.com> -+ -+ This program is free software; you can redistribute it and/or modify -+ it under the terms of the GNU General Public License as published by -+ the Free Software Foundation; either version 2 of the License, or -+ (at your option) any later version. -+*/ -+ -+#include <linux/module.h> -+#include <linux/version.h> -+#include <linux/kernel.h> -+#include <linux/slab.h> -+#include <linux/pci.h> -+#include <linux/types.h> -+#include <linux/delay.h> -+#include <linux/i2c.h> -+#include <linux/init.h> -+#include <linux/clk.h> -+#include <linux/platform_device.h> -+ -+#include <asm/io.h> -+ -+#include <asm/arch/at91_twi.h> -+#include <asm/arch/board.h> -+#include <asm/arch/cpu.h> -+ -+#define TWI_CLOCK 100000 /* Hz. max 400 Kbits/sec */ -+ -+ -+static struct clk *twi_clk; -+static void __iomem *twi_base; -+ -+#define at91_twi_read(reg) __raw_readl(twi_base + (reg)) -+#define at91_twi_write(reg, val) __raw_writel((val), twi_base + (reg)) -+ -+ -+/* -+ * Initialize the TWI hardware registers. -+ */ -+static void __devinit at91_twi_hwinit(void) -+{ -+ unsigned long cdiv, ckdiv; -+ -+ at91_twi_write(AT91_TWI_IDR, 0xffffffff); /* Disable all interrupts */ -+ at91_twi_write(AT91_TWI_CR, AT91_TWI_SWRST); /* Reset peripheral */ -+ at91_twi_write(AT91_TWI_CR, AT91_TWI_MSEN); /* Set Master mode */ -+ -+ /* Calcuate clock dividers */ -+ cdiv = (clk_get_rate(twi_clk) / (2 * TWI_CLOCK)) - 3; -+ cdiv = cdiv + 1; /* round up */ -+ ckdiv = 0; -+ while (cdiv > 255) { -+ ckdiv++; -+ cdiv = cdiv >> 1; -+ } -+ -+ if (cpu_is_at91rm9200()) { /* AT91RM9200 Errata #22 */ -+ if (ckdiv > 5) { -+ printk(KERN_ERR "AT91 I2C: Invalid TWI_CLOCK value!\n"); -+ ckdiv = 5; -+ } -+ } -+ -+ at91_twi_write(AT91_TWI_CWGR, (ckdiv << 16) | (cdiv << 8) | cdiv); -+} -+ -+/* -+ * Poll the i2c status register until the specified bit is set. -+ * Returns 0 if timed out (100 msec). -+ */ -+static short at91_poll_status(unsigned long bit) -+{ -+ int loop_cntr = 10000; -+ -+ do { -+ udelay(10); -+ } while (!(at91_twi_read(AT91_TWI_SR) & bit) && (--loop_cntr > 0)); -+ -+ return (loop_cntr > 0); -+} -+ -+static int xfer_read(struct i2c_adapter *adap, unsigned char *buf, int length) -+{ -+ /* Send Start */ -+ at91_twi_write(AT91_TWI_CR, AT91_TWI_START); -+ -+ /* Read data */ -+ while (length--) { -+ if (!length) /* need to send Stop before reading last byte */ -+ at91_twi_write(AT91_TWI_CR, AT91_TWI_STOP); -+ if (!at91_poll_status(AT91_TWI_RXRDY)) { -+ dev_dbg(&adap->dev, "RXRDY timeout\n"); -+ return -ETIMEDOUT; -+ } -+ *buf++ = (at91_twi_read(AT91_TWI_RHR) & 0xff); -+ } -+ -+ return 0; -+} -+ -+static int xfer_write(struct i2c_adapter *adap, unsigned char *buf, int length) -+{ -+ /* Load first byte into transmitter */ -+ at91_twi_write(AT91_TWI_THR, *buf++); -+ -+ /* Send Start */ -+ at91_twi_write(AT91_TWI_CR, AT91_TWI_START); -+ -+ do { -+ if (!at91_poll_status(AT91_TWI_TXRDY)) { -+ dev_dbg(&adap->dev, "TXRDY timeout\n"); -+ return -ETIMEDOUT; -+ } -+ -+ length--; /* byte was transmitted */ -+ -+ if (length > 0) /* more data to send? */ -+ at91_twi_write(AT91_TWI_THR, *buf++); -+ } while (length); -+ -+ /* Send Stop */ -+ at91_twi_write(AT91_TWI_CR, AT91_TWI_STOP); -+ -+ return 0; -+} -+ -+/* -+ * Generic i2c master transfer entrypoint. -+ * -+ * Note: We do not use Atmel's feature of storing the "internal device address". -+ * Instead the "internal device address" has to be written using a seperate -+ * i2c message. -+ * http://lists.arm.linux.org.uk/pipermail/linux-arm-kernel/2004-September/024411.html -+ */ -+static int at91_xfer(struct i2c_adapter *adap, struct i2c_msg *pmsg, int num) -+{ -+ int i, ret; -+ -+ dev_dbg(&adap->dev, "at91_xfer: processing %d messages:\n", num); -+ -+ for (i = 0; i < num; i++) { -+ dev_dbg(&adap->dev, " #%d: %sing %d byte%s %s 0x%02x\n", i, -+ pmsg->flags & I2C_M_RD ? "read" : "writ", -+ pmsg->len, pmsg->len > 1 ? "s" : "", -+ pmsg->flags & I2C_M_RD ? "from" : "to", pmsg->addr); -+ -+ at91_twi_write(AT91_TWI_MMR, (pmsg->addr << 16) -+ | ((pmsg->flags & I2C_M_RD) ? AT91_TWI_MREAD : 0)); -+ -+ if (pmsg->len && pmsg->buf) { /* sanity check */ -+ if (pmsg->flags & I2C_M_RD) -+ ret = xfer_read(adap, pmsg->buf, pmsg->len); -+ else -+ ret = xfer_write(adap, pmsg->buf, pmsg->len); -+ -+ if (ret) -+ return ret; -+ -+ /* Wait until transfer is finished */ -+ if (!at91_poll_status(AT91_TWI_TXCOMP)) { -+ dev_dbg(&adap->dev, "TXCOMP timeout\n"); -+ return -ETIMEDOUT; -+ } -+ } -+ dev_dbg(&adap->dev, "transfer complete\n"); -+ pmsg++; /* next message */ -+ } -+ return i; -+} -+ -+/* -+ * Return list of supported functionality. -+ */ -+static u32 at91_func(struct i2c_adapter *adapter) -+{ -+ return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; -+} -+ -+static struct i2c_algorithm at91_algorithm = { -+ .master_xfer = at91_xfer, -+ .functionality = at91_func, -+}; -+ -+/* -+ * Main initialization routine. -+ */ -+static int __devinit at91_i2c_probe(struct platform_device *pdev) -+{ -+ struct i2c_adapter *adapter; -+ struct resource *res; -+ int rc; -+ -+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ if (!res) -+ return -ENXIO; -+ -+ if (!request_mem_region(res->start, res->end - res->start + 1, "at91_i2c")) -+ return -EBUSY; -+ -+ twi_base = ioremap(res->start, res->end - res->start + 1); -+ if (!twi_base) { -+ rc = -ENOMEM; -+ goto fail0; -+ } -+ -+ twi_clk = clk_get(NULL, "twi_clk"); -+ if (IS_ERR(twi_clk)) { -+ dev_err(&pdev->dev, "no clock defined\n"); -+ rc = -ENODEV; -+ goto fail1; -+ } -+ -+ adapter = kzalloc(sizeof(struct i2c_adapter), GFP_KERNEL); -+ if (adapter == NULL) { -+ dev_err(&pdev->dev, "can't allocate inteface!\n"); -+ rc = -ENOMEM; -+ goto fail2; -+ } -+ sprintf(adapter->name, "AT91"); -+ adapter->algo = &at91_algorithm; -+ adapter->class = I2C_CLASS_HWMON; -+ adapter->dev.parent = &pdev->dev; -+ -+ platform_set_drvdata(pdev, adapter); -+ -+ clk_enable(twi_clk); /* enable peripheral clock */ -+ at91_twi_hwinit(); /* initialize TWI controller */ -+ -+ rc = i2c_add_adapter(adapter); -+ if (rc) { -+ dev_err(&pdev->dev, "Adapter %s registration failed\n", -+ adapter->name); -+ goto fail3; -+ } -+ -+ dev_info(&pdev->dev, "AT91 i2c bus driver.\n"); -+ return 0; -+ -+fail3: -+ platform_set_drvdata(pdev, NULL); -+ kfree(adapter); -+ clk_disable(twi_clk); -+fail2: -+ clk_put(twi_clk); -+fail1: -+ iounmap(twi_base); -+fail0: -+ release_mem_region(res->start, res->end - res->start + 1); -+ -+ return rc; -+} -+ -+static int __devexit at91_i2c_remove(struct platform_device *pdev) -+{ -+ struct i2c_adapter *adapter = platform_get_drvdata(pdev); -+ struct resource *res; -+ int rc; -+ -+ rc = i2c_del_adapter(adapter); -+ platform_set_drvdata(pdev, NULL); -+ -+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ iounmap(twi_base); -+ release_mem_region(res->start, res->end - res->start + 1); -+ -+ clk_disable(twi_clk); /* disable peripheral clock */ -+ clk_put(twi_clk); -+ -+ return rc; -+} -+ -+#ifdef CONFIG_PM -+ -+/* NOTE: could save a few mA by keeping clock off outside of at91_xfer... */ -+ -+static int at91_i2c_suspend(struct platform_device *pdev, pm_message_t mesg) -+{ -+ clk_disable(twi_clk); -+ return 0; -+} -+ -+static int at91_i2c_resume(struct platform_device *pdev) -+{ -+ return clk_enable(twi_clk); -+} -+ -+#else -+#define at91_i2c_suspend NULL -+#define at91_i2c_resume NULL -+#endif -+ -+static struct platform_driver at91_i2c_driver = { -+ .probe = at91_i2c_probe, -+ .remove = __devexit_p(at91_i2c_remove), -+ .suspend = at91_i2c_suspend, -+ .resume = at91_i2c_resume, -+ .driver = { -+ .name = "at91_i2c", -+ .owner = THIS_MODULE, -+ }, -+}; -+ -+static int __init at91_i2c_init(void) -+{ -+ return platform_driver_register(&at91_i2c_driver); -+} -+ -+static void __exit at91_i2c_exit(void) -+{ -+ platform_driver_unregister(&at91_i2c_driver); -+} -+ -+module_init(at91_i2c_init); -+module_exit(at91_i2c_exit); -+ -+MODULE_AUTHOR("Rick Bronson"); -+MODULE_DESCRIPTION("I2C (TWI) driver for Atmel AT91"); -+MODULE_LICENSE("GPL"); -diff -urN -x CVS linux-2.6.19-final/drivers/i2c/busses/i2c-pca.c linux-2.6.19/drivers/i2c/busses/i2c-pca.c ---- linux-2.6.19-final/drivers/i2c/busses/i2c-pca.c Thu Jan 1 02:00:00 1970 -+++ linux-2.6.19/drivers/i2c/busses/i2c-pca.c Mon Oct 16 16:10:42 2006 -@@ -0,0 +1,202 @@ + obj-$(CONFIG_I2C_PNX) += i2c-pnx.o +diff -urN -x CVS linux-2.6.21/drivers/i2c/busses/i2c-at91.c linux-2.6-stable/drivers/i2c/busses/i2c-at91.c +--- linux-2.6.21/drivers/i2c/busses/i2c-at91.c Thu Apr 26 05:08:32 2007 ++++ linux-2.6-stable/drivers/i2c/busses/i2c-at91.c Tue May 8 12:13:31 2007 +@@ -31,8 +31,11 @@ + #include <asm/arch/board.h> + #include <asm/arch/cpu.h> + +-#define TWI_CLOCK 100000 /* Hz. max 400 Kbits/sec */ + ++/* Clockrate is configurable - max 400 Kbits/sec */ ++static unsigned int clockrate = CONFIG_I2C_AT91_CLOCKRATE; ++module_param(clockrate, uint, 0); ++MODULE_PARM_DESC(clockrate, "The TWI clockrate"); + + static struct clk *twi_clk; + static void __iomem *twi_base; +@@ -53,7 +56,7 @@ + at91_twi_write(AT91_TWI_CR, AT91_TWI_MSEN); /* Set Master mode */ + + /* Calcuate clock dividers */ +- cdiv = (clk_get_rate(twi_clk) / (2 * TWI_CLOCK)) - 3; ++ cdiv = (clk_get_rate(twi_clk) / (2 * clockrate)) - 3; + cdiv = cdiv + 1; /* round up */ + ckdiv = 0; + while (cdiv > 255) { +@@ -61,11 +64,12 @@ + cdiv = cdiv >> 1; + } + +- if (cpu_is_at91rm9200()) { /* AT91RM9200 Errata #22 */ +- if (ckdiv > 5) { +- printk(KERN_ERR "AT91 I2C: Invalid TWI_CLOCK value!\n"); +- ckdiv = 5; +- } ++ if (cpu_is_at91rm9200() && (ckdiv > 5)) { /* AT91RM9200 Errata #22 */ ++ printk(KERN_ERR "AT91 I2C: Invalid TWI clockrate!\n"); ++ ckdiv = 5; ++ } else if (ckdiv > 7) { ++ printk(KERN_ERR "AT91 I2C: Invalid TWI clockrate!\n"); ++ ckdiv = 7; + } + + at91_twi_write(AT91_TWI_CWGR, (ckdiv << 16) | (cdiv << 8) | cdiv); +diff -urN -x CVS linux-2.6.21/drivers/i2c/busses/i2c-pca.c linux-2.6-stable/drivers/i2c/busses/i2c-pca.c +--- linux-2.6.21/drivers/i2c/busses/i2c-pca.c Thu Jan 1 02:00:00 1970 ++++ linux-2.6-stable/drivers/i2c/busses/i2c-pca.c Tue May 8 12:13:31 2007 +@@ -0,0 +1,213 @@ +/* + * Platform driver for PCA9564 I2C bus controller. + * @@ -9425,6 +5007,9 @@ diff -urN -x CVS linux-2.6.19-final/drivers/i2c/busses/i2c-pca.c linux-2.6.19/dr +#define PCA_OWN_ADDRESS 0x55 /* our address for slave mode */ +#define PCA_CLOCK I2C_PCA_CON_59kHz + ++//#define REG_SHIFT 2 ++#define REG_SHIFT 0 ++ +//#define DEBUG_IO + +#define PCA_IO_SIZE 4 @@ -9449,12 +5034,16 @@ diff -urN -x CVS linux-2.6.19-final/drivers/i2c/busses/i2c-pca.c linux-2.6.19/dr + static char *names[] = { "T/O", "DAT", "ADR", "CON" }; + printk("*** write %s at %#lx <= %#04x\n", names[reg], (unsigned long) base_addr+reg, val); +#endif -+ outb(val, base_addr+reg); ++ udelay(1); ++ outb(val, base_addr + (reg << REG_SHIFT)); +} + +static int pca_readbyte(struct i2c_algo_pca_data *adap, int reg) +{ -+ int res = inb(base_addr+reg); ++ int res; ++ ++ udelay(1); ++ res = inb(base_addr + (reg << REG_SHIFT)); +#ifdef DEBUG_IO + { + static char *names[] = { "STA", "DAT", "ADR", "CON" }; @@ -9497,6 +5086,7 @@ diff -urN -x CVS linux-2.6.19-final/drivers/i2c/busses/i2c-pca.c linux-2.6.19/dr + .id = I2C_HW_A_PLAT, + .algo_data = &pca_i2c_data, + .name = "PCA9564", ++ .class = I2C_CLASS_HWMON, +}; + +static int __devinit pca_i2c_probe(struct platform_device *pdev) @@ -9524,6 +5114,9 @@ diff -urN -x CVS linux-2.6.19-final/drivers/i2c/busses/i2c-pca.c linux-2.6.19/dr + } + } + ++ /* set up the driverfs linkage to our parent device */ ++ pca_i2c_ops.dev.parent = &pdev->dev; ++ + if (i2c_pca_add_bus(&pca_i2c_ops) < 0) { + printk(KERN_ERR "i2c-pca: Failed to add i2c bus\n"); + goto out_irq; @@ -9547,7 +5140,7 @@ diff -urN -x CVS linux-2.6.19-final/drivers/i2c/busses/i2c-pca.c linux-2.6.19/dr +{ + struct resource *res; + -+ i2c_pca_del_bus(&pca_i2c_ops); ++ i2c_del_adapter(&pca_i2c_ops); + + if (irq > 0) + free_irq(irq, NULL); @@ -9585,37 +5178,89 @@ diff -urN -x CVS linux-2.6.19-final/drivers/i2c/busses/i2c-pca.c linux-2.6.19/dr +MODULE_AUTHOR("Andrew Victor"); +MODULE_DESCRIPTION("PCA9564 platform driver"); +MODULE_LICENSE("GPL"); -diff -urN -x CVS linux-2.6.19-final/drivers/leds/Kconfig linux-2.6.19/drivers/leds/Kconfig ---- linux-2.6.19-final/drivers/leds/Kconfig Mon Dec 4 16:33:34 2006 -+++ linux-2.6.19/drivers/leds/Kconfig Thu Nov 16 17:15:16 2006 +diff -urN -x CVS linux-2.6.21/drivers/input/touchscreen/ads7846.c linux-2.6-stable/drivers/input/touchscreen/ads7846.c +--- linux-2.6.21/drivers/input/touchscreen/ads7846.c Thu Apr 26 05:08:32 2007 ++++ linux-2.6-stable/drivers/input/touchscreen/ads7846.c Tue May 8 12:56:33 2007 +@@ -39,7 +39,8 @@ + /* + * This code has been heavily tested on a Nokia 770, and lightly + * tested on other ads7846 devices (OSK/Mistral, Lubbock). +- * Support for ads7843 and ads7845 has only been stubbed in. ++ * Support for ads7843 tested on Atmel at91sam926x-EK. ++ * Support for ads7845 has only been stubbed in. + * + * IRQ handling needs a workaround because of a shortcoming in handling + * edge triggered IRQs on some platforms like the OMAP1/2. These +@@ -246,18 +247,16 @@ + + /* REVISIT: take a few more samples, and compare ... */ + +- /* maybe off internal vREF */ +- if (use_internal) { +- req->ref_off = REF_OFF; +- req->xfer[4].tx_buf = &req->ref_off; +- req->xfer[4].len = 1; +- spi_message_add_tail(&req->xfer[4], &req->msg); +- +- req->xfer[5].rx_buf = &req->scratch; +- req->xfer[5].len = 2; +- CS_CHANGE(req->xfer[5]); +- spi_message_add_tail(&req->xfer[5], &req->msg); +- } ++ /* converter in low power mode & enable PENIRQ */ ++ req->ref_off = PWRDOWN; ++ req->xfer[4].tx_buf = &req->ref_off; ++ req->xfer[4].len = 1; ++ spi_message_add_tail(&req->xfer[4], &req->msg); ++ ++ req->xfer[5].rx_buf = &req->scratch; ++ req->xfer[5].len = 2; ++ CS_CHANGE(req->xfer[5]); ++ spi_message_add_tail(&req->xfer[5], &req->msg); + + ts->irq_disabled = 1; + disable_irq(spi->irq); +@@ -536,6 +535,9 @@ + } else + Rt = 0; + ++ if (ts->model == 7843) ++ Rt = ts->pressure_max / 2; ++ + /* Sample found inconsistent by debouncing or pressure is beyond + * the maximum. Don't report it to user space, repeat at least + * once more the measurement +diff -urN -x CVS linux-2.6.21/drivers/leds/Kconfig linux-2.6-stable/drivers/leds/Kconfig +--- linux-2.6.21/drivers/leds/Kconfig Thu Apr 26 05:08:32 2007 ++++ linux-2.6-stable/drivers/leds/Kconfig Tue May 8 12:13:31 2007 @@ -76,6 +76,13 @@ This option enables support for the Soekris net4801 and net4826 error LED. +config LEDS_AT91 + tristate "LED support using AT91 GPIOs" -+ depends LEDS_CLASS && ARCH_AT91 && !LEDS ++ depends on LEDS_CLASS && ARCH_AT91 && !LEDS + help + This option enables support for LEDs connected to GPIO lines + on AT91-based boards. + - comment "LED Triggers" - - config LEDS_TRIGGERS -diff -urN -x CVS linux-2.6.19-final/drivers/leds/Makefile linux-2.6.19/drivers/leds/Makefile ---- linux-2.6.19-final/drivers/leds/Makefile Mon Dec 4 16:33:34 2006 -+++ linux-2.6.19/drivers/leds/Makefile Thu Nov 16 12:52:06 2006 -@@ -13,6 +13,7 @@ - obj-$(CONFIG_LEDS_S3C24XX) += leds-s3c24xx.o - obj-$(CONFIG_LEDS_AMS_DELTA) += leds-ams-delta.o - obj-$(CONFIG_LEDS_NET48XX) += leds-net48xx.o + config LEDS_WRAP + tristate "LED Support for the WRAP series LEDs" + depends on LEDS_CLASS && SCx200_GPIO +diff -urN -x CVS linux-2.6.21/drivers/leds/Makefile linux-2.6-stable/drivers/leds/Makefile +--- linux-2.6.21/drivers/leds/Makefile Thu Apr 26 05:08:32 2007 ++++ linux-2.6-stable/drivers/leds/Makefile Tue May 8 12:13:31 2007 +@@ -16,6 +16,7 @@ + obj-$(CONFIG_LEDS_WRAP) += leds-wrap.o + obj-$(CONFIG_LEDS_H1940) += leds-h1940.o + obj-$(CONFIG_LEDS_COBALT) += leds-cobalt.o +obj-$(CONFIG_LEDS_AT91) += leds-at91.o # LED Triggers obj-$(CONFIG_LEDS_TRIGGER_TIMER) += ledtrig-timer.o -diff -urN -x CVS linux-2.6.19-final/drivers/leds/leds-at91.c linux-2.6.19/drivers/leds/leds-at91.c ---- linux-2.6.19-final/drivers/leds/leds-at91.c Thu Jan 1 02:00:00 1970 -+++ linux-2.6.19/drivers/leds/leds-at91.c Mon Nov 20 11:02:21 2006 +diff -urN -x CVS linux-2.6.21/drivers/leds/leds-at91.c linux-2.6-stable/drivers/leds/leds-at91.c +--- linux-2.6.21/drivers/leds/leds-at91.c Thu Jan 1 02:00:00 1970 ++++ linux-2.6-stable/drivers/leds/leds-at91.c Tue May 8 12:13:31 2007 @@ -0,0 +1,140 @@ +/* + * AT91 GPIO based LED driver @@ -9653,7 +5298,7 @@ diff -urN -x CVS linux-2.6.19-final/drivers/leds/leds-at91.c linux-2.6.19/driver + + if (led->led_data->flags & 1) /* active high/low? */ + active = !active; -+ at91_set_gpio_value(led->led_data->gpio, value == LED_OFF); ++ at91_set_gpio_value(led->led_data->gpio, active); +} + +static int __devexit at91_led_remove(struct platform_device *pdev) @@ -9757,434 +5402,19 @@ diff -urN -x CVS linux-2.6.19-final/drivers/leds/leds-at91.c linux-2.6.19/driver +MODULE_DESCRIPTION("AT91 GPIO LED driver"); +MODULE_AUTHOR("David Brownell"); +MODULE_LICENSE("GPL"); -diff -urN -x CVS linux-2.6.19-final/drivers/mmc/Kconfig linux-2.6.19/drivers/mmc/Kconfig ---- linux-2.6.19-final/drivers/mmc/Kconfig Mon Dec 4 16:40:13 2006 -+++ linux-2.6.19/drivers/mmc/Kconfig Thu Nov 9 14:16:55 2006 -@@ -91,11 +91,11 @@ - - If unsure, say N. - --config MMC_AT91RM9200 -- tristate "AT91RM9200 SD/MMC Card Interface support" -- depends on ARCH_AT91RM9200 && MMC -+config MMC_AT91 -+ tristate "AT91 SD/MMC Card Interface support" -+ depends on ARCH_AT91 && MMC - help -- This selects the AT91RM9200 MCI controller. -+ This selects the AT91 MCI controller. - - If unsure, say N. - -diff -urN -x CVS linux-2.6.19-final/drivers/mmc/Makefile linux-2.6.19/drivers/mmc/Makefile ---- linux-2.6.19-final/drivers/mmc/Makefile Mon Dec 4 16:40:13 2006 -+++ linux-2.6.19/drivers/mmc/Makefile Thu Nov 9 14:17:47 2006 -@@ -22,7 +22,7 @@ - obj-$(CONFIG_MMC_WBSD) += wbsd.o - obj-$(CONFIG_MMC_AU1X) += au1xmmc.o - obj-$(CONFIG_MMC_OMAP) += omap.o --obj-$(CONFIG_MMC_AT91RM9200) += at91_mci.o -+obj-$(CONFIG_MMC_AT91) += at91_mci.o - obj-$(CONFIG_MMC_TIFM_SD) += tifm_sd.o - - mmc_core-y := mmc.o mmc_sysfs.o -diff -urN -x CVS linux-2.6.19-final/drivers/mmc/at91_mci.c linux-2.6.19/drivers/mmc/at91_mci.c ---- linux-2.6.19-final/drivers/mmc/at91_mci.c Mon Dec 4 16:40:13 2006 -+++ linux-2.6.19/drivers/mmc/at91_mci.c Sat Nov 25 11:00:45 2006 -@@ -1,5 +1,5 @@ - /* -- * linux/drivers/mmc/at91_mci.c - ATMEL AT91RM9200 MCI Driver -+ * linux/drivers/mmc/at91_mci.c - ATMEL AT91 MCI Driver - * - * Copyright (C) 2005 Cougar Creek Computing Devices Ltd, All Rights Reserved - * -@@ -11,7 +11,7 @@ - */ - - /* -- This is the AT91RM9200 MCI driver that has been tested with both MMC cards -+ This is the AT91 MCI driver that has been tested with both MMC cards - and SD-cards. Boards that support write protect are now supported. - The CCAT91SBC001 board does not support SD cards. - -@@ -38,8 +38,8 @@ - controller to manage the transfers. - - A read is done from the controller directly to the scatterlist passed in from the request. -- Due to a bug in the controller, when a read is completed, all the words are byte -- swapped in the scatterlist buffers. -+ Due to a bug in the AT91RM9200 controller, when a read is completed, all the words are byte -+ swapped in the scatterlist buffers. AT91SAM926x are not affected by this bug. - - The sequence of read interrupts is: ENDRX, RXBUFF, CMDRDY - -@@ -72,42 +72,27 @@ - #include <asm/irq.h> - #include <asm/mach/mmc.h> - #include <asm/arch/board.h> -+#include <asm/arch/cpu.h> - #include <asm/arch/gpio.h> --#include <asm/arch/at91rm9200_mci.h> --#include <asm/arch/at91rm9200_pdc.h> -+#include <asm/arch/at91_mci.h> -+#include <asm/arch/at91_pdc.h> - - #define DRIVER_NAME "at91_mci" - - #undef SUPPORT_4WIRE - --static struct clk *mci_clk; -+#define FL_SENT_COMMAND (1 << 0) -+#define FL_SENT_STOP (1 << 1) - --#define FL_SENT_COMMAND (1 << 0) --#define FL_SENT_STOP (1 << 1) -+#define AT91_MCI_ERRORS (AT91_MCI_RINDE | AT91_MCI_RDIRE | AT91_MCI_RCRCE \ -+ | AT91_MCI_RENDE | AT91_MCI_RTOE | AT91_MCI_DCRCE \ -+ | AT91_MCI_DTOE | AT91_MCI_OVRE | AT91_MCI_UNRE) - -+#define at91_mci_read(host, reg) __raw_readl((host)->baseaddr + (reg)) -+#define at91_mci_write(host, reg, val) __raw_writel((val), (host)->baseaddr + (reg)) - - - /* -- * Read from a MCI register. -- */ --static inline unsigned long at91_mci_read(unsigned int reg) --{ -- void __iomem *mci_base = (void __iomem *)AT91_VA_BASE_MCI; -- -- return __raw_readl(mci_base + reg); --} -- --/* -- * Write to a MCI register. -- */ --static inline void at91_mci_write(unsigned int reg, unsigned long value) --{ -- void __iomem *mci_base = (void __iomem *)AT91_VA_BASE_MCI; -- -- __raw_writel(value, mci_base + reg); --} -- --/* - * Low level type for this driver - */ - struct at91mci_host -@@ -116,9 +101,14 @@ - struct mmc_command *cmd; - struct mmc_request *request; - -+ void __iomem *baseaddr; -+ int irq; -+ - struct at91_mmc_data *board; - int present; - -+ struct clk *mci_clk; -+ - /* - * Flag indicating when the command has been sent. This is used to - * work out whether or not to send the stop -@@ -158,7 +148,6 @@ - for (i = 0; i < len; i++) { - struct scatterlist *sg; - int amount; -- int index; - unsigned int *sgbuffer; - - sg = &data->sg[i]; -@@ -166,10 +155,15 @@ - sgbuffer = kmap_atomic(sg->page, KM_BIO_SRC_IRQ) + sg->offset; - amount = min(size, sg->length); - size -= amount; -- amount /= 4; -- -- for (index = 0; index < amount; index++) -- *dmabuf++ = swab32(sgbuffer[index]); -+ -+ if (cpu_is_at91rm9200()) { /* AT91RM9200 errata */ -+ int index; -+ -+ for (index = 0; index < (amount / 4); index++) -+ *dmabuf++ = swab32(sgbuffer[index]); -+ } -+ else -+ memcpy(dmabuf, sgbuffer, amount); - - kunmap_atomic(sgbuffer, KM_BIO_SRC_IRQ); - -@@ -217,13 +211,13 @@ - - /* Check to see if this needs filling */ - if (i == 0) { -- if (at91_mci_read(AT91_PDC_RCR) != 0) { -+ if (at91_mci_read(host, AT91_PDC_RCR) != 0) { - pr_debug("Transfer active in current\n"); - continue; - } - } - else { -- if (at91_mci_read(AT91_PDC_RNCR) != 0) { -+ if (at91_mci_read(host, AT91_PDC_RNCR) != 0) { - pr_debug("Transfer active in next\n"); - continue; - } -@@ -240,12 +234,12 @@ - pr_debug("dma address = %08X, length = %d\n", sg->dma_address, sg->length); - - if (i == 0) { -- at91_mci_write(AT91_PDC_RPR, sg->dma_address); -- at91_mci_write(AT91_PDC_RCR, sg->length / 4); -+ at91_mci_write(host, AT91_PDC_RPR, sg->dma_address); -+ at91_mci_write(host, AT91_PDC_RCR, sg->length / 4); - } - else { -- at91_mci_write(AT91_PDC_RNPR, sg->dma_address); -- at91_mci_write(AT91_PDC_RNCR, sg->length / 4); -+ at91_mci_write(host, AT91_PDC_RNPR, sg->dma_address); -+ at91_mci_write(host, AT91_PDC_RNCR, sg->length / 4); - } - } - -@@ -276,8 +270,6 @@ - - while (host->in_use_index < host->transfer_index) { - unsigned int *buffer; -- int index; -- int len; - - struct scatterlist *sg; - -@@ -295,11 +287,14 @@ - - data->bytes_xfered += sg->length; - -- len = sg->length / 4; -- -- for (index = 0; index < len; index++) { -- buffer[index] = swab32(buffer[index]); -+ if (cpu_is_at91rm9200()) { /* AT91RM9200 errata */ -+ int index; -+ -+ for (index = 0; index < (sg->length / 4); index++) { -+ buffer[index] = swab32(buffer[index]); -+ } - } -+ - kunmap_atomic(buffer, KM_BIO_SRC_IRQ); - flush_dcache_page(sg->page); - } -@@ -308,57 +303,34 @@ - if (host->transfer_index < data->sg_len) - at91mci_pre_dma_read(host); - else { -- at91_mci_write(AT91_MCI_IER, AT91_MCI_RXBUFF); -- at91_mci_write(AT91_PDC_PTCR, AT91_PDC_RXTDIS | AT91_PDC_TXTDIS); -+ at91_mci_write(host, AT91_MCI_IER, AT91_MCI_RXBUFF); -+ at91_mci_write(host, AT91_PDC_PTCR, AT91_PDC_RXTDIS | AT91_PDC_TXTDIS); - } - - pr_debug("post dma read done\n"); - } - --/* -- * Handle transmitted data -- */ --static void at91_mci_handle_transmitted(struct at91mci_host *host) --{ -- struct mmc_command *cmd; -- struct mmc_data *data; -- -- pr_debug("Handling the transmit\n"); -- -- /* Disable the transfer */ -- at91_mci_write(AT91_PDC_PTCR, AT91_PDC_RXTDIS | AT91_PDC_TXTDIS); -- -- /* Now wait for cmd ready */ -- at91_mci_write(AT91_MCI_IDR, AT91_MCI_TXBUFE); -- at91_mci_write(AT91_MCI_IER, AT91_MCI_NOTBUSY); -- -- cmd = host->cmd; -- if (!cmd) return; -- -- data = cmd->data; -- if (!data) return; -- -- data->bytes_xfered = host->total_length; --} - - /* - * Enable the controller - */ --static void at91_mci_enable(void) -+static void at91_mci_enable(struct at91mci_host *host) - { -- at91_mci_write(AT91_MCI_CR, AT91_MCI_MCIEN); -- at91_mci_write(AT91_MCI_IDR, 0xFFFFFFFF); -- at91_mci_write(AT91_MCI_DTOR, AT91_MCI_DTOMUL_1M | AT91_MCI_DTOCYC); -- at91_mci_write(AT91_MCI_MR, 0x834A); -- at91_mci_write(AT91_MCI_SDCR, 0x0); -+ at91_mci_write(host, AT91_MCI_CR, AT91_MCI_MCIEN); -+ at91_mci_write(host, AT91_MCI_IDR, 0xffffffff); -+ at91_mci_write(host, AT91_MCI_DTOR, AT91_MCI_DTOMUL_1M | AT91_MCI_DTOCYC); -+ at91_mci_write(host, AT91_MCI_MR, AT91_MCI_PDCMODE | 0x34a); -+ -+ /* use Slot A or B (only one at same time) */ -+ at91_mci_write(host, AT91_MCI_SDCR, host->board->slot_b); - } - - /* - * Disable the controller - */ --static void at91_mci_disable(void) -+static void at91_mci_disable(struct at91mci_host *host) - { -- at91_mci_write(AT91_MCI_CR, AT91_MCI_MCIDIS | AT91_MCI_SWRST); -+ at91_mci_write(host, AT91_MCI_CR, AT91_MCI_MCIDIS | AT91_MCI_SWRST); - } - - /* -@@ -378,13 +350,13 @@ - - /* Not sure if this is needed */ - #if 0 -- if ((at91_mci_read(AT91_MCI_SR) & AT91_MCI_RTOE) && (cmd->opcode == 1)) { -+ if ((at91_mci_read(host, AT91_MCI_SR) & AT91_MCI_RTOE) && (cmd->opcode == 1)) { - pr_debug("Clearing timeout\n"); -- at91_mci_write(AT91_MCI_ARGR, 0); -- at91_mci_write(AT91_MCI_CMDR, AT91_MCI_OPDCMD); -- while (!(at91_mci_read(AT91_MCI_SR) & AT91_MCI_CMDRDY)) { -+ at91_mci_write(host, AT91_MCI_ARGR, 0); -+ at91_mci_write(host, AT91_MCI_CMDR, AT91_MCI_OPDCMD); -+ while (!(at91_mci_read(host, AT91_MCI_SR) & AT91_MCI_CMDRDY)) { - /* spin */ -- pr_debug("Clearing: SR = %08X\n", at91_mci_read(AT91_MCI_SR)); -+ pr_debug("Clearing: SR = %08X\n", at91_mci_read(host, AT91_MCI_SR)); - } - } - #endif -@@ -431,32 +403,32 @@ - /* - * Set the arguments and send the command - */ -- pr_debug("Sending command %d as %08X, arg = %08X, blocks = %d, length = %d (MR = %08lX)\n", -- cmd->opcode, cmdr, cmd->arg, blocks, block_length, at91_mci_read(AT91_MCI_MR)); -+ pr_debug("Sending command %d as %08X, arg = %08X, blocks = %d, length = %d (MR = %08X)\n", -+ cmd->opcode, cmdr, cmd->arg, blocks, block_length, at91_mci_read(host, AT91_MCI_MR)); - - if (!data) { -- at91_mci_write(AT91_PDC_PTCR, AT91_PDC_TXTDIS | AT91_PDC_RXTDIS); -- at91_mci_write(AT91_PDC_RPR, 0); -- at91_mci_write(AT91_PDC_RCR, 0); -- at91_mci_write(AT91_PDC_RNPR, 0); -- at91_mci_write(AT91_PDC_RNCR, 0); -- at91_mci_write(AT91_PDC_TPR, 0); -- at91_mci_write(AT91_PDC_TCR, 0); -- at91_mci_write(AT91_PDC_TNPR, 0); -- at91_mci_write(AT91_PDC_TNCR, 0); -+ at91_mci_write(host, AT91_PDC_PTCR, AT91_PDC_TXTDIS | AT91_PDC_RXTDIS); -+ at91_mci_write(host, AT91_PDC_RPR, 0); -+ at91_mci_write(host, AT91_PDC_RCR, 0); -+ at91_mci_write(host, AT91_PDC_RNPR, 0); -+ at91_mci_write(host, AT91_PDC_RNCR, 0); -+ at91_mci_write(host, AT91_PDC_TPR, 0); -+ at91_mci_write(host, AT91_PDC_TCR, 0); -+ at91_mci_write(host, AT91_PDC_TNPR, 0); -+ at91_mci_write(host, AT91_PDC_TNCR, 0); - -- at91_mci_write(AT91_MCI_ARGR, cmd->arg); -- at91_mci_write(AT91_MCI_CMDR, cmdr); -+ at91_mci_write(host, AT91_MCI_ARGR, cmd->arg); -+ at91_mci_write(host, AT91_MCI_CMDR, cmdr); - return AT91_MCI_CMDRDY; - } - -- mr = at91_mci_read(AT91_MCI_MR) & 0x7fff; /* zero block length and PDC mode */ -- at91_mci_write(AT91_MCI_MR, mr | (block_length << 16) | AT91_MCI_PDCMODE); -+ mr = at91_mci_read(host, AT91_MCI_MR) & 0x7fff; /* zero block length and PDC mode */ -+ at91_mci_write(host, AT91_MCI_MR, mr | (block_length << 16) | AT91_MCI_PDCMODE); - - /* - * Disable the PDC controller - */ -- at91_mci_write(AT91_PDC_PTCR, AT91_PDC_RXTDIS | AT91_PDC_TXTDIS); -+ at91_mci_write(host, AT91_PDC_PTCR, AT91_PDC_RXTDIS | AT91_PDC_TXTDIS); - - if (cmdr & AT91_MCI_TRCMD_START) { - data->bytes_xfered = 0; -@@ -478,15 +450,15 @@ - */ - host->total_length = block_length * blocks; - host->buffer = dma_alloc_coherent(NULL, -- host->total_length, -- &host->physical_address, GFP_KERNEL); -+ host->total_length, -+ &host->physical_address, GFP_KERNEL); - - at91mci_sg_to_dma(host, data); - - pr_debug("Transmitting %d bytes\n", host->total_length); - -- at91_mci_write(AT91_PDC_TPR, host->physical_address); -- at91_mci_write(AT91_PDC_TCR, host->total_length / 4); -+ at91_mci_write(host, AT91_PDC_TPR, host->physical_address); -+ at91_mci_write(host, AT91_PDC_TCR, host->total_length / 4); - ier = AT91_MCI_TXBUFE; - } - } -@@ -496,14 +468,14 @@ - * the data sheet says - */ - -- at91_mci_write(AT91_MCI_ARGR, cmd->arg); -- at91_mci_write(AT91_MCI_CMDR, cmdr); -+ at91_mci_write(host, AT91_MCI_ARGR, cmd->arg); -+ at91_mci_write(host, AT91_MCI_CMDR, cmdr); - - if (cmdr & AT91_MCI_TRCMD_START) { - if (cmdr & AT91_MCI_TRDIR) -- at91_mci_write(AT91_PDC_PTCR, AT91_PDC_RXTEN); -+ at91_mci_write(host, AT91_PDC_PTCR, AT91_PDC_RXTEN); - else -- at91_mci_write(AT91_PDC_PTCR, AT91_PDC_TXTEN); -+ at91_mci_write(host, AT91_PDC_PTCR, AT91_PDC_TXTEN); - } - return ier; - } -@@ -520,7 +492,7 @@ - pr_debug("setting ier to %08X\n", ier); - - /* Stop on errors or the required value */ -- at91_mci_write(AT91_MCI_IER, 0xffff0000 | ier); -+ at91_mci_write(host, AT91_MCI_IER, AT91_MCI_ERRORS | ier); - } - - /* -@@ -548,26 +520,24 @@ - struct mmc_command *cmd = host->cmd; - unsigned int status; - -- at91_mci_write(AT91_MCI_IDR, 0xffffffff); -+ at91_mci_write(host, AT91_MCI_IDR, 0xffffffff); - -- cmd->resp[0] = at91_mci_read(AT91_MCI_RSPR(0)); -- cmd->resp[1] = at91_mci_read(AT91_MCI_RSPR(1)); -- cmd->resp[2] = at91_mci_read(AT91_MCI_RSPR(2)); -- cmd->resp[3] = at91_mci_read(AT91_MCI_RSPR(3)); -+ cmd->resp[0] = at91_mci_read(host, AT91_MCI_RSPR(0)); -+ cmd->resp[1] = at91_mci_read(host, AT91_MCI_RSPR(1)); -+ cmd->resp[2] = at91_mci_read(host, AT91_MCI_RSPR(2)); -+ cmd->resp[3] = at91_mci_read(host, AT91_MCI_RSPR(3)); - - if (host->buffer) { - dma_free_coherent(NULL, host->total_length, host->buffer, host->physical_address); - host->buffer = NULL; - } - -- status = at91_mci_read(AT91_MCI_SR); -+ status = at91_mci_read(host, AT91_MCI_SR); - +diff -urN -x CVS linux-2.6.21/drivers/mmc/at91_mci.c linux-2.6-stable/drivers/mmc/at91_mci.c +--- linux-2.6.21/drivers/mmc/at91_mci.c Thu Apr 26 05:08:32 2007 ++++ linux-2.6-stable/drivers/mmc/at91_mci.c Fri May 11 17:13:13 2007 +@@ -86,7 +86,7 @@ + + #define AT91_MCI_ERRORS (AT91_MCI_RINDE | AT91_MCI_RDIRE | AT91_MCI_RCRCE \ + | AT91_MCI_RENDE | AT91_MCI_RTOE | AT91_MCI_DCRCE \ +- | AT91_MCI_DTOE | AT91_MCI_OVRE | AT91_MCI_UNRE) ++ | AT91_MCI_DTOE | AT91_MCI_OVRE | AT91_MCI_UNRE) + + #define at91_mci_read(host, reg) __raw_readl((host)->baseaddr + (reg)) + #define at91_mci_write(host, reg, val) __raw_writel((val), (host)->baseaddr + (reg)) +@@ -561,9 +561,7 @@ pr_debug("Status = %08X [%08X %08X %08X %08X]\n", status, cmd->resp[0], cmd->resp[1], cmd->resp[2], cmd->resp[3]); @@ -10195,373 +5425,81 @@ diff -urN -x CVS linux-2.6.19-final/drivers/mmc/at91_mci.c linux-2.6.19/drivers/ if ((status & AT91_MCI_RCRCE) && ((cmd->opcode == MMC_SEND_OP_COND) || (cmd->opcode == SD_APP_OP_COND))) { cmd->error = MMC_ERR_NONE; -@@ -605,24 +575,50 @@ - } +@@ -665,15 +663,15 @@ - /* -+ * Handle transmitted data -+ */ -+static void at91_mci_handle_transmitted(struct at91mci_host *host) -+{ -+ struct mmc_command *cmd; -+ struct mmc_data *data; -+ -+ pr_debug("Handling the transmit\n"); + int_status = at91_mci_read(host, AT91_MCI_SR); + int_mask = at91_mci_read(host, AT91_MCI_IMR); +- + -+ /* Disable the transfer */ -+ at91_mci_write(host, AT91_PDC_PTCR, AT91_PDC_RXTDIS | AT91_PDC_TXTDIS); -+ -+ /* Now wait for cmd ready */ -+ at91_mci_write(host, AT91_MCI_IDR, AT91_MCI_TXBUFE); -+ at91_mci_write(host, AT91_MCI_IER, AT91_MCI_NOTBUSY); -+ -+ cmd = host->cmd; -+ if (!cmd) return; -+ -+ data = cmd->data; -+ if (!data) return; -+ -+ data->bytes_xfered = host->total_length; -+} + pr_debug("MCI irq: status = %08X, %08X, %08X\n", int_status, int_mask, + int_status & int_mask); +- + -+/* - * Set the IOS - */ - static void at91_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) - { - int clkdiv; - struct at91mci_host *host = mmc_priv(mmc); -- unsigned long at91_master_clock = clk_get_rate(mci_clk); -+ unsigned long at91_master_clock = clk_get_rate(host->mci_clk); - - host->bus_mode = ios->bus_mode; - - if (ios->clock == 0) { - /* Disable the MCI controller */ -- at91_mci_write(AT91_MCI_CR, AT91_MCI_MCIDIS); -+ at91_mci_write(host, AT91_MCI_CR, AT91_MCI_MCIDIS); - clkdiv = 0; - } - else { - /* Enable the MCI controller */ -- at91_mci_write(AT91_MCI_CR, AT91_MCI_MCIEN); -+ at91_mci_write(host, AT91_MCI_CR, AT91_MCI_MCIEN); - - if ((at91_master_clock % (ios->clock * 2)) == 0) - clkdiv = ((at91_master_clock / ios->clock) / 2) - 1; -@@ -634,25 +630,25 @@ - } - if (ios->bus_width == MMC_BUS_WIDTH_4 && host->board->wire4) { - pr_debug("MMC: Setting controller bus width to 4\n"); -- at91_mci_write(AT91_MCI_SDCR, at91_mci_read(AT91_MCI_SDCR) | AT91_MCI_SDCBUS); -+ at91_mci_write(host, AT91_MCI_SDCR, at91_mci_read(host, AT91_MCI_SDCR) | AT91_MCI_SDCBUS); - } - else { - pr_debug("MMC: Setting controller bus width to 1\n"); -- at91_mci_write(AT91_MCI_SDCR, at91_mci_read(AT91_MCI_SDCR) & ~AT91_MCI_SDCBUS); -+ at91_mci_write(host, AT91_MCI_SDCR, at91_mci_read(host, AT91_MCI_SDCR) & ~AT91_MCI_SDCBUS); - } - - /* Set the clock divider */ -- at91_mci_write(AT91_MCI_MR, (at91_mci_read(AT91_MCI_MR) & ~AT91_MCI_CLKDIV) | clkdiv); -+ at91_mci_write(host, AT91_MCI_MR, (at91_mci_read(host, AT91_MCI_MR) & ~AT91_MCI_CLKDIV) | clkdiv); - - /* maybe switch power to the card */ - if (host->board->vcc_pin) { - switch (ios->power_mode) { - case MMC_POWER_OFF: -- at91_set_gpio_output(host->board->vcc_pin, 0); -+ at91_set_gpio_value(host->board->vcc_pin, 0); - break; - case MMC_POWER_UP: - case MMC_POWER_ON: -- at91_set_gpio_output(host->board->vcc_pin, 1); -+ at91_set_gpio_value(host->board->vcc_pin, 1); - break; - } - } -@@ -665,39 +661,40 @@ - { - struct at91mci_host *host = devid; - int completed = 0; -+ unsigned int int_status, int_mask; - -- unsigned int int_status; -+ int_status = at91_mci_read(host, AT91_MCI_SR); -+ int_mask = at91_mci_read(host, AT91_MCI_IMR); + int_status = int_status & int_mask; -- int_status = at91_mci_read(AT91_MCI_SR); -- pr_debug("MCI irq: status = %08X, %08lX, %08lX\n", int_status, at91_mci_read(AT91_MCI_IMR), -- int_status & at91_mci_read(AT91_MCI_IMR)); -- -- if ((int_status & at91_mci_read(AT91_MCI_IMR)) & 0xffff0000) -- completed = 1; -+ pr_debug("MCI irq: status = %08X, %08X, %08X\n", int_status, int_mask, -+ int_status & int_mask); - -- int_status &= at91_mci_read(AT91_MCI_IMR); -+ int_status = int_status & int_mask; - -- if (int_status & AT91_MCI_UNRE) -- pr_debug("MMC: Underrun error\n"); -- if (int_status & AT91_MCI_OVRE) -- pr_debug("MMC: Overrun error\n"); -- if (int_status & AT91_MCI_DTOE) -- pr_debug("MMC: Data timeout\n"); -- if (int_status & AT91_MCI_DCRCE) -- pr_debug("MMC: CRC error in data\n"); -- if (int_status & AT91_MCI_RTOE) -- pr_debug("MMC: Response timeout\n"); -- if (int_status & AT91_MCI_RENDE) -- pr_debug("MMC: Response end bit error\n"); -- if (int_status & AT91_MCI_RCRCE) -- pr_debug("MMC: Response CRC error\n"); -- if (int_status & AT91_MCI_RDIRE) -- pr_debug("MMC: Response direction error\n"); -- if (int_status & AT91_MCI_RINDE) -- pr_debug("MMC: Response index error\n"); -+ if (int_status & AT91_MCI_ERRORS) { -+ completed = 1; -+ -+ if (int_status & AT91_MCI_UNRE) -+ pr_debug("MMC: Underrun error\n"); -+ if (int_status & AT91_MCI_OVRE) -+ pr_debug("MMC: Overrun error\n"); -+ if (int_status & AT91_MCI_DTOE) -+ pr_debug("MMC: Data timeout\n"); -+ if (int_status & AT91_MCI_DCRCE) -+ pr_debug("MMC: CRC error in data\n"); -+ if (int_status & AT91_MCI_RTOE) -+ pr_debug("MMC: Response timeout\n"); -+ if (int_status & AT91_MCI_RENDE) -+ pr_debug("MMC: Response end bit error\n"); -+ if (int_status & AT91_MCI_RCRCE) -+ pr_debug("MMC: Response CRC error\n"); -+ if (int_status & AT91_MCI_RDIRE) -+ pr_debug("MMC: Response direction error\n"); -+ if (int_status & AT91_MCI_RINDE) -+ pr_debug("MMC: Response index error\n"); -+ } else { -+ /* Only continue processing if no errors */ - -- /* Only continue processing if no errors */ -- if (!completed) { - if (int_status & AT91_MCI_TXBUFE) { - pr_debug("TX buffer empty\n"); - at91_mci_handle_transmitted(host); -@@ -705,12 +702,11 @@ - - if (int_status & AT91_MCI_RXBUFF) { - pr_debug("RX buffer full\n"); -- at91_mci_write(AT91_MCI_IER, AT91_MCI_CMDRDY); -+ at91_mci_write(host, AT91_MCI_IER, AT91_MCI_CMDRDY); - } - -- if (int_status & AT91_MCI_ENDTX) { -+ if (int_status & AT91_MCI_ENDTX) - pr_debug("Transmit has ended\n"); -- } - - if (int_status & AT91_MCI_ENDRX) { - pr_debug("Receive has ended\n"); -@@ -719,37 +715,33 @@ - - if (int_status & AT91_MCI_NOTBUSY) { - pr_debug("Card is ready\n"); -- at91_mci_write(AT91_MCI_IER, AT91_MCI_CMDRDY); -+ at91_mci_write(host, AT91_MCI_IER, AT91_MCI_CMDRDY); - } - -- if (int_status & AT91_MCI_DTIP) { -+ if (int_status & AT91_MCI_DTIP) - pr_debug("Data transfer in progress\n"); -- } - -- if (int_status & AT91_MCI_BLKE) { -+ if (int_status & AT91_MCI_BLKE) - pr_debug("Block transfer has ended\n"); -- } - -- if (int_status & AT91_MCI_TXRDY) { -+ if (int_status & AT91_MCI_TXRDY) - pr_debug("Ready to transmit\n"); -- } - -- if (int_status & AT91_MCI_RXRDY) { -+ if (int_status & AT91_MCI_RXRDY) - pr_debug("Ready to receive\n"); -- } - - if (int_status & AT91_MCI_CMDRDY) { - pr_debug("Command ready\n"); - completed = 1; - } - } -- at91_mci_write(AT91_MCI_IDR, int_status); - - if (completed) { - pr_debug("Completed command\n"); -- at91_mci_write(AT91_MCI_IDR, 0xffffffff); -+ at91_mci_write(host, AT91_MCI_IDR, 0xffffffff); - at91mci_completed_command(host); -- } -+ } else -+ at91_mci_write(host, AT91_MCI_IDR, int_status); - - return IRQ_HANDLED; - } -@@ -769,7 +761,7 @@ - present ? "insert" : "remove"); - if (!present) { - pr_debug("****** Resetting SD-card bus width ******\n"); -- at91_mci_write(AT91_MCI_SDCR, 0); -+ at91_mci_write(host, AT91_MCI_SDCR, at91_mci_read(host, AT91_MCI_SDCR) & ~AT91_MCI_SDCBUS); - } - mmc_detect_change(host->mmc, msecs_to_jiffies(100)); - } -@@ -806,15 +798,22 @@ - { - struct mmc_host *mmc; - struct at91mci_host *host; -+ struct resource *res; - int ret; - - pr_debug("Probe MCI devices\n"); -- at91_mci_disable(); -- at91_mci_enable(); -+ -+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ if (!res) -+ return -ENXIO; + if (int_status & AT91_MCI_ERRORS) { + completed = 1; +- + -+ if (!request_mem_region(res->start, res->end - res->start + 1, DRIVER_NAME)) -+ return -EBUSY; - - mmc = mmc_alloc_host(sizeof(struct at91mci_host), &pdev->dev); - if (!mmc) { - pr_debug("Failed to allocate mmc host\n"); -+ release_mem_region(res->start, res->end - res->start + 1); - return -ENOMEM; - } - -@@ -822,7 +821,7 @@ + if (int_status & AT91_MCI_UNRE) + pr_debug("MMC: Underrun error\n"); + if (int_status & AT91_MCI_OVRE) +@@ -821,7 +819,7 @@ mmc->f_min = 375000; mmc->f_max = 25000000; mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34; - mmc->caps = MMC_CAP_BYTEBLOCK; + mmc->caps = MMC_CAP_BYTEBLOCK | MMC_CAP_MULTIWRITE; - host = mmc_priv(mmc); - host->mmc = mmc; -@@ -833,29 +832,50 @@ - #ifdef SUPPORT_4WIRE - mmc->caps |= MMC_CAP_4_BIT_DATA; - #else -- printk("MMC: 4 wire bus mode not supported by this driver - using 1 wire\n"); -+ printk("AT91 MMC: 4 wire bus mode not supported by this driver - using 1 wire\n"); - #endif - } + mmc->max_blk_size = 4095; + mmc->max_blk_count = mmc->max_req_size; +@@ -895,6 +893,8 @@ - /* - * Get Clock - */ -- mci_clk = clk_get(&pdev->dev, "mci_clk"); -- if (IS_ERR(mci_clk)) { -+ host->mci_clk = clk_get(&pdev->dev, "mci_clk"); -+ if (IS_ERR(host->mci_clk)) { - printk(KERN_ERR "AT91 MMC: no clock defined.\n"); - mmc_free_host(mmc); -+ release_mem_region(res->start, res->end - res->start + 1); - return -ENODEV; - } -- clk_enable(mci_clk); /* Enable the peripheral clock */ -+ -+ /* -+ * Map I/O region -+ */ -+ host->baseaddr = ioremap(res->start, res->end - res->start + 1); -+ if (!host->baseaddr) { -+ clk_put(host->mci_clk); -+ release_mem_region(res->start, res->end - res->start + 1); -+ mmc_free_host(mmc); -+ return -ENOMEM; -+ } -+ -+ /* -+ * Reset hardware -+ */ -+ clk_enable(host->mci_clk); /* Enable the peripheral clock */ -+ at91_mci_disable(host); -+ at91_mci_enable(host); + mmc_add_host(mmc); ++ device_init_wakeup(&pdev->dev, 1); ++ /* - * Allocate the MCI interrupt + * monitor card insertion/removal if we can */ -- ret = request_irq(AT91RM9200_ID_MCI, at91_mci_irq, IRQF_SHARED, DRIVER_NAME, host); -+ host->irq = platform_get_irq(pdev, 0); -+ ret = request_irq(host->irq, at91_mci_irq, IRQF_SHARED, DRIVER_NAME, host); - if (ret) { -- printk(KERN_ERR "Failed to request MCI interrupt\n"); -- clk_disable(mci_clk); -- clk_put(mci_clk); -+ printk(KERN_ERR "AT91 MMC: Failed to request MCI interrupt\n"); -+ clk_disable(host->mci_clk); -+ clk_put(host->mci_clk); -+ iounmap(host->baseaddr); -+ release_mem_region(res->start, res->end - res->start + 1); - mmc_free_host(mmc); - return ret; - } -@@ -879,10 +899,10 @@ - ret = request_irq(host->board->det_pin, at91_mmc_det_irq, - 0, DRIVER_NAME, host); - if (ret) -- printk(KERN_ERR "couldn't allocate MMC detect irq\n"); -+ printk(KERN_ERR "AT91 MMC: Couldn't allocate MMC detect irq\n"); - } +@@ -924,6 +924,8 @@ -- pr_debug(KERN_INFO "Added MCI driver\n"); -+ pr_debug("Added MCI driver\n"); + host = mmc_priv(mmc); - return 0; - } -@@ -894,6 +914,7 @@ ++ device_init_wakeup(&pdev->dev, 0); ++ + if (host->present != -1) { + free_irq(host->board->det_pin, host); + cancel_delayed_work(&host->mmc->detect); +@@ -951,8 +953,12 @@ + static int at91_mci_suspend(struct platform_device *pdev, pm_message_t state) { struct mmc_host *mmc = platform_get_drvdata(pdev); - struct at91mci_host *host; -+ struct resource *res; - - if (!mmc) - return -1; -@@ -905,16 +926,19 @@ - cancel_delayed_work(&host->mmc->detect); - } - -+ at91_mci_disable(host); - mmc_remove_host(mmc); -- at91_mci_disable(); -- free_irq(AT91RM9200_ID_MCI, host); -- mmc_free_host(mmc); -+ free_irq(host->irq, host); ++ struct at91mci_host *host = mmc_priv(mmc); + int ret = 0; -- clk_disable(mci_clk); /* Disable the peripheral clock */ -- clk_put(mci_clk); -+ iounmap(host->baseaddr); -+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ release_mem_region(res->start, res->end - res->start + 1); ++ if (device_may_wakeup(&pdev->dev)) ++ enable_irq_wake(host->board->det_pin); ++ + if (mmc) + ret = mmc_suspend_host(mmc, state); -- platform_set_drvdata(pdev, NULL); -+ clk_disable(host->mci_clk); /* Disable the peripheral clock */ -+ clk_put(host->mci_clk); +@@ -962,8 +968,12 @@ + static int at91_mci_resume(struct platform_device *pdev) + { + struct mmc_host *mmc = platform_get_drvdata(pdev); ++ struct at91mci_host *host = mmc_priv(mmc); + int ret = 0; -+ mmc_free_host(mmc); -+ platform_set_drvdata(pdev, NULL); - pr_debug("MCI Removed\n"); ++ if (device_may_wakeup(&pdev->dev)) ++ disable_irq_wake(host->board->det_pin); ++ + if (mmc) + ret = mmc_resume_host(mmc); - return 0; -diff -urN -x CVS linux-2.6.19-final/drivers/mtd/devices/Kconfig linux-2.6.19/drivers/mtd/devices/Kconfig ---- linux-2.6.19-final/drivers/mtd/devices/Kconfig Mon Dec 4 16:40:13 2006 -+++ linux-2.6.19/drivers/mtd/devices/Kconfig Wed Nov 22 09:22:03 2006 +diff -urN -x CVS linux-2.6.21/drivers/mtd/devices/Kconfig linux-2.6-stable/drivers/mtd/devices/Kconfig +--- linux-2.6.21/drivers/mtd/devices/Kconfig Thu Apr 26 05:08:32 2007 ++++ linux-2.6-stable/drivers/mtd/devices/Kconfig Tue May 8 14:31:24 2007 @@ -267,5 +267,11 @@ LinuxBIOS or if you need to recover a DiskOnChip Millennium on which you have managed to wipe the first block. @@ -10575,18 +5513,18 @@ diff -urN -x CVS linux-2.6.19-final/drivers/mtd/devices/Kconfig linux-2.6.19/dri + If you have such a board, say 'Y'. +endmenu -diff -urN -x CVS linux-2.6.19-final/drivers/mtd/devices/Makefile linux-2.6.19/drivers/mtd/devices/Makefile ---- linux-2.6.19-final/drivers/mtd/devices/Makefile Mon Dec 4 16:33:42 2006 -+++ linux-2.6.19/drivers/mtd/devices/Makefile Thu Oct 12 17:07:39 2006 +diff -urN -x CVS linux-2.6.21/drivers/mtd/devices/Makefile linux-2.6-stable/drivers/mtd/devices/Makefile +--- linux-2.6.21/drivers/mtd/devices/Makefile Thu Apr 26 05:08:32 2007 ++++ linux-2.6-stable/drivers/mtd/devices/Makefile Tue May 8 14:31:24 2007 @@ -17,3 +17,4 @@ obj-$(CONFIG_MTD_BLOCK2MTD) += block2mtd.o obj-$(CONFIG_MTD_DATAFLASH) += mtd_dataflash.o obj-$(CONFIG_MTD_M25P80) += m25p80.o +obj-$(CONFIG_MTD_AT91_DATAFLASH)+= at91_dataflash.o -diff -urN -x CVS linux-2.6.19-final/drivers/mtd/devices/at91_dataflash.c linux-2.6.19/drivers/mtd/devices/at91_dataflash.c ---- linux-2.6.19-final/drivers/mtd/devices/at91_dataflash.c Thu Jan 1 02:00:00 1970 -+++ linux-2.6.19/drivers/mtd/devices/at91_dataflash.c Mon Dec 4 16:12:44 2006 -@@ -0,0 +1,640 @@ +diff -urN -x CVS linux-2.6.21/drivers/mtd/devices/at91_dataflash.c linux-2.6-stable/drivers/mtd/devices/at91_dataflash.c +--- linux-2.6.21/drivers/mtd/devices/at91_dataflash.c Thu Jan 1 02:00:00 1970 ++++ linux-2.6-stable/drivers/mtd/devices/at91_dataflash.c Tue May 8 14:31:24 2007 +@@ -0,0 +1,667 @@ +/* + * Atmel DataFlash driver for Atmel AT91RM9200 (Thunder) + * @@ -10698,12 +5636,12 @@ diff -urN -x CVS linux-2.6.19-final/drivers/mtd/devices/at91_dataflash.c linux-2 + { + name: "uboot", + offset: MTDPART_OFS_APPEND, /* Sperry, NXTBLK is broken */ -+ size: 128 * 1056, /* 1 MB */ ++ size: 128 * 1056, /* 1 MB */ + }, + { + name: "kernel", + offset: MTDPART_OFS_APPEND, /* Sperry, NXTBLK is broken */ -+ size: 1024 * 1056, /* 1 MB */ ++ size: 1024 * 1056, /* 1 MB */ + }, + { + name: "filesystem", @@ -10712,6 +5650,33 @@ diff -urN -x CVS linux-2.6.19-final/drivers/mtd/devices/at91_dataflash.c linux-2 + } +}; + ++#elif defined(CONFIG_MACH_MULTMDP) ++ ++static struct mtd_partition static_partitions_8M[] = ++{ ++ { ++ .name = "bootloader", ++ .offset = 0, ++ .size = 12 * 1056, /* 1st sector = 32 blocks * 8 pages * 1056 bytes */ ++ .mask_flags = MTD_WRITEABLE, /* read-only */ ++ }, ++ { ++ .name = "configuration", ++ .offset = MTDPART_OFS_NXTBLK, ++ .size = 20 * 1056, ++ }, ++ { ++ .name = "kernel", ++ .offset = MTDPART_OFS_NXTBLK, ++ .size = 1520 * 1056, ++ }, ++ { ++ .name = "filesystem", ++ .offset = MTDPART_OFS_NXTBLK, ++ .size = MTDPART_SIZ_FULL, ++ } ++}; ++ +#else + +static struct mtd_partition static_partitions_8M[] = @@ -10759,7 +5724,7 @@ diff -urN -x CVS linux-2.6.19-final/drivers/mtd/devices/at91_dataflash.c linux-2 + list->tx[0] = tx; list->txlen[0] = tx_len; + list->rx[0] = rx; list->rxlen[0] = rx_len; + -+ list->tx[1] = txnext; list->txlen[1] = txnext_len; ++ list->tx[1] = txnext; list->txlen[1] = txnext_len; + list->rx[1] = rxnext; list->rxlen[1] = rxnext_len; + + list->nr_transfers = nr; @@ -11227,553 +6192,109 @@ diff -urN -x CVS linux-2.6.19-final/drivers/mtd/devices/at91_dataflash.c linux-2 +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Andrew Victor"); +MODULE_DESCRIPTION("DataFlash driver for Atmel AT91RM9200"); -diff -urN -x CVS linux-2.6.19-final/drivers/mtd/devices/mtd_dataflash.c linux-2.6.19/drivers/mtd/devices/mtd_dataflash.c ---- linux-2.6.19-final/drivers/mtd/devices/mtd_dataflash.c Mon Dec 4 16:33:42 2006 -+++ linux-2.6.19/drivers/mtd/devices/mtd_dataflash.c Mon Dec 4 16:12:32 2006 -@@ -480,7 +480,7 @@ - device->writesize = pagesize; - device->owner = THIS_MODULE; - device->type = MTD_DATAFLASH; -- device->flags = MTD_CAP_NORFLASH; -+ device->flags = MTD_WRITEABLE; - device->erase = dataflash_erase; - device->read = dataflash_read; - device->write = dataflash_write; -diff -urN -x CVS linux-2.6.19-final/drivers/mtd/maps/Kconfig linux-2.6.19/drivers/mtd/maps/Kconfig ---- linux-2.6.19-final/drivers/mtd/maps/Kconfig Mon Dec 4 16:40:13 2006 -+++ linux-2.6.19/drivers/mtd/maps/Kconfig Mon Nov 20 10:49:27 2006 -@@ -622,5 +622,25 @@ - - This selection automatically selects the map_ram driver. - -+config MTD_CSB337 -+ bool "Flash mapped on Cogent CSB337" -+ depends on MTD && MACH_CSB337 -+ help -+ This enables access to the flash chip on the Cogent CSB337 -+ single board computer. The default behavior of the startup -+ script the comes with BSPs for that board is to pass the address -+ of a file romfs.img, which is assumed to be a romfs filesystem image -+ to be used as the initial root filesystem. -+ -+config MTD_CSB637 -+ bool "Flash mapped on Cogent CSB637" -+ depends on MTD && MACH_CSB637 -+ help -+ This enables access to the flash chip on the Cogent CSB637 -+ single board computer. The default behavior of the startup -+ script the comes with BSPs for that board is to pass the address -+ of a file romfs.img, which is assumed to be a romfs filesystem image -+ to be used as the initial root filesystem. -+ - endmenu +diff -urN -x CVS linux-2.6.21/drivers/mtd/nand/at91_nand.c linux-2.6-stable/drivers/mtd/nand/at91_nand.c +--- linux-2.6.21/drivers/mtd/nand/at91_nand.c Thu Apr 26 05:08:32 2007 ++++ linux-2.6-stable/drivers/mtd/nand/at91_nand.c Tue May 8 12:13:31 2007 +@@ -82,6 +82,10 @@ + at91_set_gpio_value(host->board->enable_pin, 1); + } -diff -urN -x CVS linux-2.6.19-final/drivers/mtd/maps/Makefile linux-2.6.19/drivers/mtd/maps/Makefile ---- linux-2.6.19-final/drivers/mtd/maps/Makefile Mon Dec 4 16:40:13 2006 -+++ linux-2.6.19/drivers/mtd/maps/Makefile Mon Nov 20 10:49:37 2006 -@@ -70,3 +70,5 @@ - obj-$(CONFIG_MTD_OMAP_NOR) += omap_nor.o - obj-$(CONFIG_MTD_MTX1) += mtx-1_flash.o - obj-$(CONFIG_MTD_TQM834x) += tqm834x.o -+obj-$(CONFIG_MTD_CSB337) += csbxxx.o -+obj-$(CONFIG_MTD_CSB637) += csbxxx.o -diff -urN -x CVS linux-2.6.19-final/drivers/mtd/maps/csbxxx.c linux-2.6.19/drivers/mtd/maps/csbxxx.c ---- linux-2.6.19-final/drivers/mtd/maps/csbxxx.c Thu Jan 1 02:00:00 1970 -+++ linux-2.6.19/drivers/mtd/maps/csbxxx.c Tue Oct 24 08:53:30 2006 -@@ -0,0 +1,143 @@ -+/* -+ * Map driver for the Cogent CSBxxx boards. -+ * -+ * Author: Bill Gatliff -+ * Copyright: (C) 2005 Bill Gatliff <bgat@billgatliff.com> -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+#include <linux/module.h> -+#include <linux/types.h> -+#include <linux/kernel.h> -+#include <linux/init.h> -+#include <linux/dma-mapping.h> -+#include <linux/mtd/mtd.h> -+#include <linux/mtd/map.h> -+#include <linux/mtd/partitions.h> -+#include <asm/io.h> -+#include <asm/hardware.h> -+ -+#define MTDID "flash00" -+#define MSG_PREFIX "csbxxx: " -+ -+#if defined(CONFIG_MACH_CSB337) || defined(CONFIG_MACH_CSB637) -+#define WINDOW_ADDR 0x10000000 -+#define WINDOW_SIZE 0x1000000 -+#else -+#error TODO: the MTD map you need goes here... -+#endif -+ -+/* -+ * default map definition -+ * (generally overridden on the command line) -+ */ -+static struct mtd_partition csbxxx_partitions[] = { -+ { -+ .name = "uMON flash", -+ .size = WINDOW_SIZE, -+ .mask_flags = MTD_WRITEABLE /* force read-only */ -+ }, -+}; -+ -+static void csbxxx_map_inval_cache(struct map_info *map, unsigned long from, ssize_t len) -+{ -+ consistent_sync((char *)map->cached + from, len, DMA_FROM_DEVICE); -+} -+static struct map_info csbxxx_map = { -+ .size = WINDOW_SIZE, -+ .phys = WINDOW_ADDR, -+ .inval_cache = csbxxx_map_inval_cache, -+ .bankwidth = 2, -+ .name = MTDID, -+}; -+ -+static const char *probes[] = { "cmdlinepart", NULL }; -+ -+static struct mtd_info *mymtd = 0; -+static int mtd_parts_nb = 0; -+static struct mtd_partition *mtd_parts = 0; -+ -+static int __init init_csbxxx(void) -+{ -+ int ret = 0; -+ const char *part_type = 0; -+ -+ csbxxx_map.virt = ioremap(csbxxx_map.phys, WINDOW_SIZE); -+ if (!csbxxx_map.virt) { -+ printk(KERN_WARNING "Failed to ioremap %s, MTD disabled\n", csbxxx_map.name); -+ ret = -ENOMEM; -+ goto err; -+ } -+ csbxxx_map.cached = ioremap_cached(csbxxx_map.phys, WINDOW_SIZE); -+ if (!csbxxx_map.cached) -+ printk(KERN_WARNING "Failed to ioremap cached %s\n", csbxxx_map.name); -+ -+ simple_map_init(&csbxxx_map); -+ -+ printk(KERN_NOTICE "Probing %s at physical address 0x%08lx (%d-bit bankwidth)\n", -+ csbxxx_map.name, csbxxx_map.phys, csbxxx_map.bankwidth * 8); -+ -+ mymtd = do_map_probe("cfi_probe", &csbxxx_map); -+ if (!mymtd) -+ goto err; -+ -+ mymtd->owner = THIS_MODULE; -+ -+ mtd_parts_nb = parse_mtd_partitions(mymtd, probes, &mtd_parts, 0); -+ +#ifdef CONFIG_MTD_PARTITIONS -+ if (mtd_parts_nb > 0) -+ part_type = "command line"; -+ else if (mtd_parts_nb == 0) { -+ mtd_parts = csbxxx_partitions; -+ mtd_parts_nb = ARRAY_SIZE(csbxxx_partitions); -+ part_type = "static"; -+ } -+ else -+ goto err; ++const char *part_probes[] = { "cmdlinepart", NULL }; ++#endif + -+ if (mtd_parts_nb == 0) -+ printk(KERN_NOTICE MSG_PREFIX "no partition info available\n"); + /* + * Probe for the NAND device. + */ +@@ -151,6 +155,12 @@ + #ifdef CONFIG_MTD_PARTITIONS + if (host->board->partition_info) + partitions = host->board->partition_info(mtd->size, &num_partitions); ++#ifdef CONFIG_MTD_CMDLINE_PARTS + else { -+ printk(KERN_NOTICE MSG_PREFIX "using %s partition definition\n", part_type); -+ add_mtd_partitions(mymtd, mtd_parts, mtd_parts_nb); ++ mtd->name = "at91_nand"; ++ num_partitions = parse_mtd_partitions(mtd, part_probes, &partitions, 0); + } -+#else -+ add_mtd_device(mymtd); +#endif -+ -+ return 0; -+ -+err: -+ if (csbxxx_map.virt) -+ iounmap(csbxxx_map.virt); -+ if (csbxxx_map.cached) -+ iounmap(csbxxx_map.cached); -+ if (!ret) -+ ret = -EIO; -+ -+ return ret; -+} -+ -+static void __exit cleanup_csbxxx(void) -+{ -+ if (!mymtd) -+ return; -+ -+ del_mtd_partitions(mymtd); -+ -+ map_destroy(mymtd); -+ iounmap((void *)csbxxx_map.virt); -+ if (csbxxx_map.cached) -+ iounmap(csbxxx_map.cached); -+} -+ -+module_init(init_csbxxx); -+module_exit(cleanup_csbxxx); -+ -+MODULE_LICENSE("GPL"); -+MODULE_AUTHOR("Bill Gatliff <bgat@billgatliff.com>"); -+MODULE_DESCRIPTION("MTD map driver for Cogent CSBXXX"); -diff -urN -x CVS linux-2.6.19-final/drivers/mtd/nand/Kconfig linux-2.6.19/drivers/mtd/nand/Kconfig ---- linux-2.6.19-final/drivers/mtd/nand/Kconfig Mon Dec 4 16:40:13 2006 -+++ linux-2.6.19/drivers/mtd/nand/Kconfig Thu Oct 12 17:07:39 2006 -@@ -232,6 +232,13 @@ - If you say "m", the module will be called "cs553x_nand.ko". - -+config MTD_NAND_AT91 -+ bool "Support for NAND Flash / SmartMedia on AT91" -+ depends on MTD_NAND && ARCH_AT91 -+ help -+ Enables support for NAND Flash / Smart Media Card interface -+ on Atmel AT91 processors. -+ - config MTD_NAND_NANDSIM - tristate "Support for NAND Flash Simulator" - depends on MTD_NAND && MTD_PARTITIONS -diff -urN -x CVS linux-2.6.19-final/drivers/mtd/nand/Makefile linux-2.6.19/drivers/mtd/nand/Makefile ---- linux-2.6.19-final/drivers/mtd/nand/Makefile Mon Dec 4 16:33:43 2006 -+++ linux-2.6.19/drivers/mtd/nand/Makefile Thu Oct 12 17:07:39 2006 -@@ -22,5 +22,6 @@ - obj-$(CONFIG_MTD_NAND_NANDSIM) += nandsim.o - obj-$(CONFIG_MTD_NAND_CS553X) += cs553x_nand.o - obj-$(CONFIG_MTD_NAND_NDFC) += ndfc.o -+obj-$(CONFIG_MTD_NAND_AT91) += at91_nand.o - - nand-objs = nand_base.o nand_bbt.o -diff -urN -x CVS linux-2.6.19-final/drivers/mtd/nand/at91_nand.c linux-2.6.19/drivers/mtd/nand/at91_nand.c ---- linux-2.6.19-final/drivers/mtd/nand/at91_nand.c Thu Jan 1 02:00:00 1970 -+++ linux-2.6.19/drivers/mtd/nand/at91_nand.c Wed Nov 15 08:12:22 2006 -@@ -0,0 +1,223 @@ -+/* -+ * drivers/mtd/nand/at91_nand.c -+ * -+ * Copyright (C) 2003 Rick Bronson -+ * -+ * Derived from drivers/mtd/nand/autcpu12.c -+ * Copyright (c) 2001 Thomas Gleixner (gleixner@autronix.de) -+ * -+ * Derived from drivers/mtd/spia.c -+ * Copyright (C) 2000 Steven J. Hill (sjhill@cotw.com) -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ * -+ */ -+ -+#include <linux/slab.h> -+#include <linux/module.h> -+#include <linux/platform_device.h> -+#include <linux/mtd/mtd.h> -+#include <linux/mtd/nand.h> -+#include <linux/mtd/partitions.h> -+ -+#include <asm/io.h> -+#include <asm/sizes.h> -+ -+#include <asm/hardware.h> -+#include <asm/arch/board.h> -+#include <asm/arch/gpio.h> -+ -+struct at91_nand_host { -+ struct nand_chip nand_chip; -+ struct mtd_info mtd; -+ void __iomem *io_base; -+ struct at91_nand_data *board; -+}; -+ -+/* -+ * Hardware specific access to control-lines -+ */ -+static void at91_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl) -+{ -+ struct nand_chip *nand_chip = mtd->priv; -+ struct at91_nand_host *host = nand_chip->priv; -+ -+ if (cmd == NAND_CMD_NONE) -+ return; -+ -+ if (ctrl & NAND_CLE) -+ writeb(cmd, host->io_base + (1 << host->board->cle)); -+ else -+ writeb(cmd, host->io_base + (1 << host->board->ale)); -+} -+ -+/* -+ * Read the Device Ready pin. -+ */ -+static int at91_nand_device_ready(struct mtd_info *mtd) -+{ -+ struct nand_chip *nand_chip = mtd->priv; -+ struct at91_nand_host *host = nand_chip->priv; -+ -+ return at91_get_gpio_value(host->board->rdy_pin); -+} -+ -+/* -+ * Enable NAND. -+ */ -+static void at91_nand_enable(struct at91_nand_host *host) -+{ -+ if (host->board->enable_pin) -+ at91_set_gpio_value(host->board->enable_pin, 0); -+} -+ -+/* -+ * Disable NAND. -+ */ -+static void at91_nand_disable(struct at91_nand_host *host) -+{ -+ if (host->board->enable_pin) -+ at91_set_gpio_value(host->board->enable_pin, 1); -+} -+ -+/* -+ * Probe for the NAND device. -+ */ -+static int __init at91_nand_probe(struct platform_device *pdev) -+{ -+ struct at91_nand_host *host; -+ struct mtd_info *mtd; -+ struct nand_chip *nand_chip; -+ int res; -+ -+#ifdef CONFIG_MTD_PARTITIONS -+ struct mtd_partition *partitions = NULL; -+ int num_partitions = 0; -+#endif -+ -+ /* Allocate memory for the device structure (and zero it) */ -+ host = kzalloc(sizeof(struct at91_nand_host), GFP_KERNEL); -+ if (!host) { -+ printk(KERN_ERR "at91_nand: failed to allocate device structure.\n"); -+ return -ENOMEM; -+ } -+ -+ host->io_base = ioremap(pdev->resource[0].start, -+ pdev->resource[0].end - pdev->resource[0].start + 1); -+ if (host->io_base == NULL) { -+ printk(KERN_ERR "at91_nand: ioremap failed\n"); -+ kfree(host); -+ return -EIO; -+ } -+ -+ mtd = &host->mtd; -+ nand_chip = &host->nand_chip; -+ host->board = pdev->dev.platform_data; -+ -+ nand_chip->priv = host; /* link the private data structures */ -+ mtd->priv = nand_chip; -+ mtd->owner = THIS_MODULE; -+ -+ /* Set address of NAND IO lines */ -+ nand_chip->IO_ADDR_R = host->io_base; -+ nand_chip->IO_ADDR_W = host->io_base; -+ nand_chip->cmd_ctrl = at91_nand_cmd_ctrl; -+ nand_chip->dev_ready = at91_nand_device_ready; -+ nand_chip->ecc.mode = NAND_ECC_SOFT; /* enable ECC */ -+ nand_chip->chip_delay = 20; /* 20us command delay time */ -+ -+ if (host->board->bus_width_16) /* 16-bit bus width */ -+ nand_chip->options |= NAND_BUSWIDTH_16; -+ -+ platform_set_drvdata(pdev, host); -+ at91_nand_enable(host); -+ -+ if (host->board->det_pin) { -+ if (at91_get_gpio_value(host->board->det_pin)) { -+ printk ("No SmartMedia card inserted.\n"); -+ res = ENXIO; -+ goto out; -+ } -+ } -+ -+ /* Scan to find existance of the device */ -+ if (nand_scan(mtd, 1)) { -+ res = -ENXIO; -+ goto out; + if ((!partitions) || (num_partitions == 0)) { + printk(KERN_ERR "at91_nand: No parititions defined, or unsupported device.\n"); +diff -urN -x CVS linux-2.6.21/drivers/net/arm/at91_ether.c linux-2.6-stable/drivers/net/arm/at91_ether.c +--- linux-2.6.21/drivers/net/arm/at91_ether.c Thu Apr 26 05:08:32 2007 ++++ linux-2.6-stable/drivers/net/arm/at91_ether.c Tue May 8 12:13:31 2007 +@@ -225,6 +225,16 @@ + if (!(phy & ((1 << 2) | 1))) + goto done; + } ++ else if (lp->phy_type == MII_T78Q21x3_ID) { /* ack interrupt in Teridian PHY */ ++ read_phy(lp->phy_address, MII_T78Q21INT_REG, &phy); ++ if (!(phy & ((1 << 2) | 1))) ++ goto done; + } -+ -+#ifdef CONFIG_MTD_PARTITIONS -+ if (host->board->partition_info) -+ partitions = host->board->partition_info(mtd->size, &num_partitions); -+ -+ if ((!partitions) || (num_partitions == 0)) { -+ printk(KERN_ERR "at91_nand: No parititions defined, or unsupported device.\n"); -+ res = ENXIO; -+ goto release; ++ else if (lp->phy_type == MII_DP83848_ID) { ++ read_phy(lp->phy_address, MII_DPPHYSTS_REG, &phy); /* ack interrupt in DP83848 PHY */ ++ if (!(phy & (1 << 7))) ++ goto done; + } -+ -+ res = add_mtd_partitions(mtd, partitions, num_partitions); -+#else -+ res = add_mtd_device(mtd); -+#endif -+ -+ if (!res) -+ return res; -+ -+release: -+ nand_release(mtd); -+out: -+ at91_nand_disable(host); -+ platform_set_drvdata(pdev, NULL); -+ iounmap(host->io_base); -+ kfree(host); -+ return res; -+} -+ -+/* -+ * Remove a NAND device. -+ */ -+static int __devexit at91_nand_remove(struct platform_device *pdev) -+{ -+ struct at91_nand_host *host = platform_get_drvdata(pdev); -+ struct mtd_info *mtd = &host->mtd; -+ -+ nand_release(mtd); -+ -+ at91_nand_disable(host); -+ -+ iounmap(host->io_base); -+ kfree(host); -+ -+ return 0; -+} -+ -+static struct platform_driver at91_nand_driver = { -+ .probe = at91_nand_probe, -+ .remove = at91_nand_remove, -+ .driver = { -+ .name = "at91_nand", -+ .owner = THIS_MODULE, -+ }, -+}; -+ -+static int __init at91_nand_init(void) -+{ -+ return platform_driver_register(&at91_nand_driver); -+} -+ -+ -+static void __exit at91_nand_exit(void) -+{ -+ platform_driver_unregister(&at91_nand_driver); -+} -+ -+ -+module_init(at91_nand_init); -+module_exit(at91_nand_exit); -+ -+MODULE_LICENSE("GPL"); -+MODULE_AUTHOR("Rick Bronson"); -+MODULE_DESCRIPTION("NAND/SmartMedia driver for AT91RM9200"); -diff -urN -x CVS linux-2.6.19-final/drivers/net/arm/at91_ether.c linux-2.6.19/drivers/net/arm/at91_ether.c ---- linux-2.6.19-final/drivers/net/arm/at91_ether.c Mon Dec 4 16:40:14 2006 -+++ linux-2.6.19/drivers/net/arm/at91_ether.c Thu Nov 23 15:50:12 2006 -@@ -41,9 +41,6 @@ - #define DRV_NAME "at91_ether" - #define DRV_VERSION "1.0" --static struct net_device *at91_dev; -- --static struct timer_list check_timer; - #define LINK_POLL_INTERVAL (HZ) + update_linkspeed(dev, 0); - /* ..................................................................... */ -@@ -252,8 +249,8 @@ - * PHY doesn't have an IRQ pin (RTL8201, DP83847, AC101L), - * or board does not have it connected. - */ -- check_timer.expires = jiffies + LINK_POLL_INTERVAL; -- add_timer(&check_timer); -+ lp->check_timer.expires = jiffies + LINK_POLL_INTERVAL; -+ add_timer(&lp->check_timer); - return; +@@ -280,6 +290,19 @@ + dsintr = (1 << 10) | ( 1 << 8); + write_phy(lp->phy_address, MII_TPISTATUS, dsintr); } ++ else if (lp->phy_type == MII_T78Q21x3_ID) { /* for Teridian PHY */ ++ read_phy(lp->phy_address, MII_T78Q21INT_REG, &dsintr); ++ dsintr = dsintr | 0x500; /* set bits 8, 10 */ ++ write_phy(lp->phy_address, MII_T78Q21INT_REG, dsintr); ++ } ++ else if (lp->phy_type == MII_DP83848_ID) { /* National Semiconductor DP83848 PHY */ ++ read_phy(lp->phy_address, MII_DPMISR_REG, &dsintr); ++ dsintr = dsintr | 0x3c; /* set bits 2..5 */ ++ write_phy(lp->phy_address, MII_DPMISR_REG, dsintr); ++ read_phy(lp->phy_address, MII_DPMICR_REG, &dsintr); ++ dsintr = dsintr | 0x3; /* set bits 0,1 */ ++ write_phy(lp->phy_address, MII_DPMICR_REG, dsintr); ++ } -@@ -300,7 +297,7 @@ - - irq_number = lp->board_data.phy_irq_pin; - if (!irq_number) { -- del_timer_sync(&check_timer); -+ del_timer_sync(&lp->check_timer); - return; + disable_mdi(); + spin_unlock_irq(&lp->lock); +@@ -323,6 +346,19 @@ + dsintr = ~((1 << 10) | (1 << 8)); + write_phy(lp->phy_address, MII_TPISTATUS, dsintr); } ++ else if (lp->phy_type == MII_T78Q21x3_ID) { /* for Teridian PHY */ ++ read_phy(lp->phy_address, MII_T78Q21INT_REG, &dsintr); ++ dsintr = dsintr & ~0x500; /* clear bits 8, 10 */ ++ write_phy(lp->phy_address, MII_T78Q21INT_REG, dsintr); ++ } ++ else if (lp->phy_type == MII_DP83848_ID) { /* National Semiconductor DP83848 PHY */ ++ read_phy(lp->phy_address, MII_DPMICR_REG, &dsintr); ++ dsintr = dsintr & ~0x3; /* clear bits 0, 1 */ ++ write_phy(lp->phy_address, MII_DPMICR_REG, dsintr); ++ read_phy(lp->phy_address, MII_DPMISR_REG, &dsintr); ++ dsintr = dsintr & ~0x3c; /* clear bits 2..5 */ ++ write_phy(lp->phy_address, MII_DPMISR_REG, dsintr); ++ } -@@ -362,13 +359,14 @@ - static void at91ether_check_link(unsigned long dev_id) - { - struct net_device *dev = (struct net_device *) dev_id; -+ struct at91_private *lp = (struct at91_private *) dev->priv; - - enable_mdi(); - update_linkspeed(dev, 1); disable_mdi(); + spin_unlock_irq(&lp->lock); +@@ -535,8 +571,8 @@ + mc_filter[bitnr >> 5] |= 1 << (bitnr & 31); + } -- check_timer.expires = jiffies + LINK_POLL_INTERVAL; -- add_timer(&check_timer); -+ lp->check_timer.expires = jiffies + LINK_POLL_INTERVAL; -+ add_timer(&lp->check_timer); - } - - /* ......................... ADDRESS MANAGEMENT ........................ */ -@@ -857,14 +855,13 @@ - while (dlist->descriptors[lp->rxBuffIndex].addr & EMAC_DESC_DONE) { - p_recv = dlist->recv_buf[lp->rxBuffIndex]; - pktlen = dlist->descriptors[lp->rxBuffIndex].size & 0x7ff; /* Length of frame including FCS */ -- skb = alloc_skb(pktlen + 2, GFP_ATOMIC); -+ skb = dev_alloc_skb(pktlen + 2); - if (skb != NULL) { - skb_reserve(skb, 2); - memcpy(skb_put(skb, pktlen), p_recv, pktlen); - - skb->dev = dev; - skb->protocol = eth_type_trans(skb, dev); -- skb->len = pktlen; - dev->last_rx = jiffies; - lp->stats.rx_bytes += pktlen; - netif_rx(skb); -@@ -927,27 +924,43 @@ - return IRQ_HANDLED; +- at91_emac_write(AT91_EMAC_HSH, mc_filter[0]); +- at91_emac_write(AT91_EMAC_HSL, mc_filter[1]); ++ at91_emac_write(AT91_EMAC_HSL, mc_filter[0]); ++ at91_emac_write(AT91_EMAC_HSH, mc_filter[1]); } -+#ifdef CONFIG_NET_POLL_CONTROLLER -+static void at91ether_poll_controller(struct net_device *dev) -+{ -+ unsigned long flags; -+ -+ local_irq_save(flags); -+ at91ether_interrupt(dev->irq, dev, NULL); -+ local_irq_restore(flags); -+} -+#endif -+ /* - * Initialize the ethernet interface - */ - static int __init at91ether_setup(unsigned long phy_type, unsigned short phy_address, - struct platform_device *pdev, struct clk *ether_clk) - { -- struct at91_eth_data *board_data = pdev->dev.platform_data; -+ struct eth_platform_data *board_data = pdev->dev.platform_data; +@@ -943,14 +979,22 @@ struct net_device *dev; struct at91_private *lp; unsigned int val; - int res; -- -- if (at91_dev) /* already initialized */ -- return 0; + struct resource *res; + int ret; @@ -11787,7 +6308,7 @@ diff -urN -x CVS linux-2.6.19-final/drivers/net/arm/at91_ether.c linux-2.6.19/dr + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) { + free_netdev(dev); -+ return -ENODEV; ++ return -ENODEV; + } + dev->base_addr = res->start; + dev->irq = platform_get_irq(pdev, 0); @@ -11795,17 +6316,7 @@ diff -urN -x CVS linux-2.6.19-final/drivers/net/arm/at91_ether.c linux-2.6.19/dr SET_MODULE_OWNER(dev); /* Install the interrupt handler */ -@@ -979,6 +992,9 @@ - dev->set_mac_address = set_mac_address; - dev->ethtool_ops = &at91ether_ethtool_ops; - dev->do_ioctl = at91ether_ioctl; -+#ifdef CONFIG_NET_POLL_CONTROLLER -+ dev->poll_controller = at91ether_poll_controller; -+#endif - - SET_NETDEV_DEV(dev, &pdev->dev); - -@@ -1017,14 +1033,13 @@ +@@ -1023,12 +1067,12 @@ lp->phy_address = phy_address; /* MDI address of PHY */ /* Register the network interface */ @@ -11819,1162 +6330,163 @@ diff -urN -x CVS linux-2.6.19-final/drivers/net/arm/at91_ether.c linux-2.6.19/dr - return res; + return ret; } -- at91_dev = dev; /* Determine current link speed */ - spin_lock_irq(&lp->lock); -@@ -1036,9 +1051,9 @@ - - /* If board has no PHY IRQ, use a timer to poll the PHY */ - if (!lp->board_data.phy_irq_pin) { -- init_timer(&check_timer); -- check_timer.data = (unsigned long)dev; -- check_timer.function = at91ether_check_link; -+ init_timer(&lp->check_timer); -+ lp->check_timer.data = (unsigned long)dev; -+ lp->check_timer.function = at91ether_check_link; - } +@@ -1063,10 +1107,16 @@ + printk(KERN_INFO "%s: Broadcom BCM5221 PHY\n", dev->name); + else if (phy_type == MII_DP83847_ID) + printk(KERN_INFO "%s: National Semiconductor DP83847 PHY\n", dev->name); ++ else if (phy_type == MII_DP83848_ID) ++ printk(KERN_INFO "%s: National Semiconductor DP83848 PHY\n", dev->name); + else if (phy_type == MII_AC101L_ID) + printk(KERN_INFO "%s: Altima AC101L PHY\n", dev->name); + else if (phy_type == MII_KS8721_ID) + printk(KERN_INFO "%s: Micrel KS8721 PHY\n", dev->name); ++ else if (phy_type == MII_T78Q21x3_ID) ++ printk(KERN_INFO "%s: Teridian 78Q21x3 PHY\n", dev->name); ++ else if (phy_type == MII_LAN83C185_ID) ++ printk(KERN_INFO "%s: SMSC LAN83C185 PHY\n", dev->name); - /* Display ethernet banner */ -@@ -1115,15 +1130,16 @@ - - static int __devexit at91ether_remove(struct platform_device *pdev) - { -- struct at91_private *lp = (struct at91_private *) at91_dev->priv; -+ struct net_device *dev = platform_get_drvdata(pdev); -+ struct at91_private *lp = (struct at91_private *) dev->priv; - -- unregister_netdev(at91_dev); -- free_irq(at91_dev->irq, at91_dev); -+ unregister_netdev(dev); -+ free_irq(dev->irq, dev); - dma_free_coherent(NULL, sizeof(struct recv_desc_bufs), lp->dlist, (dma_addr_t)lp->dlist_phys); - clk_put(lp->ether_clk); - -- free_netdev(at91_dev); -- at91_dev = NULL; -+ platform_set_drvdata(pdev, NULL); -+ free_netdev(dev); return 0; } +@@ -1104,8 +1154,11 @@ + case MII_RTL8201_ID: /* Realtek RTL8201: PHY_ID1 = 0, PHY_ID2 = 0x8201 */ + case MII_BCM5221_ID: /* Broadcom BCM5221: PHY_ID1 = 0x40, PHY_ID2 = 0x61e0 */ + case MII_DP83847_ID: /* National Semiconductor DP83847: */ ++ case MII_DP83848_ID: /* National Semiconductor DP83848: */ + case MII_AC101L_ID: /* Altima AC101L: PHY_ID1 = 0x22, PHY_ID2 = 0x5520 */ + case MII_KS8721_ID: /* Micrel KS8721: PHY_ID1 = 0x22, PHY_ID2 = 0x1610 */ ++ case MII_T78Q21x3_ID: /* Teridian 78Q21x3: PHY_ID1 = 0x0E, PHY_ID2 = 7237 */ ++ case MII_LAN83C185_ID: /* SMSC LAN83C185: PHY_ID1 = 0x0007, PHY_ID2 = 0xC0A1 */ + detected = at91ether_setup(phy_id, phy_address, pdev, ether_clk); + break; + } +diff -urN -x CVS linux-2.6.21/drivers/net/arm/at91_ether.h linux-2.6-stable/drivers/net/arm/at91_ether.h +--- linux-2.6.21/drivers/net/arm/at91_ether.h Thu Apr 26 05:08:32 2007 ++++ linux-2.6-stable/drivers/net/arm/at91_ether.h Tue May 8 12:13:31 2007 +@@ -17,39 +17,46 @@ + + + /* Davicom 9161 PHY */ +-#define MII_DM9161_ID 0x0181b880 +-#define MII_DM9161A_ID 0x0181b8a0 +- +-/* Davicom specific registers */ +-#define MII_DSCR_REG 16 +-#define MII_DSCSR_REG 17 +-#define MII_DSINTR_REG 21 ++#define MII_DM9161_ID 0x0181b880 ++#define MII_DM9161A_ID 0x0181b8a0 ++#define MII_DSCR_REG 16 ++#define MII_DSCSR_REG 17 ++#define MII_DSINTR_REG 21 + + /* Intel LXT971A PHY */ +-#define MII_LXT971A_ID 0x001378E0 +- +-/* Intel specific registers */ +-#define MII_ISINTE_REG 18 +-#define MII_ISINTS_REG 19 +-#define MII_LEDCTRL_REG 20 ++#define MII_LXT971A_ID 0x001378E0 ++#define MII_ISINTE_REG 18 ++#define MII_ISINTS_REG 19 ++#define MII_LEDCTRL_REG 20 + + /* Realtek RTL8201 PHY */ +-#define MII_RTL8201_ID 0x00008200 ++#define MII_RTL8201_ID 0x00008200 + + /* Broadcom BCM5221 PHY */ +-#define MII_BCM5221_ID 0x004061e0 +- +-/* Broadcom specific registers */ +-#define MII_BCMINTR_REG 26 ++#define MII_BCM5221_ID 0x004061e0 ++#define MII_BCMINTR_REG 26 + + /* National Semiconductor DP83847 */ +-#define MII_DP83847_ID 0x20005c30 ++#define MII_DP83847_ID 0x20005c30 ++ ++/* National Semiconductor DP83848 */ ++#define MII_DP83848_ID 0x20005c90 ++#define MII_DPPHYSTS_REG 16 ++#define MII_DPMICR_REG 17 ++#define MII_DPMISR_REG 18 + + /* Altima AC101L PHY */ +-#define MII_AC101L_ID 0x00225520 ++#define MII_AC101L_ID 0x00225520 + + /* Micrel KS8721 PHY */ +-#define MII_KS8721_ID 0x00221610 ++#define MII_KS8721_ID 0x00221610 ++ ++/* Teridian 78Q2123/78Q2133 */ ++#define MII_T78Q21x3_ID 0x000e7230 ++#define MII_T78Q21INT_REG 17 ++ ++/* SMSC LAN83C185 */ ++#define MII_LAN83C185_ID 0x0007C0A0 + + /* ........................................................................ */ + +diff -urN -x CVS linux-2.6.21/drivers/pcmcia/at91_cf.c linux-2.6-stable/drivers/pcmcia/at91_cf.c +--- linux-2.6.21/drivers/pcmcia/at91_cf.c Thu Apr 26 05:08:32 2007 ++++ linux-2.6-stable/drivers/pcmcia/at91_cf.c Tue May 8 12:13:31 2007 +@@ -332,20 +332,27 @@ + struct at91_cf_data *board = cf->board; -@@ -1131,8 +1147,8 @@ - - static int at91ether_suspend(struct platform_device *pdev, pm_message_t mesg) - { -- struct at91_private *lp = (struct at91_private *) at91_dev->priv; - struct net_device *net_dev = platform_get_drvdata(pdev); -+ struct at91_private *lp = (struct at91_private *) net_dev->priv; - int phy_irq = lp->board_data.phy_irq_pin; - - if (netif_running(net_dev)) { -@@ -1149,8 +1165,8 @@ - - static int at91ether_resume(struct platform_device *pdev) - { -- struct at91_private *lp = (struct at91_private *) at91_dev->priv; - struct net_device *net_dev = platform_get_drvdata(pdev); -+ struct at91_private *lp = (struct at91_private *) net_dev->priv; - int phy_irq = lp->board_data.phy_irq_pin; - - if (netif_running(net_dev)) { -diff -urN -x CVS linux-2.6.19-final/drivers/net/arm/at91_ether.h linux-2.6.19/drivers/net/arm/at91_ether.h ---- linux-2.6.19-final/drivers/net/arm/at91_ether.h Mon Dec 4 16:33:44 2006 -+++ linux-2.6.19/drivers/net/arm/at91_ether.h Thu Nov 23 15:50:12 2006 -@@ -79,7 +79,7 @@ - { - struct net_device_stats stats; - struct mii_if_info mii; /* ethtool support */ -- struct at91_eth_data board_data; /* board-specific configuration */ -+ struct eth_platform_data board_data; /* board-specific configuration */ - struct clk *ether_clk; /* clock */ - - /* PHY */ -@@ -87,6 +87,7 @@ - spinlock_t lock; /* lock for MDI interface */ - short phy_media; /* media interface type */ - unsigned short phy_address; /* 5-bit MDI address of PHY (0..31) */ -+ struct timer_list check_timer; /* Poll link status */ - - /* Transmit */ - struct sk_buff *skb; /* holds skb until xmit interrupt completes */ -diff -urN -x CVS linux-2.6.19-final/drivers/pcmcia/at91_cf.c linux-2.6.19/drivers/pcmcia/at91_cf.c ---- linux-2.6.19-final/drivers/pcmcia/at91_cf.c Mon Dec 4 16:40:25 2006 -+++ linux-2.6.19/drivers/pcmcia/at91_cf.c Thu Nov 16 17:27:11 2006 -@@ -23,19 +23,20 @@ - #include <asm/io.h> - #include <asm/sizes.h> - --#include <asm/arch/at91rm9200.h> - #include <asm/arch/board.h> - #include <asm/arch/gpio.h> -+#include <asm/arch/at91rm9200_mc.h> - - - /* - * A0..A10 work in each range; A23 indicates I/O space; A25 is CFRNW; - * some other bit in {A24,A22..A11} is nREG to flag memory access - * (vs attributes). So more than 2KB/region would just be waste. -+ * Note: These are offsets from the physical base address. - */ --#define CF_ATTR_PHYS (AT91_CF_BASE) --#define CF_IO_PHYS (AT91_CF_BASE + (1 << 23)) --#define CF_MEM_PHYS (AT91_CF_BASE + 0x017ff800) -+#define CF_ATTR_PHYS (0) -+#define CF_IO_PHYS (1 << 23) -+#define CF_MEM_PHYS (0x017ff800) - - /*--------------------------------------------------------------------------*/ - -@@ -48,6 +49,8 @@ - - struct platform_device *pdev; - struct at91_cf_data *board; -+ -+ unsigned long phys_baseaddr; - }; - - #define SZ_2K (2 * SZ_1K) -@@ -154,9 +157,8 @@ - - /* - * Use 16 bit accesses unless/until we need 8-bit i/o space. -- * Always set CSR4 ... PCMCIA won't always unmap things. - */ -- csr = at91_sys_read(AT91_SMC_CSR(4)) & ~AT91_SMC_DBW; -+ csr = at91_sys_read(AT91_SMC_CSR(cf->board->chipselect)) & ~AT91_SMC_DBW; - - /* - * NOTE: this CF controller ignores IOIS16, so we can't really do -@@ -168,14 +170,14 @@ - * some cards only like that way to get at the odd byte, despite - * CF 3.0 spec table 35 also giving the D8-D15 option. - */ -- if (!(io->flags & (MAP_16BIT|MAP_AUTOSZ))) { -+ if (!(io->flags & (MAP_16BIT | MAP_AUTOSZ))) { - csr |= AT91_SMC_DBW_8; - pr_debug("%s: 8bit i/o bus\n", driver_name); - } else { - csr |= AT91_SMC_DBW_16; - pr_debug("%s: 16bit i/o bus\n", driver_name); + pcmcia_socket_dev_suspend(&pdev->dev, mesg); ++ + if (device_may_wakeup(&pdev->dev)) { + enable_irq_wake(board->det_pin); + if (board->irq_pin) + enable_irq_wake(board->irq_pin); +- } else { +- disable_irq_wake(board->det_pin); +- if (board->irq_pin) +- disable_irq_wake(board->irq_pin); } -- at91_sys_write(AT91_SMC_CSR(4), csr); -+ at91_sys_write(AT91_SMC_CSR(cf->board->chipselect), csr); - - io->start = cf->socket.io_offset; - io->stop = io->start + SZ_2K - 1; -@@ -194,11 +196,11 @@ - - cf = container_of(s, struct at91_cf_socket, socket); - -- map->flags &= MAP_ACTIVE|MAP_ATTRIB|MAP_16BIT; -+ map->flags &= (MAP_ACTIVE | MAP_ATTRIB | MAP_16BIT); - if (map->flags & MAP_ATTRIB) -- map->static_start = CF_ATTR_PHYS; -+ map->static_start = cf->phys_baseaddr + CF_ATTR_PHYS; - else -- map->static_start = CF_MEM_PHYS; -+ map->static_start = cf->phys_baseaddr + CF_MEM_PHYS; - ++ return 0; } -@@ -219,7 +221,6 @@ - struct at91_cf_socket *cf; - struct at91_cf_data *board = pdev->dev.platform_data; - struct resource *io; -- unsigned int csa; - int status; - - if (!board || !board->det_pin || !board->rst_pin) -@@ -235,33 +236,11 @@ - - cf->board = board; - cf->pdev = pdev; -+ cf->phys_baseaddr = io->start; - platform_set_drvdata(pdev, cf); - -- /* CF takes over CS4, CS5, CS6 */ -- csa = at91_sys_read(AT91_EBI_CSA); -- at91_sys_write(AT91_EBI_CSA, csa | AT91_EBI_CS4A_SMC_COMPACTFLASH); -- -- /* nWAIT is _not_ a default setting */ -- (void) at91_set_A_periph(AT91_PIN_PC6, 1); /* nWAIT */ -- -- /* -- * Static memory controller timing adjustments. -- * REVISIT: these timings are in terms of MCK cycles, so -- * when MCK changes (cpufreq etc) so must these values... -- */ -- at91_sys_write(AT91_SMC_CSR(4), -- AT91_SMC_ACSS_STD -- | AT91_SMC_DBW_16 -- | AT91_SMC_BAT -- | AT91_SMC_WSEN -- | AT91_SMC_NWS_(32) /* wait states */ -- | AT91_SMC_RWSETUP_(6) /* setup time */ -- | AT91_SMC_RWHOLD_(4) /* hold time */ -- ); -- - /* must be a GPIO; ergo must trigger on both edges */ -- status = request_irq(board->det_pin, at91_cf_irq, -- IRQF_SAMPLE_RANDOM, driver_name, cf); -+ status = request_irq(board->det_pin, at91_cf_irq, 0, driver_name, cf); - if (status < 0) - goto fail0; - device_init_wakeup(&pdev->dev, 1); -@@ -282,14 +261,18 @@ - cf->socket.pci_irq = NR_IRQS + 1; - - /* pcmcia layer only remaps "real" memory not iospace */ -- cf->socket.io_offset = (unsigned long) ioremap(CF_IO_PHYS, SZ_2K); -- if (!cf->socket.io_offset) -+ cf->socket.io_offset = (unsigned long) ioremap(cf->phys_baseaddr + CF_IO_PHYS, SZ_2K); -+ if (!cf->socket.io_offset) { -+ status = -ENXIO; - goto fail1; -+ } -- /* reserve CS4, CS5, and CS6 regions; but use just CS4 */ -+ /* reserve chip-select regions */ - if (!request_mem_region(io->start, io->end + 1 - io->start, -- driver_name)) -+ driver_name)) { -+ status = -ENXIO; - goto fail1; + static int at91_cf_resume(struct platform_device *pdev) + { ++ struct at91_cf_socket *cf = platform_get_drvdata(pdev); ++ struct at91_cf_data *board = cf->board; ++ ++ if (device_may_wakeup(&pdev->dev)) { ++ disable_irq_wake(board->det_pin); ++ if (board->irq_pin) ++ disable_irq_wake(board->irq_pin); + } - - pr_info("%s: irqs det #%d, io #%d\n", driver_name, - board->det_pin, board->irq_pin); -@@ -319,9 +302,7 @@ - fail0a: - device_init_wakeup(&pdev->dev, 0); - free_irq(board->det_pin, cf); -- device_init_wakeup(&pdev->dev, 0); - fail0: -- at91_sys_write(AT91_EBI_CSA, csa); - kfree(cf); - return status; ++ + pcmcia_socket_dev_resume(&pdev->dev); + return 0; } -@@ -331,19 +312,15 @@ - struct at91_cf_socket *cf = platform_get_drvdata(pdev); - struct at91_cf_data *board = cf->board; - struct resource *io = cf->socket.io[0].res; -- unsigned int csa; - - pcmcia_unregister_socket(&cf->socket); - if (board->irq_pin) - free_irq(board->irq_pin, cf); -- free_irq(board->det_pin, cf); - device_init_wakeup(&pdev->dev, 0); -+ free_irq(board->det_pin, cf); - iounmap((void __iomem *) cf->socket.io_offset); - release_mem_region(io->start, io->end + 1 - io->start); +@@ -360,7 +367,6 @@ + .name = (char *) driver_name, + .owner = THIS_MODULE, + }, +- .probe = at91_cf_probe, + .remove = __exit_p(at91_cf_remove), + .suspend = at91_cf_suspend, + .resume = at91_cf_resume, +@@ -370,7 +376,7 @@ -- csa = at91_sys_read(AT91_EBI_CSA); -- at91_sys_write(AT91_EBI_CSA, csa & ~AT91_EBI_CS4A); -- - kfree(cf); - return 0; + static int __init at91_cf_init(void) + { +- return platform_driver_register(&at91_cf_driver); ++ return platform_driver_probe(&at91_cf_driver, at91_cf_probe); } -diff -urN -x CVS linux-2.6.19-final/drivers/rtc/Kconfig linux-2.6.19/drivers/rtc/Kconfig ---- linux-2.6.19-final/drivers/rtc/Kconfig Mon Dec 4 16:40:27 2006 -+++ linux-2.6.19/drivers/rtc/Kconfig Thu Oct 12 17:07:39 2006 -@@ -280,7 +280,7 @@ - To compile this driver as a module, choose M here: the - module will be called rtc-pl031. + module_init(at91_cf_init); --config RTC_DRV_AT91 -+config RTC_DRV_AT91RM9200 - tristate "AT91RM9200" - depends on RTC_CLASS && ARCH_AT91RM9200 - help -diff -urN -x CVS linux-2.6.19-final/drivers/rtc/Makefile linux-2.6.19/drivers/rtc/Makefile ---- linux-2.6.19-final/drivers/rtc/Makefile Mon Dec 4 16:40:27 2006 -+++ linux-2.6.19/drivers/rtc/Makefile Fri Oct 13 10:49:07 2006 -@@ -34,5 +34,5 @@ - obj-$(CONFIG_RTC_DRV_PL031) += rtc-pl031.o - obj-$(CONFIG_RTC_DRV_MAX6902) += rtc-max6902.o - obj-$(CONFIG_RTC_DRV_V3020) += rtc-v3020.o --obj-$(CONFIG_RTC_DRV_AT91) += rtc-at91.o -+obj-$(CONFIG_RTC_DRV_AT91RM9200)+= rtc-at91rm9200.o - obj-$(CONFIG_RTC_DRV_SH) += rtc-sh.o -diff -urN -x CVS linux-2.6.19-final/drivers/rtc/rtc-at91.c linux-2.6.19/drivers/rtc/rtc-at91.c ---- linux-2.6.19-final/drivers/rtc/rtc-at91.c Mon Dec 4 16:40:27 2006 -+++ linux-2.6.19/drivers/rtc/rtc-at91.c Thu Jan 1 02:00:00 1970 -@@ -1,429 +0,0 @@ --/* -- * Real Time Clock interface for Linux on Atmel AT91RM9200 -- * -- * Copyright (C) 2002 Rick Bronson -- * -- * Converted to RTC class model by Andrew Victor -- * -- * Ported to Linux 2.6 by Steven Scholz -- * Based on s3c2410-rtc.c Simtec Electronics -- * -- * Based on sa1100-rtc.c by Nils Faerber -- * Based on rtc.c by Paul Gortmaker -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License -- * as published by the Free Software Foundation; either version -- * 2 of the License, or (at your option) any later version. -- * -- */ -- --#include <linux/module.h> --#include <linux/kernel.h> --#include <linux/platform_device.h> --#include <linux/time.h> --#include <linux/rtc.h> --#include <linux/bcd.h> --#include <linux/interrupt.h> --#include <linux/ioctl.h> --#include <linux/completion.h> -- --#include <asm/uaccess.h> --#include <asm/rtc.h> -- --#include <asm/mach/time.h> -- -- --#define AT91_RTC_FREQ 1 --#define AT91_RTC_EPOCH 1900UL /* just like arch/arm/common/rtctime.c */ -- --static DECLARE_COMPLETION(at91_rtc_updated); --static unsigned int at91_alarm_year = AT91_RTC_EPOCH; -- --/* -- * Decode time/date into rtc_time structure -- */ --static void at91_rtc_decodetime(unsigned int timereg, unsigned int calreg, -- struct rtc_time *tm) --{ -- unsigned int time, date; -- -- /* must read twice in case it changes */ -- do { -- time = at91_sys_read(timereg); -- date = at91_sys_read(calreg); -- } while ((time != at91_sys_read(timereg)) || -- (date != at91_sys_read(calreg))); -- -- tm->tm_sec = BCD2BIN((time & AT91_RTC_SEC) >> 0); -- tm->tm_min = BCD2BIN((time & AT91_RTC_MIN) >> 8); -- tm->tm_hour = BCD2BIN((time & AT91_RTC_HOUR) >> 16); -- -- /* -- * The Calendar Alarm register does not have a field for -- * the year - so these will return an invalid value. When an -- * alarm is set, at91_alarm_year wille store the current year. -- */ -- tm->tm_year = BCD2BIN(date & AT91_RTC_CENT) * 100; /* century */ -- tm->tm_year += BCD2BIN((date & AT91_RTC_YEAR) >> 8); /* year */ -- -- tm->tm_wday = BCD2BIN((date & AT91_RTC_DAY) >> 21) - 1; /* day of the week [0-6], Sunday=0 */ -- tm->tm_mon = BCD2BIN((date & AT91_RTC_MONTH) >> 16) - 1; -- tm->tm_mday = BCD2BIN((date & AT91_RTC_DATE) >> 24); --} -- --/* -- * Read current time and date in RTC -- */ --static int at91_rtc_readtime(struct device *dev, struct rtc_time *tm) --{ -- at91_rtc_decodetime(AT91_RTC_TIMR, AT91_RTC_CALR, tm); -- tm->tm_yday = rtc_year_days(tm->tm_mday, tm->tm_mon, tm->tm_year); -- tm->tm_year = tm->tm_year - 1900; -- -- pr_debug("%s(): %4d-%02d-%02d %02d:%02d:%02d\n", __FUNCTION__, -- 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday, -- tm->tm_hour, tm->tm_min, tm->tm_sec); -- -- return 0; --} -- --/* -- * Set current time and date in RTC -- */ --static int at91_rtc_settime(struct device *dev, struct rtc_time *tm) --{ -- unsigned long cr; -- -- pr_debug("%s(): %4d-%02d-%02d %02d:%02d:%02d\n", __FUNCTION__, -- 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday, -- tm->tm_hour, tm->tm_min, tm->tm_sec); -- -- /* Stop Time/Calendar from counting */ -- cr = at91_sys_read(AT91_RTC_CR); -- at91_sys_write(AT91_RTC_CR, cr | AT91_RTC_UPDCAL | AT91_RTC_UPDTIM); -- -- at91_sys_write(AT91_RTC_IER, AT91_RTC_ACKUPD); -- wait_for_completion(&at91_rtc_updated); /* wait for ACKUPD interrupt */ -- at91_sys_write(AT91_RTC_IDR, AT91_RTC_ACKUPD); -- -- at91_sys_write(AT91_RTC_TIMR, -- BIN2BCD(tm->tm_sec) << 0 -- | BIN2BCD(tm->tm_min) << 8 -- | BIN2BCD(tm->tm_hour) << 16); -- -- at91_sys_write(AT91_RTC_CALR, -- BIN2BCD((tm->tm_year + 1900) / 100) /* century */ -- | BIN2BCD(tm->tm_year % 100) << 8 /* year */ -- | BIN2BCD(tm->tm_mon + 1) << 16 /* tm_mon starts at zero */ -- | BIN2BCD(tm->tm_wday + 1) << 21 /* day of the week [0-6], Sunday=0 */ -- | BIN2BCD(tm->tm_mday) << 24); -- -- /* Restart Time/Calendar */ -- cr = at91_sys_read(AT91_RTC_CR); -- at91_sys_write(AT91_RTC_CR, cr & ~(AT91_RTC_UPDCAL | AT91_RTC_UPDTIM)); -- -- return 0; --} -- --/* -- * Read alarm time and date in RTC -- */ --static int at91_rtc_readalarm(struct device *dev, struct rtc_wkalrm *alrm) --{ -- struct rtc_time *tm = &alrm->time; -- -- at91_rtc_decodetime(AT91_RTC_TIMALR, AT91_RTC_CALALR, tm); -- tm->tm_yday = rtc_year_days(tm->tm_mday, tm->tm_mon, tm->tm_year); -- tm->tm_year = at91_alarm_year - 1900; -- -- pr_debug("%s(): %4d-%02d-%02d %02d:%02d:%02d\n", __FUNCTION__, -- 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday, -- tm->tm_hour, tm->tm_min, tm->tm_sec); -- -- return 0; --} -- --/* -- * Set alarm time and date in RTC -- */ --static int at91_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm) --{ -- struct rtc_time tm; -- -- at91_rtc_decodetime(AT91_RTC_TIMR, AT91_RTC_CALR, &tm); -- -- at91_alarm_year = tm.tm_year; -- -- tm.tm_hour = alrm->time.tm_hour; -- tm.tm_min = alrm->time.tm_min; -- tm.tm_sec = alrm->time.tm_sec; -- -- at91_sys_write(AT91_RTC_TIMALR, -- BIN2BCD(tm.tm_sec) << 0 -- | BIN2BCD(tm.tm_min) << 8 -- | BIN2BCD(tm.tm_hour) << 16 -- | AT91_RTC_HOUREN | AT91_RTC_MINEN | AT91_RTC_SECEN); -- at91_sys_write(AT91_RTC_CALALR, -- BIN2BCD(tm.tm_mon + 1) << 16 /* tm_mon starts at zero */ -- | BIN2BCD(tm.tm_mday) << 24 -- | AT91_RTC_DATEEN | AT91_RTC_MTHEN); -- -- pr_debug("%s(): %4d-%02d-%02d %02d:%02d:%02d\n", __FUNCTION__, -- at91_alarm_year, tm.tm_mon, tm.tm_mday, tm.tm_hour, -- tm.tm_min, tm.tm_sec); -- -- return 0; --} -- --/* -- * Handle commands from user-space -- */ --static int at91_rtc_ioctl(struct device *dev, unsigned int cmd, -- unsigned long arg) --{ -- int ret = 0; -- -- pr_debug("%s(): cmd=%08x, arg=%08lx.\n", __FUNCTION__, cmd, arg); -- -- switch (cmd) { -- case RTC_AIE_OFF: /* alarm off */ -- at91_sys_write(AT91_RTC_IDR, AT91_RTC_ALARM); -- break; -- case RTC_AIE_ON: /* alarm on */ -- at91_sys_write(AT91_RTC_IER, AT91_RTC_ALARM); -- break; -- case RTC_UIE_OFF: /* update off */ -- case RTC_PIE_OFF: /* periodic off */ -- at91_sys_write(AT91_RTC_IDR, AT91_RTC_SECEV); -- break; -- case RTC_UIE_ON: /* update on */ -- case RTC_PIE_ON: /* periodic on */ -- at91_sys_write(AT91_RTC_IER, AT91_RTC_SECEV); -- break; -- case RTC_IRQP_READ: /* read periodic alarm frequency */ -- ret = put_user(AT91_RTC_FREQ, (unsigned long *) arg); -- break; -- case RTC_IRQP_SET: /* set periodic alarm frequency */ -- if (arg != AT91_RTC_FREQ) -- ret = -EINVAL; -- break; -- default: -- ret = -ENOIOCTLCMD; -- break; -- } -- -- return ret; --} -- --/* -- * Provide additional RTC information in /proc/driver/rtc -- */ --static int at91_rtc_proc(struct device *dev, struct seq_file *seq) --{ -- unsigned long imr = at91_sys_read(AT91_RTC_IMR); -- -- seq_printf(seq, "alarm_IRQ\t: %s\n", -- (imr & AT91_RTC_ALARM) ? "yes" : "no"); -- seq_printf(seq, "update_IRQ\t: %s\n", -- (imr & AT91_RTC_ACKUPD) ? "yes" : "no"); -- seq_printf(seq, "periodic_IRQ\t: %s\n", -- (imr & AT91_RTC_SECEV) ? "yes" : "no"); -- seq_printf(seq, "periodic_freq\t: %ld\n", -- (unsigned long) AT91_RTC_FREQ); -- -- return 0; --} -- --/* -- * IRQ handler for the RTC -- */ --static irqreturn_t at91_rtc_interrupt(int irq, void *dev_id) --{ -- struct platform_device *pdev = dev_id; -- struct rtc_device *rtc = platform_get_drvdata(pdev); -- unsigned int rtsr; -- unsigned long events = 0; -- -- rtsr = at91_sys_read(AT91_RTC_SR) & at91_sys_read(AT91_RTC_IMR); -- if (rtsr) { /* this interrupt is shared! Is it ours? */ -- if (rtsr & AT91_RTC_ALARM) -- events |= (RTC_AF | RTC_IRQF); -- if (rtsr & AT91_RTC_SECEV) -- events |= (RTC_UF | RTC_IRQF); -- if (rtsr & AT91_RTC_ACKUPD) -- complete(&at91_rtc_updated); -- -- at91_sys_write(AT91_RTC_SCCR, rtsr); /* clear status reg */ -- -- rtc_update_irq(&rtc->class_dev, 1, events); -- -- pr_debug("%s(): num=%ld, events=0x%02lx\n", __FUNCTION__, -- events >> 8, events & 0x000000FF); -- -- return IRQ_HANDLED; -- } -- return IRQ_NONE; /* not handled */ --} -- --static const struct rtc_class_ops at91_rtc_ops = { -- .ioctl = at91_rtc_ioctl, -- .read_time = at91_rtc_readtime, -- .set_time = at91_rtc_settime, -- .read_alarm = at91_rtc_readalarm, -- .set_alarm = at91_rtc_setalarm, -- .proc = at91_rtc_proc, --}; -- --/* -- * Initialize and install RTC driver -- */ --static int __init at91_rtc_probe(struct platform_device *pdev) --{ -- struct rtc_device *rtc; -- int ret; -- -- at91_sys_write(AT91_RTC_CR, 0); -- at91_sys_write(AT91_RTC_MR, 0); /* 24 hour mode */ -- -- /* Disable all interrupts */ -- at91_sys_write(AT91_RTC_IDR, AT91_RTC_ACKUPD | AT91_RTC_ALARM | -- AT91_RTC_SECEV | AT91_RTC_TIMEV | -- AT91_RTC_CALEV); -- -- ret = request_irq(AT91_ID_SYS, at91_rtc_interrupt, -- IRQF_DISABLED | IRQF_SHARED, -- "at91_rtc", pdev); -- if (ret) { -- printk(KERN_ERR "at91_rtc: IRQ %d already in use.\n", -- AT91_ID_SYS); -- return ret; -- } -- -- rtc = rtc_device_register(pdev->name, &pdev->dev, -- &at91_rtc_ops, THIS_MODULE); -- if (IS_ERR(rtc)) { -- free_irq(AT91_ID_SYS, pdev); -- return PTR_ERR(rtc); -- } -- platform_set_drvdata(pdev, rtc); -- device_init_wakeup(&pdev->dev, 1); -- -- printk(KERN_INFO "AT91 Real Time Clock driver.\n"); -- return 0; --} -- --/* -- * Disable and remove the RTC driver -- */ --static int __devexit at91_rtc_remove(struct platform_device *pdev) --{ -- struct rtc_device *rtc = platform_get_drvdata(pdev); -- -- /* Disable all interrupts */ -- at91_sys_write(AT91_RTC_IDR, AT91_RTC_ACKUPD | AT91_RTC_ALARM | -- AT91_RTC_SECEV | AT91_RTC_TIMEV | -- AT91_RTC_CALEV); -- free_irq(AT91_ID_SYS, pdev); -- -- rtc_device_unregister(rtc); -- platform_set_drvdata(pdev, NULL); -- device_init_wakeup(&pdev->dev, 0); -- -- return 0; --} -- --#ifdef CONFIG_PM -- --/* AT91RM9200 RTC Power management control */ -- --static struct timespec at91_rtc_delta; --static u32 at91_rtc_imr; -- --static int at91_rtc_suspend(struct platform_device *pdev, pm_message_t state) --{ -- struct rtc_time tm; -- struct timespec time; -- -- time.tv_nsec = 0; -- -- /* calculate time delta for suspend */ -- at91_rtc_readtime(&pdev->dev, &tm); -- rtc_tm_to_time(&tm, &time.tv_sec); -- save_time_delta(&at91_rtc_delta, &time); -- -- /* this IRQ is shared with DBGU and other hardware which isn't -- * necessarily doing PM like we are... -- */ -- at91_rtc_imr = at91_sys_read(AT91_RTC_IMR) -- & (AT91_RTC_ALARM|AT91_RTC_SECEV); -- if (at91_rtc_imr) { -- if (device_may_wakeup(&pdev->dev)) -- enable_irq_wake(AT91_ID_SYS); -- else -- at91_sys_write(AT91_RTC_IDR, at91_rtc_imr); -- } -- -- pr_debug("%s(): %4d-%02d-%02d %02d:%02d:%02d\n", __FUNCTION__, -- 1900 + tm.tm_year, tm.tm_mon, tm.tm_mday, -- tm.tm_hour, tm.tm_min, tm.tm_sec); -- -- return 0; --} -- --static int at91_rtc_resume(struct platform_device *pdev) --{ -- struct rtc_time tm; -- struct timespec time; -- -- time.tv_nsec = 0; -- -- at91_rtc_readtime(&pdev->dev, &tm); -- rtc_tm_to_time(&tm, &time.tv_sec); -- restore_time_delta(&at91_rtc_delta, &time); -- -- if (at91_rtc_imr) { -- if (device_may_wakeup(&pdev->dev)) -- disable_irq_wake(AT91_ID_SYS); -- else -- at91_sys_write(AT91_RTC_IER, at91_rtc_imr); -- } -- -- pr_debug("%s(): %4d-%02d-%02d %02d:%02d:%02d\n", __FUNCTION__, -- 1900 + tm.tm_year, tm.tm_mon, tm.tm_mday, -- tm.tm_hour, tm.tm_min, tm.tm_sec); -- -- return 0; --} --#else --#define at91_rtc_suspend NULL --#define at91_rtc_resume NULL --#endif -- --static struct platform_driver at91_rtc_driver = { -- .probe = at91_rtc_probe, -- .remove = at91_rtc_remove, -- .suspend = at91_rtc_suspend, -- .resume = at91_rtc_resume, -- .driver = { -- .name = "at91_rtc", -- .owner = THIS_MODULE, -- }, --}; -- --static int __init at91_rtc_init(void) --{ -- return platform_driver_register(&at91_rtc_driver); --} -- --static void __exit at91_rtc_exit(void) --{ -- platform_driver_unregister(&at91_rtc_driver); --} -- --module_init(at91_rtc_init); --module_exit(at91_rtc_exit); -- --MODULE_AUTHOR("Rick Bronson"); --MODULE_DESCRIPTION("RTC driver for Atmel AT91RM9200"); --MODULE_LICENSE("GPL"); -diff -urN -x CVS linux-2.6.19-final/drivers/rtc/rtc-at91rm9200.c linux-2.6.19/drivers/rtc/rtc-at91rm9200.c ---- linux-2.6.19-final/drivers/rtc/rtc-at91rm9200.c Thu Jan 1 02:00:00 1970 -+++ linux-2.6.19/drivers/rtc/rtc-at91rm9200.c Thu Nov 30 09:08:25 2006 -@@ -0,0 +1,430 @@ -+/* -+ * Real Time Clock interface for Linux on Atmel AT91RM9200 -+ * -+ * Copyright (C) 2002 Rick Bronson -+ * -+ * Converted to RTC class model by Andrew Victor -+ * -+ * Ported to Linux 2.6 by Steven Scholz -+ * Based on s3c2410-rtc.c Simtec Electronics -+ * -+ * Based on sa1100-rtc.c by Nils Faerber -+ * Based on rtc.c by Paul Gortmaker -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License -+ * as published by the Free Software Foundation; either version -+ * 2 of the License, or (at your option) any later version. -+ * -+ */ -+ -+#include <linux/module.h> -+#include <linux/kernel.h> -+#include <linux/platform_device.h> -+#include <linux/time.h> -+#include <linux/rtc.h> -+#include <linux/bcd.h> -+#include <linux/interrupt.h> -+#include <linux/ioctl.h> -+#include <linux/completion.h> -+ -+#include <asm/uaccess.h> -+#include <asm/rtc.h> -+ -+#include <asm/mach/time.h> -+#include <asm/arch/at91_rtc.h> -+ -+ -+#define AT91_RTC_FREQ 1 -+#define AT91_RTC_EPOCH 1900UL /* just like arch/arm/common/rtctime.c */ -+ -+static DECLARE_COMPLETION(at91_rtc_updated); -+static unsigned int at91_alarm_year = AT91_RTC_EPOCH; -+ -+/* -+ * Decode time/date into rtc_time structure -+ */ -+static void at91_rtc_decodetime(unsigned int timereg, unsigned int calreg, -+ struct rtc_time *tm) -+{ -+ unsigned int time, date; -+ -+ /* must read twice in case it changes */ -+ do { -+ time = at91_sys_read(timereg); -+ date = at91_sys_read(calreg); -+ } while ((time != at91_sys_read(timereg)) || -+ (date != at91_sys_read(calreg))); -+ -+ tm->tm_sec = BCD2BIN((time & AT91_RTC_SEC) >> 0); -+ tm->tm_min = BCD2BIN((time & AT91_RTC_MIN) >> 8); -+ tm->tm_hour = BCD2BIN((time & AT91_RTC_HOUR) >> 16); -+ -+ /* -+ * The Calendar Alarm register does not have a field for -+ * the year - so these will return an invalid value. When an -+ * alarm is set, at91_alarm_year wille store the current year. -+ */ -+ tm->tm_year = BCD2BIN(date & AT91_RTC_CENT) * 100; /* century */ -+ tm->tm_year += BCD2BIN((date & AT91_RTC_YEAR) >> 8); /* year */ -+ -+ tm->tm_wday = BCD2BIN((date & AT91_RTC_DAY) >> 21) - 1; /* day of the week [0-6], Sunday=0 */ -+ tm->tm_mon = BCD2BIN((date & AT91_RTC_MONTH) >> 16) - 1; -+ tm->tm_mday = BCD2BIN((date & AT91_RTC_DATE) >> 24); -+} -+ -+/* -+ * Read current time and date in RTC -+ */ -+static int at91_rtc_readtime(struct device *dev, struct rtc_time *tm) -+{ -+ at91_rtc_decodetime(AT91_RTC_TIMR, AT91_RTC_CALR, tm); -+ tm->tm_yday = rtc_year_days(tm->tm_mday, tm->tm_mon, tm->tm_year); -+ tm->tm_year = tm->tm_year - 1900; -+ -+ pr_debug("%s(): %4d-%02d-%02d %02d:%02d:%02d\n", __FUNCTION__, -+ 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday, -+ tm->tm_hour, tm->tm_min, tm->tm_sec); -+ -+ return 0; -+} -+ -+/* -+ * Set current time and date in RTC -+ */ -+static int at91_rtc_settime(struct device *dev, struct rtc_time *tm) -+{ -+ unsigned long cr; -+ -+ pr_debug("%s(): %4d-%02d-%02d %02d:%02d:%02d\n", __FUNCTION__, -+ 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday, -+ tm->tm_hour, tm->tm_min, tm->tm_sec); -+ -+ /* Stop Time/Calendar from counting */ -+ cr = at91_sys_read(AT91_RTC_CR); -+ at91_sys_write(AT91_RTC_CR, cr | AT91_RTC_UPDCAL | AT91_RTC_UPDTIM); -+ -+ at91_sys_write(AT91_RTC_IER, AT91_RTC_ACKUPD); -+ wait_for_completion(&at91_rtc_updated); /* wait for ACKUPD interrupt */ -+ at91_sys_write(AT91_RTC_IDR, AT91_RTC_ACKUPD); -+ -+ at91_sys_write(AT91_RTC_TIMR, -+ BIN2BCD(tm->tm_sec) << 0 -+ | BIN2BCD(tm->tm_min) << 8 -+ | BIN2BCD(tm->tm_hour) << 16); -+ -+ at91_sys_write(AT91_RTC_CALR, -+ BIN2BCD((tm->tm_year + 1900) / 100) /* century */ -+ | BIN2BCD(tm->tm_year % 100) << 8 /* year */ -+ | BIN2BCD(tm->tm_mon + 1) << 16 /* tm_mon starts at zero */ -+ | BIN2BCD(tm->tm_wday + 1) << 21 /* day of the week [0-6], Sunday=0 */ -+ | BIN2BCD(tm->tm_mday) << 24); -+ -+ /* Restart Time/Calendar */ -+ cr = at91_sys_read(AT91_RTC_CR); -+ at91_sys_write(AT91_RTC_CR, cr & ~(AT91_RTC_UPDCAL | AT91_RTC_UPDTIM)); -+ -+ return 0; -+} -+ -+/* -+ * Read alarm time and date in RTC -+ */ -+static int at91_rtc_readalarm(struct device *dev, struct rtc_wkalrm *alrm) -+{ -+ struct rtc_time *tm = &alrm->time; -+ -+ at91_rtc_decodetime(AT91_RTC_TIMALR, AT91_RTC_CALALR, tm); -+ tm->tm_yday = rtc_year_days(tm->tm_mday, tm->tm_mon, tm->tm_year); -+ tm->tm_year = at91_alarm_year - 1900; -+ -+ pr_debug("%s(): %4d-%02d-%02d %02d:%02d:%02d\n", __FUNCTION__, -+ 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday, -+ tm->tm_hour, tm->tm_min, tm->tm_sec); -+ -+ return 0; -+} -+ -+/* -+ * Set alarm time and date in RTC -+ */ -+static int at91_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm) -+{ -+ struct rtc_time tm; -+ -+ at91_rtc_decodetime(AT91_RTC_TIMR, AT91_RTC_CALR, &tm); -+ -+ at91_alarm_year = tm.tm_year; -+ -+ tm.tm_hour = alrm->time.tm_hour; -+ tm.tm_min = alrm->time.tm_min; -+ tm.tm_sec = alrm->time.tm_sec; -+ -+ at91_sys_write(AT91_RTC_TIMALR, -+ BIN2BCD(tm.tm_sec) << 0 -+ | BIN2BCD(tm.tm_min) << 8 -+ | BIN2BCD(tm.tm_hour) << 16 -+ | AT91_RTC_HOUREN | AT91_RTC_MINEN | AT91_RTC_SECEN); -+ at91_sys_write(AT91_RTC_CALALR, -+ BIN2BCD(tm.tm_mon + 1) << 16 /* tm_mon starts at zero */ -+ | BIN2BCD(tm.tm_mday) << 24 -+ | AT91_RTC_DATEEN | AT91_RTC_MTHEN); -+ -+ pr_debug("%s(): %4d-%02d-%02d %02d:%02d:%02d\n", __FUNCTION__, -+ at91_alarm_year, tm.tm_mon, tm.tm_mday, tm.tm_hour, -+ tm.tm_min, tm.tm_sec); -+ -+ return 0; -+} -+ -+/* -+ * Handle commands from user-space -+ */ -+static int at91_rtc_ioctl(struct device *dev, unsigned int cmd, -+ unsigned long arg) -+{ -+ int ret = 0; -+ -+ pr_debug("%s(): cmd=%08x, arg=%08lx.\n", __FUNCTION__, cmd, arg); -+ -+ switch (cmd) { -+ case RTC_AIE_OFF: /* alarm off */ -+ at91_sys_write(AT91_RTC_IDR, AT91_RTC_ALARM); -+ break; -+ case RTC_AIE_ON: /* alarm on */ -+ at91_sys_write(AT91_RTC_IER, AT91_RTC_ALARM); -+ break; -+ case RTC_UIE_OFF: /* update off */ -+ case RTC_PIE_OFF: /* periodic off */ -+ at91_sys_write(AT91_RTC_IDR, AT91_RTC_SECEV); -+ break; -+ case RTC_UIE_ON: /* update on */ -+ case RTC_PIE_ON: /* periodic on */ -+ at91_sys_write(AT91_RTC_IER, AT91_RTC_SECEV); -+ break; -+ case RTC_IRQP_READ: /* read periodic alarm frequency */ -+ ret = put_user(AT91_RTC_FREQ, (unsigned long *) arg); -+ break; -+ case RTC_IRQP_SET: /* set periodic alarm frequency */ -+ if (arg != AT91_RTC_FREQ) -+ ret = -EINVAL; -+ break; -+ default: -+ ret = -ENOIOCTLCMD; -+ break; -+ } -+ -+ return ret; -+} -+ -+/* -+ * Provide additional RTC information in /proc/driver/rtc -+ */ -+static int at91_rtc_proc(struct device *dev, struct seq_file *seq) -+{ -+ unsigned long imr = at91_sys_read(AT91_RTC_IMR); -+ -+ seq_printf(seq, "alarm_IRQ\t: %s\n", -+ (imr & AT91_RTC_ALARM) ? "yes" : "no"); -+ seq_printf(seq, "update_IRQ\t: %s\n", -+ (imr & AT91_RTC_ACKUPD) ? "yes" : "no"); -+ seq_printf(seq, "periodic_IRQ\t: %s\n", -+ (imr & AT91_RTC_SECEV) ? "yes" : "no"); -+ seq_printf(seq, "periodic_freq\t: %ld\n", -+ (unsigned long) AT91_RTC_FREQ); -+ -+ return 0; -+} -+ -+/* -+ * IRQ handler for the RTC -+ */ -+static irqreturn_t at91_rtc_interrupt(int irq, void *dev_id) -+{ -+ struct platform_device *pdev = dev_id; -+ struct rtc_device *rtc = platform_get_drvdata(pdev); -+ unsigned int rtsr; -+ unsigned long events = 0; -+ -+ rtsr = at91_sys_read(AT91_RTC_SR) & at91_sys_read(AT91_RTC_IMR); -+ if (rtsr) { /* this interrupt is shared! Is it ours? */ -+ if (rtsr & AT91_RTC_ALARM) -+ events |= (RTC_AF | RTC_IRQF); -+ if (rtsr & AT91_RTC_SECEV) -+ events |= (RTC_UF | RTC_IRQF); -+ if (rtsr & AT91_RTC_ACKUPD) -+ complete(&at91_rtc_updated); -+ -+ at91_sys_write(AT91_RTC_SCCR, rtsr); /* clear status reg */ -+ -+ rtc_update_irq(&rtc->class_dev, 1, events); -+ -+ pr_debug("%s(): num=%ld, events=0x%02lx\n", __FUNCTION__, -+ events >> 8, events & 0x000000FF); -+ -+ return IRQ_HANDLED; -+ } -+ return IRQ_NONE; /* not handled */ -+} -+ -+static const struct rtc_class_ops at91_rtc_ops = { -+ .ioctl = at91_rtc_ioctl, -+ .read_time = at91_rtc_readtime, -+ .set_time = at91_rtc_settime, -+ .read_alarm = at91_rtc_readalarm, -+ .set_alarm = at91_rtc_setalarm, -+ .proc = at91_rtc_proc, -+}; -+ -+/* -+ * Initialize and install RTC driver -+ */ -+static int __init at91_rtc_probe(struct platform_device *pdev) -+{ -+ struct rtc_device *rtc; -+ int ret; -+ -+ at91_sys_write(AT91_RTC_CR, 0); -+ at91_sys_write(AT91_RTC_MR, 0); /* 24 hour mode */ -+ -+ /* Disable all interrupts */ -+ at91_sys_write(AT91_RTC_IDR, AT91_RTC_ACKUPD | AT91_RTC_ALARM | -+ AT91_RTC_SECEV | AT91_RTC_TIMEV | -+ AT91_RTC_CALEV); -+ -+ ret = request_irq(AT91_ID_SYS, at91_rtc_interrupt, -+ IRQF_DISABLED | IRQF_SHARED, -+ "at91_rtc", pdev); -+ if (ret) { -+ printk(KERN_ERR "at91_rtc: IRQ %d already in use.\n", -+ AT91_ID_SYS); -+ return ret; -+ } -+ -+ rtc = rtc_device_register(pdev->name, &pdev->dev, -+ &at91_rtc_ops, THIS_MODULE); -+ if (IS_ERR(rtc)) { -+ free_irq(AT91_ID_SYS, pdev); -+ return PTR_ERR(rtc); -+ } -+ platform_set_drvdata(pdev, rtc); -+ device_init_wakeup(&pdev->dev, 1); -+ -+ printk(KERN_INFO "AT91 Real Time Clock driver.\n"); -+ return 0; -+} -+ -+/* -+ * Disable and remove the RTC driver -+ */ -+static int __devexit at91_rtc_remove(struct platform_device *pdev) -+{ -+ struct rtc_device *rtc = platform_get_drvdata(pdev); -+ -+ /* Disable all interrupts */ -+ at91_sys_write(AT91_RTC_IDR, AT91_RTC_ACKUPD | AT91_RTC_ALARM | -+ AT91_RTC_SECEV | AT91_RTC_TIMEV | -+ AT91_RTC_CALEV); -+ free_irq(AT91_ID_SYS, pdev); -+ -+ rtc_device_unregister(rtc); -+ platform_set_drvdata(pdev, NULL); -+ device_init_wakeup(&pdev->dev, 0); -+ -+ return 0; -+} -+ -+#ifdef CONFIG_PM -+ -+/* AT91RM9200 RTC Power management control */ -+ -+static struct timespec at91_rtc_delta; -+static u32 at91_rtc_imr; -+ -+static int at91_rtc_suspend(struct platform_device *pdev, pm_message_t state) -+{ -+ struct rtc_time tm; -+ struct timespec time; -+ -+ time.tv_nsec = 0; -+ -+ /* calculate time delta for suspend */ -+ at91_rtc_readtime(&pdev->dev, &tm); -+ rtc_tm_to_time(&tm, &time.tv_sec); -+ save_time_delta(&at91_rtc_delta, &time); -+ -+ /* this IRQ is shared with DBGU and other hardware which isn't -+ * necessarily doing PM like we are... -+ */ -+ at91_rtc_imr = at91_sys_read(AT91_RTC_IMR) -+ & (AT91_RTC_ALARM|AT91_RTC_SECEV); -+ if (at91_rtc_imr) { -+ if (device_may_wakeup(&pdev->dev)) -+ enable_irq_wake(AT91_ID_SYS); -+ else -+ at91_sys_write(AT91_RTC_IDR, at91_rtc_imr); -+ } -+ -+ pr_debug("%s(): %4d-%02d-%02d %02d:%02d:%02d\n", __FUNCTION__, -+ 1900 + tm.tm_year, tm.tm_mon, tm.tm_mday, -+ tm.tm_hour, tm.tm_min, tm.tm_sec); -+ -+ return 0; -+} -+ -+static int at91_rtc_resume(struct platform_device *pdev) -+{ -+ struct rtc_time tm; -+ struct timespec time; -+ -+ time.tv_nsec = 0; -+ -+ at91_rtc_readtime(&pdev->dev, &tm); -+ rtc_tm_to_time(&tm, &time.tv_sec); -+ restore_time_delta(&at91_rtc_delta, &time); -+ -+ if (at91_rtc_imr) { -+ if (device_may_wakeup(&pdev->dev)) -+ disable_irq_wake(AT91_ID_SYS); -+ else -+ at91_sys_write(AT91_RTC_IER, at91_rtc_imr); -+ } -+ -+ pr_debug("%s(): %4d-%02d-%02d %02d:%02d:%02d\n", __FUNCTION__, -+ 1900 + tm.tm_year, tm.tm_mon, tm.tm_mday, -+ tm.tm_hour, tm.tm_min, tm.tm_sec); -+ -+ return 0; -+} -+#else -+#define at91_rtc_suspend NULL -+#define at91_rtc_resume NULL -+#endif -+ -+static struct platform_driver at91_rtc_driver = { -+ .probe = at91_rtc_probe, -+ .remove = at91_rtc_remove, -+ .suspend = at91_rtc_suspend, -+ .resume = at91_rtc_resume, -+ .driver = { -+ .name = "at91_rtc", -+ .owner = THIS_MODULE, -+ }, -+}; -+ -+static int __init at91_rtc_init(void) -+{ -+ return platform_driver_register(&at91_rtc_driver); -+} -+ -+static void __exit at91_rtc_exit(void) -+{ -+ platform_driver_unregister(&at91_rtc_driver); -+} -+ -+module_init(at91_rtc_init); -+module_exit(at91_rtc_exit); -+ -+MODULE_AUTHOR("Rick Bronson"); -+MODULE_DESCRIPTION("RTC driver for Atmel AT91RM9200"); -+MODULE_LICENSE("GPL"); -diff -urN -x CVS linux-2.6.19-final/drivers/serial/atmel_serial.c linux-2.6.19/drivers/serial/atmel_serial.c ---- linux-2.6.19-final/drivers/serial/atmel_serial.c Mon Dec 4 16:40:48 2006 -+++ linux-2.6.19/drivers/serial/atmel_serial.c Fri Nov 10 09:17:31 2006 -@@ -1,5 +1,5 @@ - /* -- * linux/drivers/char/at91_serial.c -+ * linux/drivers/char/atmel_serial.c - * - * Driver for Atmel AT91 / AT32 Serial ports - * Copyright (C) 2003 Rick Bronson +diff -urN -x CVS linux-2.6.21/drivers/serial/atmel_serial.c linux-2.6-stable/drivers/serial/atmel_serial.c +--- linux-2.6.21/drivers/serial/atmel_serial.c Thu Apr 26 05:08:32 2007 ++++ linux-2.6-stable/drivers/serial/atmel_serial.c Tue May 8 12:13:31 2007 @@ -7,6 +7,8 @@ * Based on drivers/char/serial_sa1100.c, by Deep Blue Solutions Ltd. * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o. @@ -12984,27 +6496,19 @@ diff -urN -x CVS linux-2.6.19-final/drivers/serial/atmel_serial.c linux-2.6.19/d * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or -@@ -33,19 +35,25 @@ +@@ -33,6 +35,7 @@ #include <linux/sysrq.h> #include <linux/tty_flip.h> #include <linux/platform_device.h> +#include <linux/dma-mapping.h> + #include <linux/atmel_pdc.h> #include <asm/io.h> - --#include <asm/arch/at91rm9200_pdc.h> - #include <asm/mach/serial_at91.h> - #include <asm/arch/board.h> -+#include <asm/arch/at91_pdc.h> - #ifdef CONFIG_ARM --#include <asm/arch/system.h> -+#include <asm/arch/cpu.h> - #include <asm/arch/gpio.h> - #endif +@@ -47,6 +50,11 @@ #include "atmel_serial.h" -+#define SUPPORT_PDC ++#define SUPPORT_PDC +#define PDC_BUFFER_SIZE (L1_CACHE_BYTES << 3) +#warning "Revisit" +#define PDC_RX_TIMEOUT (3 * 10) /* 3 bytes */ @@ -13012,36 +6516,7 @@ diff -urN -x CVS linux-2.6.19-final/drivers/serial/atmel_serial.c linux-2.6.19/d #if defined(CONFIG_SERIAL_ATMEL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) #define SUPPORT_SYSRQ #endif -@@ -89,23 +97,30 @@ - // #define UART_GET_CR(port) readl((port)->membase + ATMEL_US_CR) // is write-only - - /* PDC registers */ --#define UART_PUT_PTCR(port,v) writel(v, (port)->membase + ATMEL_PDC_PTCR) --#define UART_GET_PTSR(port) readl((port)->membase + ATMEL_PDC_PTSR) -+#define UART_PUT_PTCR(port,v) writel(v, (port)->membase + AT91_PDC_PTCR) -+#define UART_GET_PTSR(port) readl((port)->membase + AT91_PDC_PTSR) - --#define UART_PUT_RPR(port,v) writel(v, (port)->membase + ATMEL_PDC_RPR) --#define UART_GET_RPR(port) readl((port)->membase + ATMEL_PDC_RPR) --#define UART_PUT_RCR(port,v) writel(v, (port)->membase + ATMEL_PDC_RCR) --#define UART_PUT_RNPR(port,v) writel(v, (port)->membase + ATMEL_PDC_RNPR) --#define UART_PUT_RNCR(port,v) writel(v, (port)->membase + ATMEL_PDC_RNCR) -- --#define UART_PUT_TPR(port,v) writel(v, (port)->membase + ATMEL_PDC_TPR) --#define UART_PUT_TCR(port,v) writel(v, (port)->membase + ATMEL_PDC_TCR) --//#define UART_PUT_TNPR(port,v) writel(v, (port)->membase + ATMEL_PDC_TNPR) --//#define UART_PUT_TNCR(port,v) writel(v, (port)->membase + ATMEL_PDC_TNCR) -+#define UART_PUT_RPR(port,v) writel(v, (port)->membase + AT91_PDC_RPR) -+#define UART_GET_RPR(port) readl((port)->membase + AT91_PDC_RPR) -+#define UART_PUT_RCR(port,v) writel(v, (port)->membase + AT91_PDC_RCR) -+#define UART_PUT_RNPR(port,v) writel(v, (port)->membase + AT91_PDC_RNPR) -+#define UART_PUT_RNCR(port,v) writel(v, (port)->membase + AT91_PDC_RNCR) -+ -+#define UART_PUT_TPR(port,v) writel(v, (port)->membase + AT91_PDC_TPR) -+#define UART_PUT_TCR(port,v) writel(v, (port)->membase + AT91_PDC_TCR) -+//#define UART_PUT_TNPR(port,v) writel(v, (port)->membase + AT91_PDC_TNPR) -+//#define UART_PUT_TNCR(port,v) writel(v, (port)->membase + AT91_PDC_TNCR) - +@@ -107,6 +115,13 @@ static int (*atmel_open_hook)(struct uart_port *); static void (*atmel_close_hook)(struct uart_port *); @@ -13055,7 +6530,7 @@ diff -urN -x CVS linux-2.6.19-final/drivers/serial/atmel_serial.c linux-2.6.19/d /* * We wrap our port structure around the generic uart_port. */ -@@ -113,10 +128,20 @@ +@@ -114,10 +129,20 @@ struct uart_port uart; /* uart */ struct clk *clk; /* uart clock */ unsigned short suspended; /* is port suspended? */ @@ -13076,24 +6551,13 @@ diff -urN -x CVS linux-2.6.19-final/drivers/serial/atmel_serial.c linux-2.6.19/d #ifdef SUPPORT_SYSRQ static struct console atmel_console; #endif -@@ -137,8 +162,8 @@ - unsigned int control = 0; - unsigned int mode; - --#ifdef CONFIG_ARM -- if (arch_identify() == ARCH_ID_AT91RM9200) { -+#ifdef CONFIG_ARCH_AT91RM9200 -+ if (cpu_is_at91rm9200()) { - /* - * AT91RM9200 Errata #39: RTS0 is not internally connected to PA21. - * We need to drive the pin manually. -@@ -204,7 +229,12 @@ +@@ -205,7 +230,12 @@ { struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port; - UART_PUT_IDR(port, ATMEL_US_TXRDY); + if (atmel_port->use_dma_tx) { -+ UART_PUT_PTCR(port, AT91_PDC_TXTDIS); /* disable PDC transmit */ ++ UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS); /* disable PDC transmit */ + UART_PUT_IDR(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE); + } + else @@ -13101,32 +6565,32 @@ diff -urN -x CVS linux-2.6.19-final/drivers/serial/atmel_serial.c linux-2.6.19/d } /* -@@ -214,7 +244,17 @@ +@@ -215,7 +245,17 @@ { struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port; - UART_PUT_IER(port, ATMEL_US_TXRDY); + if (atmel_port->use_dma_tx) { -+ if (UART_GET_PTSR(port) & AT91_PDC_TXTEN) ++ if (UART_GET_PTSR(port) & ATMEL_PDC_TXTEN) + /* The transmitter is already running. Yes, we + really need this.*/ + return; + + UART_PUT_IER(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE); -+ UART_PUT_PTCR(port, AT91_PDC_TXTEN); /* re-enable PDC transmit */ ++ UART_PUT_PTCR(port, ATMEL_PDC_TXTEN); /* re-enable PDC transmit */ + } + else + UART_PUT_IER(port, ATMEL_US_TXRDY); } /* -@@ -224,7 +264,12 @@ +@@ -225,7 +265,12 @@ { struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port; - UART_PUT_IDR(port, ATMEL_US_RXRDY); + if (atmel_port->use_dma_rx) { -+ UART_PUT_PTCR(port, AT91_PDC_RXTDIS); /* disable PDC receive */ ++ UART_PUT_PTCR(port, ATMEL_PDC_RXTDIS); /* disable PDC receive */ + UART_PUT_IDR(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT); + } + else @@ -13134,13 +6598,13 @@ diff -urN -x CVS linux-2.6.19-final/drivers/serial/atmel_serial.c linux-2.6.19/d } /* -@@ -247,6 +292,134 @@ +@@ -248,6 +293,134 @@ } /* + * Receive data via the PDC. A buffer has been fulled. + */ -+static void at91_pdc_endrx(struct uart_port *port) ++static void atmel_pdc_endrx(struct uart_port *port) +{ + struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port; + struct tty_struct *tty = port->info->tty; @@ -13169,7 +6633,7 @@ diff -urN -x CVS linux-2.6.19-final/drivers/serial/atmel_serial.c linux-2.6.19/d + * Receive data via the PDC. At least one byte was received, but the + * buffer was not full when the inter-character timeout expired. + */ -+static void at91_pdc_timeout(struct uart_port *port) ++static void atmel_pdc_timeout(struct uart_port *port) +{ + struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port; + struct tty_struct *tty = port->info->tty; @@ -13195,7 +6659,7 @@ diff -urN -x CVS linux-2.6.19-final/drivers/serial/atmel_serial.c linux-2.6.19/d +/* + * Deal with parity, framing and overrun errors. + */ -+static void at91_pdc_rxerr(struct uart_port *port, unsigned int status) ++static void atmel_pdc_rxerr(struct uart_port *port, unsigned int status) +{ + /* clear error */ + UART_PUT_CR(port, ATMEL_US_RSTSTA); @@ -13215,7 +6679,7 @@ diff -urN -x CVS linux-2.6.19-final/drivers/serial/atmel_serial.c linux-2.6.19/d +/* + * A transmission via the PDC is complete. + */ -+static void at91_pdc_endtx(struct uart_port *port) ++static void atmel_pdc_endtx(struct uart_port *port) +{ + struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port; + struct circ_buf *xmit = &port->info->xmit; @@ -13236,7 +6700,7 @@ diff -urN -x CVS linux-2.6.19-final/drivers/serial/atmel_serial.c linux-2.6.19/d + * The PDC transmitter is idle, so either start the next transfer or + * disable the transmitter. + */ -+static void at91_pdc_txbufe(struct uart_port *port) ++static void atmel_pdc_txbufe(struct uart_port *port) +{ + struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port; + struct circ_buf *xmit = &port->info->xmit; @@ -13245,7 +6709,7 @@ diff -urN -x CVS linux-2.6.19-final/drivers/serial/atmel_serial.c linux-2.6.19/d + + if (!uart_circ_empty(xmit)) { + /* more to transmit - setup next transfer */ -+ UART_PUT_PTCR(port, AT91_PDC_TXTDIS); /* disable PDC transmit */ ++ UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS); /* disable PDC transmit */ + dma_sync_single_for_device(port->dev, pdc->dma_addr, pdc->dma_size, DMA_TO_DEVICE); + + if (xmit->tail < xmit->head) @@ -13256,11 +6720,11 @@ diff -urN -x CVS linux-2.6.19-final/drivers/serial/atmel_serial.c linux-2.6.19/d + + UART_PUT_TPR(port, pdc->dma_addr + xmit->tail); + UART_PUT_TCR(port, count); -+ UART_PUT_PTCR(port, AT91_PDC_TXTEN); /* re-enable PDC transmit */ ++ UART_PUT_PTCR(port, ATMEL_PDC_TXTEN); /* re-enable PDC transmit */ + } + else { + /* nothing left to transmit - disable the transmitter */ -+ UART_PUT_PTCR(port, AT91_PDC_TXTDIS); /* disable PDC transmit */ ++ UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS); /* disable PDC transmit */ + UART_PUT_IDR(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE); + } +} @@ -13269,39 +6733,38 @@ diff -urN -x CVS linux-2.6.19-final/drivers/serial/atmel_serial.c linux-2.6.19/d * Characters received (called from interrupt handler) */ static void atmel_rx_chars(struct uart_port *port) -@@ -348,6 +521,14 @@ +@@ -349,6 +522,14 @@ status = UART_GET_CSR(port); pending = status & UART_GET_IMR(port); while (pending) { + /* PDC receive */ + if (pending & ATMEL_US_ENDRX) -+ at91_pdc_endrx(port); ++ atmel_pdc_endrx(port); + if (pending & ATMEL_US_TIMEOUT) -+ at91_pdc_timeout(port); ++ atmel_pdc_timeout(port); + if (atmel_port->use_dma_rx && pending & (ATMEL_US_RXBRK | ATMEL_US_OVRE | ATMEL_US_FRAME | ATMEL_US_PARE)) -+ at91_pdc_rxerr(port, pending); ++ atmel_pdc_rxerr(port, pending); + /* Interrupt receive */ if (pending & ATMEL_US_RXRDY) atmel_rx_chars(port); -@@ -362,6 +543,12 @@ +@@ -363,6 +544,12 @@ if (pending & (ATMEL_US_RIIC | ATMEL_US_DSRIC | ATMEL_US_DCDIC | ATMEL_US_CTSIC)) wake_up_interruptible(&port->info->delta_msr_wait); + /* PDC transmit */ + if (pending & ATMEL_US_ENDTX) -+ at91_pdc_endtx(port); ++ atmel_pdc_endtx(port); + if (pending & ATMEL_US_TXBUFE) -+ at91_pdc_txbufe(port); ++ atmel_pdc_txbufe(port); + /* Interrupt transmit */ if (pending & ATMEL_US_TXRDY) atmel_tx_chars(port); -@@ -399,6 +586,47 @@ - return retval; +@@ -401,6 +588,47 @@ } -+ /* + /* + * Initialize DMA (if necessary) + */ + if (atmel_port->use_dma_rx) { @@ -13342,10 +6805,11 @@ diff -urN -x CVS linux-2.6.19-final/drivers/serial/atmel_serial.c linux-2.6.19/d + pdc->ofs = 0; + } + - /* ++ /* * If there is a specific "open" function (to register * control line interrupts) -@@ -417,7 +645,15 @@ + */ +@@ -418,7 +646,15 @@ UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX); UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN); /* enable xmit & rcvr */ @@ -13355,17 +6819,23 @@ diff -urN -x CVS linux-2.6.19-final/drivers/serial/atmel_serial.c linux-2.6.19/d + UART_PUT_CR(port, ATMEL_US_STTTO); + + UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT); -+ UART_PUT_PTCR(port, AT91_PDC_RXTEN); /* enable PDC controller */ ++ UART_PUT_PTCR(port, ATMEL_PDC_RXTEN); /* enable PDC controller */ + } + else + UART_PUT_IER(port, ATMEL_US_RXRDY); /* enable receive only */ return 0; } -@@ -430,6 +666,25 @@ +@@ -431,6 +667,31 @@ struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port; /* ++ * Ensure everything is stopped. ++ */ ++ atmel_stop_rx(port); ++ atmel_stop_tx(port); ++ ++ /* + * Shut-down the DMA. + */ + if (atmel_port->use_dma_rx) { @@ -13388,15 +6858,30 @@ diff -urN -x CVS linux-2.6.19-final/drivers/serial/atmel_serial.c linux-2.6.19/d * Disable all interrupts, port and break condition. */ UART_PUT_CR(port, ATMEL_US_RSTSTA); -@@ -480,6 +735,7 @@ +@@ -481,14 +742,20 @@ */ - static void atmel_set_termios(struct uart_port *port, struct termios * termios, struct termios * old) + static void atmel_set_termios(struct uart_port *port, struct ktermios * termios, struct ktermios * old) { + struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port; unsigned long flags; unsigned int mode, imr, quot, baud; -@@ -533,6 +789,9 @@ ++ /* Get current mode register */ ++ mode = UART_GET_MR(port) & ~(ATMEL_US_USCLKS | ATMEL_US_CHRL | ATMEL_US_NBSTOP | ATMEL_US_PAR); ++ + baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16); + quot = uart_get_divisor(port, baud); + +- /* Get current mode register */ +- mode = UART_GET_MR(port) & ~(ATMEL_US_CHRL | ATMEL_US_NBSTOP | ATMEL_US_PAR); ++ if (quot > 65535) { /* BRGR is 16-bit, so switch to slower clock */ ++ quot /= 8; ++ mode |= ATMEL_US_USCLKS_MCK_DIV8; ++ } + + /* byte size */ + switch (termios->c_cflag & CSIZE) { +@@ -534,6 +801,9 @@ if (termios->c_iflag & (BRKINT | PARMRK)) port->read_status_mask |= ATMEL_US_RXBRK; @@ -13406,7 +6891,7 @@ diff -urN -x CVS linux-2.6.19-final/drivers/serial/atmel_serial.c linux-2.6.19/d /* * Characters to ignore */ -@@ -711,6 +970,11 @@ +@@ -712,6 +982,13 @@ clk_enable(atmel_port->clk); port->uartclk = clk_get_rate(atmel_port->clk); } @@ -13414,881 +6899,85 @@ diff -urN -x CVS linux-2.6.19-final/drivers/serial/atmel_serial.c linux-2.6.19/d +#ifdef SUPPORT_PDC + atmel_port->use_dma_rx = data->use_dma_rx; + atmel_port->use_dma_tx = data->use_dma_tx; ++ if (atmel_port->use_dma_tx) ++ port->fifosize = PDC_BUFFER_SIZE; +#endif } /* -diff -urN -x CVS linux-2.6.19-final/drivers/serial/atmel_serial.h linux-2.6.19/drivers/serial/atmel_serial.h ---- linux-2.6.19-final/drivers/serial/atmel_serial.h Mon Dec 4 16:40:48 2006 -+++ linux-2.6.19/drivers/serial/atmel_serial.h Wed Nov 8 12:29:58 2006 -@@ -31,8 +31,8 @@ - #define ATMEL_US_RSTIT (1 << 13) /* Reset Iterations */ - #define ATMEL_US_RSTNACK (1 << 14) /* Reset Non Acknowledge */ - #define ATMEL_US_RETTO (1 << 15) /* Rearm Time-out */ --#define ATMEL_US_DTREN (1 << 16) /* Data Terminal Ready Enable */ --#define ATMEL_US_DTRDIS (1 << 17) /* Data Terminal Ready Disable */ -+#define ATMEL_US_DTREN (1 << 16) /* Data Terminal Ready Enable [AT91RM9200 only] */ -+#define ATMEL_US_DTRDIS (1 << 17) /* Data Terminal Ready Disable [AT91RM9200 only] */ - #define ATMEL_US_RTSEN (1 << 18) /* Request To Send Enable */ - #define ATMEL_US_RTSDIS (1 << 19) /* Request To Send Disable */ - -@@ -92,9 +92,9 @@ - #define ATMEL_US_TXBUFE (1 << 11) /* Transmission Buffer Empty */ - #define ATMEL_US_RXBUFF (1 << 12) /* Reception Buffer Full */ - #define ATMEL_US_NACK (1 << 13) /* Non Acknowledge */ --#define ATMEL_US_RIIC (1 << 16) /* Ring Indicator Input Change */ --#define ATMEL_US_DSRIC (1 << 17) /* Data Set Ready Input Change */ --#define ATMEL_US_DCDIC (1 << 18) /* Data Carrier Detect Input Change */ -+#define ATMEL_US_RIIC (1 << 16) /* Ring Indicator Input Change [AT91RM9200 only] */ -+#define ATMEL_US_DSRIC (1 << 17) /* Data Set Ready Input Change [AT91RM9200 only] */ -+#define ATMEL_US_DCDIC (1 << 18) /* Data Carrier Detect Input Change [AT91RM9200 only] */ - #define ATMEL_US_CTSIC (1 << 19) /* Clear to Send Input Change */ - #define ATMEL_US_RI (1 << 20) /* RI */ - #define ATMEL_US_DSR (1 << 21) /* DSR */ -@@ -106,6 +106,7 @@ - #define ATMEL_US_CSR 0x14 /* Channel Status Register */ - #define ATMEL_US_RHR 0x18 /* Receiver Holding Register */ - #define ATMEL_US_THR 0x1c /* Transmitter Holding Register */ -+#define ATMEL_US_SYNH (1 << 15) /* Transmit/Receive Sync [AT91SAM9261 only] */ - - #define ATMEL_US_BRGR 0x20 /* Baud Rate Generator Register */ - #define ATMEL_US_CD (0xffff << 0) /* Clock Divider */ -diff -urN -x CVS linux-2.6.19-final/drivers/spi/Kconfig linux-2.6.19/drivers/spi/Kconfig ---- linux-2.6.19-final/drivers/spi/Kconfig Mon Dec 4 16:29:01 2006 -+++ linux-2.6.19/drivers/spi/Kconfig Wed Nov 15 14:54:04 2006 -@@ -51,6 +51,13 @@ - comment "SPI Master Controller Drivers" - depends on SPI_MASTER +@@ -888,7 +1165,8 @@ + struct uart_port *port = platform_get_drvdata(pdev); + struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port; -+config SPI_ATMEL -+ tristate "Atmel SPI Controller" -+ depends on (ARCH_AT91 || AVR32) && SPI_MASTER -+ help -+ This selects a driver for the Atmel SPI Controller, present on -+ many AT32 (AVR32) and AT91 (ARM) chips. -+ - config SPI_BITBANG - tristate "Bitbanging SPI master" - depends on SPI_MASTER && EXPERIMENTAL -@@ -75,6 +82,25 @@ +- if (device_may_wakeup(&pdev->dev) && !at91_suspend_entering_slow_clock()) ++ if (device_may_wakeup(&pdev->dev) ++ && !clk_must_disable(atmel_port->clk)) + enable_irq_wake(port->irq); + else { + uart_suspend_port(&atmel_uart, port); +diff -urN -x CVS linux-2.6.21/drivers/serial/atmel_serial.h linux-2.6-stable/drivers/serial/atmel_serial.h +--- linux-2.6.21/drivers/serial/atmel_serial.h Thu Apr 26 05:08:32 2007 ++++ linux-2.6-stable/drivers/serial/atmel_serial.h Tue May 8 12:13:31 2007 +@@ -46,6 +46,9 @@ + #define ATMEL_US_USMODE_ISO7816_T1 6 + #define ATMEL_US_USMODE_IRDA 8 + #define ATMEL_US_USCLKS (3 << 4) /* Clock Selection */ ++#define ATMEL_US_USCLKS_MCK (0 << 4) ++#define ATMEL_US_USCLKS_MCK_DIV8 (1 << 4) ++#define ATMEL_US_USCLKS_SCK (3 << 4) + #define ATMEL_US_CHRL (3 << 6) /* Character Length */ + #define ATMEL_US_CHRL_5 (0 << 6) + #define ATMEL_US_CHRL_6 (1 << 6) +diff -urN -x CVS linux-2.6.21/drivers/spi/Kconfig linux-2.6-stable/drivers/spi/Kconfig +--- linux-2.6.21/drivers/spi/Kconfig Thu Apr 26 05:08:32 2007 ++++ linux-2.6-stable/drivers/spi/Kconfig Tue May 8 14:31:24 2007 +@@ -54,6 +54,7 @@ + config SPI_ATMEL + tristate "Atmel SPI Controller" + depends on (ARCH_AT91 || AVR32) && SPI_MASTER ++ select SPI_AT91_MANUAL_CS if ARCH_AT91RM9200 + help + This selects a driver for the Atmel SPI Controller, present on + many AT32 (AVR32) and AT91 (ARM) chips. +@@ -82,6 +83,24 @@ inexpensive battery powered microcontroller evaluation board. This same cable can be used to flash new firmware. +config SPI_AT91 -+ tristate "AT91 SPI Master" -+ depends on SPI_MASTER && ARCH_AT91 && !SPI_ATMEL && EXPERIMENTAL ++ tristate "AT91RM9200 Bitbang SPI Master" ++ depends on SPI_MASTER && ARCH_AT91RM9200 && !SPI_ATMEL && EXPERIMENTAL + select SPI_BITBANG + select SPI_AT91_MANUAL_CS + help -+ This is dumb PIO bitbanging driver for the Atmel -+ AT91RM9200 and AT91SAM926x processors. -+ (Someone should provide a drop-in replacemnt of this code, -+ using the native SPI hardware and its DMA controller). ++ This is dumb PIO bitbanging driver for the Atmel AT91RM9200. ++ The SPI_ATMEL driver will be its replacement, using the native ++ SPI hardware and its DMA controller. + +config SPI_AT91_MANUAL_CS + bool + depends on ARCH_AT91RM9200 + help + Works around an AT91RM9200 problem whereby the SPI chip-select -+ will be wrongly disabled. The workaround uses those pins as ++ will be wrongly disabled. The workaround uses those pins as + GPIOs instead of letting the SPI controller manage them. + - config SPI_MPC83xx - tristate "Freescale MPC83xx SPI controller" - depends on SPI_MASTER && PPC_83xx && EXPERIMENTAL -diff -urN -x CVS linux-2.6.19-final/drivers/spi/Makefile linux-2.6.19/drivers/spi/Makefile ---- linux-2.6.19-final/drivers/spi/Makefile Mon Dec 4 16:29:01 2006 -+++ linux-2.6.19/drivers/spi/Makefile Wed Nov 15 14:54:35 2006 -@@ -17,6 +17,8 @@ + config SPI_IMX + tristate "Freescale iMX SPI controller" + depends on SPI_MASTER && ARCH_IMX && EXPERIMENTAL +diff -urN -x CVS linux-2.6.21/drivers/spi/Makefile linux-2.6-stable/drivers/spi/Makefile +--- linux-2.6.21/drivers/spi/Makefile Thu Apr 26 05:08:32 2007 ++++ linux-2.6-stable/drivers/spi/Makefile Tue May 8 14:31:24 2007 +@@ -20,6 +20,7 @@ obj-$(CONFIG_SPI_MPC83xx) += spi_mpc83xx.o obj-$(CONFIG_SPI_S3C24XX_GPIO) += spi_s3c24xx_gpio.o obj-$(CONFIG_SPI_S3C24XX) += spi_s3c24xx.o +obj-$(CONFIG_SPI_AT91) += spi_at91_bitbang.o -+obj-$(CONFIG_SPI_ATMEL) += atmel_spi.o # ... add above this line ... # SPI protocol drivers (device/link on bus) -diff -urN -x CVS linux-2.6.19-final/drivers/spi/atmel_spi.c linux-2.6.19/drivers/spi/atmel_spi.c ---- linux-2.6.19-final/drivers/spi/atmel_spi.c Thu Jan 1 02:00:00 1970 -+++ linux-2.6.19/drivers/spi/atmel_spi.c Wed Nov 22 09:22:22 2006 -@@ -0,0 +1,684 @@ -+/* -+ * Driver for Atmel AT32 and AT91 SPI Controllers -+ * -+ * Copyright (C) 2006 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+#include <linux/kernel.h> -+#include <linux/init.h> -+#include <linux/clk.h> -+#include <linux/module.h> -+#include <linux/platform_device.h> -+#include <linux/delay.h> -+#include <linux/dma-mapping.h> -+#include <linux/err.h> -+#include <linux/interrupt.h> -+#include <linux/spi/spi.h> -+ -+#include <asm/io.h> -+#include <asm/arch/board.h> -+#include <asm/arch/gpio.h> -+#include <asm/arch/at91_pdc.h> -+ -+#include "atmel_spi.h" -+ -+#define spi_readl(port, reg) __raw_readl((port)->regs + (reg)) -+#define spi_writel(port, reg, value) __raw_writel((value), (port)->regs + (reg)) -+ -+/* -+ * The core SPI transfer engine just talks to a register bank to set up -+ * DMA transfers; transfer queue progress is driven by IRQs. The clock -+ * framework provides the base clock, subdivided for each spi_device. -+ * -+ * Newer controllers, marked with "new_1" flag, have: -+ * - CR.LASTXFER -+ * - SPI_MR.DIV32 may become FDIV or must-be-zero (here: always zero) -+ * - SPI_SR.TXEMPTY, SPI_SR.NSSR (and corresponding irqs) -+ * - SPI_CSRx.CSAAT -+ * - SPI_CSRx.SBCR allows faster clocking -+ */ -+struct atmel_spi { -+ spinlock_t lock; -+ -+ void __iomem *regs; -+ int irq; -+ struct clk *clk; -+ struct platform_device *pdev; -+ unsigned new_1:1; -+ -+ u8 stopping; -+ struct list_head queue; -+ struct spi_transfer *current_transfer; -+ unsigned long remaining_bytes; -+ -+ void *buffer; -+ dma_addr_t buffer_dma; -+}; -+ -+#define BUFFER_SIZE PAGE_SIZE -+#define INVALID_DMA_ADDRESS 0xffffffff -+ -+/* -+ * TODO: We really want to use the same GPIO API on both architectures. -+ */ -+#ifdef CONFIG_ARM -+ -+static inline int request_gpio(unsigned int pin) -+{ -+ return 0; -+} -+ -+static inline void free_gpio(unsigned int pin) -+{ -+ -+} -+ -+static inline void gpio_set_value(unsigned int pin, int value) -+{ -+ at91_set_gpio_value(pin, value); -+} -+ -+static inline void gpio_set_output_enable(unsigned int pin, int enabled) -+{ -+ at91_set_gpio_output(pin, enabled); -+} -+ -+static inline void gpio_set_pullup_enable(unsigned int pin, int enabled) -+{ -+ -+} -+#endif -+ -+/* -+ * Earlier SPI controllers (e.g. on at91rm9200) have a design bug whereby -+ * they assume that spi slave device state will not change on deselect, so -+ * that automagic deselection is OK. Not so! Workaround uses nCSx pins -+ * as GPIOs; or newer controllers have CSAAT and friends. -+ * -+ * Since the CSAAT functionality is a bit weird on newer controllers -+ * as well, we use GPIO to control nCSx pins on all controllers. -+ */ -+ -+static inline void cs_activate(struct spi_device *spi) -+{ -+ unsigned gpio = (unsigned) spi->controller_data; -+ -+ dev_dbg(&spi->dev, "activate %u\n", gpio); -+ gpio_set_value(gpio, 0); -+} -+ -+static inline void cs_deactivate(struct spi_device *spi) -+{ -+ unsigned gpio = (unsigned) spi->controller_data; -+ -+ dev_dbg(&spi->dev, "DEactivate %u\n", gpio); -+ gpio_set_value(gpio, 1); -+} -+ -+/* -+ * Submit next transfer for DMA. -+ * lock is held, spi irq is blocked -+ */ -+static void atmel_spi_next_xfer(struct spi_master *master, -+ struct spi_message *msg) -+{ -+ struct atmel_spi *as = spi_master_get_devdata(master); -+ struct spi_transfer *xfer; -+ u32 imr = 0; -+ u32 len; -+ dma_addr_t tx_dma, rx_dma; -+ -+ xfer = as->current_transfer; -+ if (!xfer || as->remaining_bytes == 0) { -+ if (xfer) -+ xfer = list_entry(xfer->transfer_list.next, -+ struct spi_transfer, transfer_list); -+ else -+ xfer = list_entry(msg->transfers.next, struct spi_transfer, -+ transfer_list); -+ as->remaining_bytes = xfer->len; -+ as->current_transfer = xfer; -+ } -+ -+ len = as->remaining_bytes; -+ -+ tx_dma = xfer->tx_dma; -+ rx_dma = xfer->rx_dma; -+ -+ if (rx_dma == INVALID_DMA_ADDRESS) { -+ rx_dma = as->buffer_dma; -+ if (len > BUFFER_SIZE) -+ len = BUFFER_SIZE; -+ } -+ if (tx_dma == INVALID_DMA_ADDRESS) { -+ if (xfer->tx_buf) { -+ tx_dma = as->buffer_dma; -+ if (len > BUFFER_SIZE) -+ len = BUFFER_SIZE; -+ memcpy(as->buffer, xfer->tx_buf, len); -+ dma_sync_single_for_device(&as->pdev->dev, -+ as->buffer_dma, len, -+ DMA_TO_DEVICE); -+ } else { -+ /* Send undefined data; rx_dma is handy */ -+ tx_dma = rx_dma; -+ } -+ } -+ -+ spi_writel(as, AT91_PDC_RPR, rx_dma); -+ spi_writel(as, AT91_PDC_TPR, tx_dma); -+ -+ as->remaining_bytes -= len; -+ if (msg->spi->bits_per_word > 8) -+ len >>= 1; -+ -+ /* REVISIT: when xfer->delay_usecs == 0, the PDC "next transfer" -+ * mechanism might help avoid the IRQ latency between transfers -+ * -+ * We're also waiting for ENDRX before we start the next -+ * transfer because we need to handle some difficult timing -+ * issues otherwise. If we wait for ENDTX in one transfer and -+ * then starts waiting for ENDRX in the next, it's difficult -+ * to tell the difference between the ENDRX interrupt we're -+ * actually waiting for and the ENDRX interrupt of the -+ * previous transfer. -+ * -+ * It should be doable, though. Just not now... -+ */ -+ spi_writel(as, AT91_PDC_TNCR, 0); -+ spi_writel(as, AT91_PDC_RNCR, 0); -+ imr = ATMEL_SPI_ENDRX; -+ -+ dev_dbg(&msg->spi->dev, -+ "start xfer %p: len %u tx %p/%08x rx %p/%08x imr %08x\n", -+ xfer, xfer->len, xfer->tx_buf, xfer->tx_dma, -+ xfer->rx_buf, xfer->rx_dma, imr); -+ -+ wmb(); -+ spi_writel(as, AT91_PDC_TCR, len); -+ spi_writel(as, AT91_PDC_RCR, len); -+ spi_writel(as, AT91_PDC_PTCR, AT91_PDC_TXTEN | AT91_PDC_RXTEN); -+ spi_writel(as, ATMEL_SPI_IER, imr); -+} -+ -+static void atmel_spi_next_message(struct spi_master *master) -+{ -+ struct atmel_spi *as = spi_master_get_devdata(master); -+ struct spi_message *msg; -+ u32 mr; -+ -+ BUG_ON(as->current_transfer); -+ -+ msg = list_entry(as->queue.next, struct spi_message, queue); -+ -+ /* Select the chip */ -+ mr = spi_readl(as, ATMEL_SPI_MR) & ~ATMEL_SPI_PCS; -+ spi_writel(as, ATMEL_SPI_MR, mr | ATMEL_SPI_PCS_(msg->spi->chip_select)); -+ cs_activate(msg->spi); -+ -+ atmel_spi_next_xfer(master, msg); -+} -+ -+static void atmel_spi_dma_map_xfer(struct atmel_spi *as, -+ struct spi_transfer *xfer) -+{ -+ xfer->tx_dma = xfer->rx_dma = INVALID_DMA_ADDRESS; -+ if (!(xfer->len & (L1_CACHE_BYTES - 1))) { -+ if (xfer->tx_buf -+ && !((unsigned long)xfer->tx_buf & (L1_CACHE_BYTES - 1))) -+ xfer->tx_dma = dma_map_single(&as->pdev->dev, -+ xfer->tx_buf, -+ xfer->len, -+ DMA_TO_DEVICE); -+ if (xfer->rx_buf -+ && !((unsigned long)xfer->rx_buf & (L1_CACHE_BYTES - 1))) -+ xfer->rx_dma = dma_map_single(&as->pdev->dev, -+ xfer->rx_buf, -+ xfer->len, -+ DMA_FROM_DEVICE); -+ } -+} -+ -+static irqreturn_t -+atmel_spi_interrupt(int irq, void *dev_id) -+{ -+ struct spi_master *master = dev_id; -+ struct atmel_spi *as = spi_master_get_devdata(master); -+ struct spi_message *msg; -+ struct spi_transfer *xfer; -+ u32 status, pending, imr; -+ int ret = IRQ_NONE; -+ -+ imr = spi_readl(as, ATMEL_SPI_IMR); -+ status = spi_readl(as, ATMEL_SPI_SR); -+ pending = status & imr; -+ pr_debug("spi irq: stat %05x imr %05x pend %05x\n", status, imr, pending); -+ -+ if (pending & (ATMEL_SPI_ENDTX | ATMEL_SPI_ENDRX)) { -+ ret = IRQ_HANDLED; -+ -+ spi_writel(as, ATMEL_SPI_IDR, pending); -+ spin_lock(&as->lock); -+ -+ xfer = as->current_transfer; -+ msg = list_entry(as->queue.next, struct spi_message, queue); -+ -+ /* -+ * If the rx buffer wasn't aligned, we used a bounce -+ * buffer for the transfer. Copy the data back and -+ * make the bounce buffer ready for re-use. -+ */ -+ if (xfer->rx_buf && xfer->rx_dma == INVALID_DMA_ADDRESS) { -+ unsigned int len = xfer->len; -+ if (len > BUFFER_SIZE) -+ len = BUFFER_SIZE; -+ -+ dma_sync_single_for_cpu(&as->pdev->dev, as->buffer_dma, -+ len, DMA_FROM_DEVICE); -+ memcpy((xfer->rx_buf + xfer->len -+ - len - as->remaining_bytes), -+ as->buffer, len); -+ } -+ -+ -+ if (as->remaining_bytes == 0) { -+ msg->actual_length += xfer->len; -+ -+ if (!msg->is_dma_mapped) { -+ if (xfer->tx_dma != INVALID_DMA_ADDRESS) -+ dma_unmap_single(master->cdev.dev, -+ xfer->tx_dma, -+ xfer->len, -+ DMA_TO_DEVICE); -+ if (xfer->rx_dma != INVALID_DMA_ADDRESS) -+ dma_unmap_single(master->cdev.dev, -+ xfer->rx_dma, -+ xfer->len, -+ DMA_FROM_DEVICE); -+ } -+ -+ /* REVISIT: udelay in irq is unfriendly */ -+ if (xfer->delay_usecs) -+ udelay(xfer->delay_usecs); -+ -+ if (msg->transfers.prev == &xfer->transfer_list) { -+ -+ /* report completed message */ -+ cs_deactivate(msg->spi); -+ list_del(&msg->queue); -+ msg->status = 0; -+ -+ dev_dbg(master->cdev.dev, -+ "xfer complete: %u bytes transferred\n", -+ msg->actual_length); -+ -+ spin_unlock(&as->lock); -+ msg->complete(msg->context); -+ spin_lock(&as->lock); -+ -+ as->current_transfer = NULL; -+ -+ /* continue; complete() may have queued requests */ -+ if (list_empty(&as->queue) || as->stopping) -+ spi_writel(as, AT91_PDC_PTCR, AT91_PDC_RXTDIS | AT91_PDC_TXTDIS); -+ else -+ atmel_spi_next_message(master); -+ } else { -+ if (xfer->cs_change) { -+ cs_deactivate(msg->spi); -+ udelay(1); -+ cs_activate(msg->spi); -+ } -+ -+ /* -+ * Not done yet. Submit the next transfer. -+ * -+ * FIXME handle protocol options for xfer -+ */ -+ atmel_spi_next_xfer(master, msg); -+ } -+ } else { -+ /* -+ * Keep going, we still have data to send in -+ * the current transfer. -+ */ -+ atmel_spi_next_xfer(master, msg); -+ } -+ spin_unlock(&as->lock); -+ } -+ -+ return ret; -+} -+ -+#define MAX_SCBR 0xff -+ -+static int atmel_spi_setup(struct spi_device *spi) -+{ -+ struct atmel_spi *as; -+ u32 scbr, csr; -+ unsigned int bits = spi->bits_per_word; -+ unsigned long bus_hz, sck_hz; -+ unsigned int npcs_pin; -+ int ret; -+ -+ as = spi_master_get_devdata(spi->master); -+ -+ if (as->stopping) -+ return -ESHUTDOWN; -+ -+ if (spi->chip_select > spi->master->num_chipselect) { -+ dev_dbg(&spi->dev, -+ "setup: invalid chipselect %u (%u defined)\n", -+ spi->chip_select, spi->master->num_chipselect); -+ return -EINVAL; -+ } -+ -+ if (bits == 0) -+ bits = 8; -+ if (bits < 8 || bits > 16) { -+ dev_dbg(&spi->dev, -+ "setup: invalid bits_per_word %u (8 to 16)\n", -+ bits); -+ return -EINVAL; -+ } -+ -+ if (spi->mode & (SPI_CS_HIGH | SPI_LSB_FIRST)) { -+ dev_dbg(&spi->dev, "setup: unsupported mode %u\n", spi->mode); -+ return -EINVAL; -+ } -+ -+ /* speed zero convention is used by some upper layers */ -+ bus_hz = clk_get_rate(as->clk); -+ if (spi->max_speed_hz) { -+ /* assume div32/fdiv/mbz == 0 */ -+ if (!as->new_1) -+ bus_hz /= 2; -+ scbr = ((bus_hz + spi->max_speed_hz - 1) -+ / spi->max_speed_hz); -+ if (scbr > MAX_SCBR) { -+ dev_dbg(&spi->dev, "setup: %d Hz too slow, scbr %u\n", -+ spi->max_speed_hz, scbr); -+ return -EINVAL; -+ } -+ } else -+ scbr = 0xff; -+ sck_hz = bus_hz / scbr; -+ -+ csr = ATMEL_SPI_SCBR_(scbr) | ATMEL_SPI_BITS_(bits); -+ if (spi->mode & SPI_CPOL) -+ csr |= ATMEL_SPI_CPOL; -+ if (!(spi->mode & SPI_CPHA)) -+ csr |= ATMEL_SPI_NCPHA; -+ -+ /* TODO: DLYBS and DLYBCT */ -+ csr |= ATMEL_SPI_DLYBS_(10); -+ csr |= ATMEL_SPI_DLYBCT_(10); -+ -+ npcs_pin = (unsigned int)spi->controller_data; -+ if (!spi->controller_state) { -+ ret = request_gpio(npcs_pin); -+ if (ret) -+ return ret; -+ spi->controller_state = (void *)npcs_pin; -+ } -+ -+ gpio_set_value(npcs_pin, 1); -+ gpio_set_output_enable(npcs_pin, 1); -+ gpio_set_pullup_enable(npcs_pin, 0); -+ -+ dev_dbg(&spi->dev, -+ "setup: %lu Hz bpw %u mode 0x%x -> csr%d %08x\n", -+ sck_hz, bits, spi->mode, spi->chip_select, csr); -+ -+ spi_writel(as, ATMEL_SPI_CSR(spi->chip_select), csr); -+ -+ return 0; -+} -+ -+static int atmel_spi_transfer(struct spi_device *spi, struct spi_message *msg) -+{ -+ struct atmel_spi *as; -+ struct spi_transfer *xfer; -+ unsigned long flags; -+ struct device *controller = spi->master->cdev.dev; -+ -+ as = spi_master_get_devdata(spi->master); -+ -+ dev_dbg(controller, "new message %p submitted for %s\n", -+ msg, spi->dev.bus_id); -+ -+ if (unlikely(list_empty(&msg->transfers) -+ || !spi->max_speed_hz)) -+ return -EINVAL; -+ -+ if (as->stopping) -+ return -ESHUTDOWN; -+ -+ list_for_each_entry(xfer, &msg->transfers, transfer_list) { -+ if (!(xfer->tx_buf || xfer->rx_buf)) { -+ dev_dbg(&spi->dev, "missing rx or tx buf\n"); -+ return -EINVAL; -+ } -+ -+ /* FIXME implement these protocol options!! */ -+ if (xfer->bits_per_word || xfer->speed_hz) { -+ dev_dbg(&spi->dev, "no protocol options yet\n"); -+ return -ENOPROTOOPT; -+ } -+ } -+ -+ /* scrub dcache "early" */ -+ if (!msg->is_dma_mapped) { -+ list_for_each_entry(xfer, &msg->transfers, transfer_list) -+ atmel_spi_dma_map_xfer(as, xfer); -+ } -+ -+ list_for_each_entry(xfer, &msg->transfers, transfer_list) { -+ dev_dbg(controller, -+ " xfer %p: len %u tx %p/%08x rx %p/%08x\n", -+ xfer, xfer->len, -+ xfer->tx_buf, xfer->tx_dma, -+ xfer->rx_buf, xfer->rx_dma); -+ } -+ -+ msg->status = -EINPROGRESS; -+ msg->actual_length = 0; -+ -+ spin_lock_irqsave(&as->lock, flags); -+ list_add_tail(&msg->queue, &as->queue); -+ if (!as->current_transfer) -+ atmel_spi_next_message(spi->master); -+ spin_unlock_irqrestore(&as->lock, flags); -+ -+ return 0; -+} -+ -+static void atmel_spi_cleanup(const struct spi_device *spi) -+{ -+ if (spi->controller_state) -+ free_gpio((unsigned int)spi->controller_data); -+} -+ -+/*-------------------------------------------------------------------------*/ -+ -+static int __devinit atmel_spi_probe(struct platform_device *pdev) -+{ -+ struct resource *regs; -+ int irq; -+ struct clk *clk; -+ int ret = -ENOMEM; -+ struct spi_master *master; -+ struct atmel_spi *as; -+ -+ regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ if (!regs) -+ return -ENXIO; -+ -+ irq = platform_get_irq(pdev, 0); -+ if (irq < 0) -+ return irq; -+ -+ clk = clk_get(&pdev->dev, "spi_clk"); -+ if (IS_ERR(clk)) -+ return PTR_ERR(clk); -+ -+ /* setup spi core then atmel-specific driver state */ -+ master = spi_alloc_master(&pdev->dev, sizeof *as); -+ if (!master) -+ goto out_free; -+ -+ master->bus_num = pdev->id; -+ master->num_chipselect = 4; -+ master->setup = atmel_spi_setup; -+ master->transfer = atmel_spi_transfer; -+ master->cleanup = atmel_spi_cleanup; -+ platform_set_drvdata(pdev, master); -+ -+ as = spi_master_get_devdata(master); -+ -+ as->buffer = dma_alloc_coherent(&pdev->dev, BUFFER_SIZE, -+ &as->buffer_dma, GFP_KERNEL); -+ if (!as->buffer) -+ goto out_free; -+ -+ spin_lock_init(&as->lock); -+ INIT_LIST_HEAD(&as->queue); -+ as->pdev = pdev; -+ as->regs = ioremap(regs->start, (regs->end - regs->start) + 1); -+ if (!as->regs) -+ goto out_free_buffer; -+ as->irq = irq; -+ as->clk = clk; -+#if !defined(CONFIG_ARCH_AT91RM9200) -+ /* if (!cpu_is_at91rm9200()) */ -+ as->new_1 = 1; -+#endif -+ -+ ret = request_irq(irq, atmel_spi_interrupt, 0, -+ pdev->dev.bus_id, master); -+ if (ret) -+ goto out_unmap_regs; -+ -+ /* Initialize the hardware */ -+ clk_enable(clk); -+ spi_writel(as, ATMEL_SPI_CR, ATMEL_SPI_SWRST); -+ spi_writel(as, ATMEL_SPI_MR, ATMEL_SPI_MSTR | ATMEL_SPI_MODFDIS); -+ spi_writel(as, AT91_PDC_PTCR, AT91_PDC_RXTDIS | AT91_PDC_TXTDIS); -+ spi_writel(as, ATMEL_SPI_CR, ATMEL_SPI_SPIEN); -+ -+ /* go! */ -+ dev_info(&pdev->dev, "Atmel SPI Controller at 0x%08lx (irq %d)\n", -+ (unsigned long)regs->start, irq); -+ -+ ret = spi_register_master(master); -+ if (ret) -+ goto out_reset_hw; -+ -+ return 0; -+ -+out_reset_hw: -+ spi_writel(as, ATMEL_SPI_CR, ATMEL_SPI_SWRST); -+ clk_disable(clk); -+ free_irq(irq, master); -+out_unmap_regs: -+ iounmap(as->regs); -+out_free_buffer: -+ dma_free_coherent(&pdev->dev, BUFFER_SIZE, as->buffer, -+ as->buffer_dma); -+out_free: -+ clk_put(clk); -+ spi_master_put(master); -+ return ret; -+} -+ -+static int __devexit atmel_spi_remove(struct platform_device *pdev) -+{ -+ struct spi_master *master = platform_get_drvdata(pdev); -+ struct atmel_spi *as = spi_master_get_devdata(master); -+ struct spi_message *msg; -+ -+ /* reset the hardware and block queue progress */ -+ spin_lock_irq(&as->lock); -+ as->stopping = 1; -+ spi_writel(as, ATMEL_SPI_CR, ATMEL_SPI_SWRST); -+ spi_readl(as, ATMEL_SPI_SR); -+ spin_unlock_irq(&as->lock); -+ -+ /* Terminate remaining queued transfers */ -+ list_for_each_entry(msg, &as->queue, queue) { -+ /* REVISIT unmapping the dma is sort of a NOP on ARM, -+ * but we shouldn't depend on that... -+ */ -+ msg->status = -ESHUTDOWN; -+ msg->complete(msg->context); -+ } -+ -+ dma_free_coherent(&pdev->dev, BUFFER_SIZE, as->buffer, -+ as->buffer_dma); -+ -+ clk_disable(as->clk); -+ clk_put(as->clk); -+ free_irq(as->irq, master); -+ iounmap(as->regs); -+ -+ spi_unregister_master(master); -+ -+ return 0; -+} -+ -+#ifdef CONFIG_PM -+ -+static int atmel_spi_suspend(struct platform_device *pdev, pm_message_t mesg) -+{ -+ struct spi_master *master = platform_get_drvdata(pdev); -+ struct atmel_spi *as = spi_master_get_devdata(master); -+ -+ clk_disable(as->clk); -+ return 0; -+} -+ -+static int atmel_spi_resume(struct platform_device *pdev) -+{ -+ struct spi_master *master = platform_get_drvdata(pdev); -+ struct atmel_spi *as = spi_master_get_devdata(master); -+ -+ clk_enable(as->clk); -+ return 0; -+} -+ -+#else -+#define atmel_spi_suspend NULL -+#define atmel_spi_resume NULL -+#endif -+ -+ -+static struct platform_driver atmel_spi_driver = { -+ .driver = { -+ .name = "atmel_spi", -+ .owner = THIS_MODULE, -+ }, -+ .probe = atmel_spi_probe, -+ .suspend = atmel_spi_suspend, -+ .resume = atmel_spi_resume, -+ .remove = __devexit_p(atmel_spi_remove), -+}; -+ -+static int __init atmel_spi_init(void) -+{ -+ return platform_driver_register(&atmel_spi_driver); -+} -+module_init(atmel_spi_init); -+ -+static void __exit atmel_spi_exit(void) -+{ -+ platform_driver_unregister(&atmel_spi_driver); -+} -+module_exit(atmel_spi_exit); -+ -+MODULE_DESCRIPTION("Atmel AT32/AT91 SPI Controller driver"); -+MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>"); -+MODULE_LICENSE("GPL"); -diff -urN -x CVS linux-2.6.19-final/drivers/spi/atmel_spi.h linux-2.6.19/drivers/spi/atmel_spi.h ---- linux-2.6.19-final/drivers/spi/atmel_spi.h Thu Jan 1 02:00:00 1970 -+++ linux-2.6.19/drivers/spi/atmel_spi.h Wed Nov 15 16:40:00 2006 -@@ -0,0 +1,86 @@ -+/* -+ * drivers/spi/atmel_spi.h -+ * -+ * Copyright (C) 2005 Ivan Kokshaysky -+ * Copyright (C) SAN People -+ * -+ * Serial Peripheral Interface (SPI) registers. -+ * Based on AT91RM9200 datasheet revision E. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ */ -+ -+#ifndef ATMEL_SPI_H -+#define ATMEL_SPI_H -+ -+#define ATMEL_SPI_CR 0x00 /* Control Register */ -+#define ATMEL_SPI_SPIEN (1 << 0) /* SPI Enable */ -+#define ATMEL_SPI_SPIDIS (1 << 1) /* SPI Disable */ -+#define ATMEL_SPI_SWRST (1 << 7) /* SPI Software Reset */ -+#define ATMEL_SPI_LASTXFER (1 << 24) /* Last Transfer [SAM9261 only] */ -+ -+#define ATMEL_SPI_MR 0x04 /* Mode Register */ -+#define ATMEL_SPI_MSTR (1 << 0) /* Master/Slave Mode */ -+#define ATMEL_SPI_PS (1 << 1) /* Peripheral Select */ -+#define ATMEL_SPI_PS_FIXED (0 << 1) -+#define ATMEL_SPI_PS_VARIABLE (1 << 1) -+#define ATMEL_SPI_PCSDEC (1 << 2) /* Chip Select Decode */ -+#define ATMEL_SPI_DIV32 (1 << 3) /* Clock Selection [AT91RM9200 only] */ -+#define ATMEL_SPI_MODFDIS (1 << 4) /* Mode Fault Detection */ -+#define ATMEL_SPI_LLB (1 << 7) /* Local Loopback Enable */ -+#define ATMEL_SPI_PCS (0xf << 16) /* Peripheral Chip Select */ -+#define ATMEL_SPI_PCS_(x) (~(1 << (x+16)) & ATMEL_SPI_PCS) -+#define ATMEL_SPI_DLYBCS (0xff << 24) /* Delay Between Chip Selects */ -+ -+#define ATMEL_SPI_RDR 0x08 /* Receive Data Register */ -+#define ATMEL_SPI_RD (0xffff << 0) /* Receive Data */ -+#define ATMEL_SPI_PCS (0xf << 16) /* Peripheral Chip Select */ -+ -+#define ATMEL_SPI_TDR 0x0c /* Transmit Data Register */ -+#define ATMEL_SPI_TD (0xffff << 0) /* Transmit Data */ -+#define ATMEL_SPI_PCS (0xf << 16) /* Peripheral Chip Select */ -+#define ATMEL_SPI_LASTXFER (1 << 24) /* Last Transfer [SAM9261 only] */ -+ -+#define ATMEL_SPI_SR 0x10 /* Status Register */ -+#define ATMEL_SPI_RDRF (1 << 0) /* Receive Data Register Full */ -+#define ATMEL_SPI_TDRE (1 << 1) /* Transmit Data Register Full */ -+#define ATMEL_SPI_MODF (1 << 2) /* Mode Fault Error */ -+#define ATMEL_SPI_OVRES (1 << 3) /* Overrun Error Status */ -+#define ATMEL_SPI_ENDRX (1 << 4) /* End of RX buffer */ -+#define ATMEL_SPI_ENDTX (1 << 5) /* End of TX buffer */ -+#define ATMEL_SPI_RXBUFF (1 << 6) /* RX Buffer Full */ -+#define ATMEL_SPI_TXBUFE (1 << 7) /* TX Buffer Empty */ -+#define ATMEL_SPI_NSSR (1 << 8) /* NSS Rising [SAM9261 only] */ -+#define ATMEL_SPI_TXEMPTY (1 << 9) /* Transmission Register Empty [SAM9261 only] */ -+#define ATMEL_SPI_SPIENS (1 << 16) /* SPI Enable Status */ -+ -+#define ATMEL_SPI_IER 0x14 /* Interrupt Enable Register */ -+#define ATMEL_SPI_IDR 0x18 /* Interrupt Disable Register */ -+#define ATMEL_SPI_IMR 0x1c /* Interrupt Mask Register */ -+ -+#define ATMEL_SPI_CSR(n) (0x30 + ((n) * 4)) /* Chip Select Registers 0-3 */ -+#define ATMEL_SPI_CPOL (1 << 0) /* Clock Polarity */ -+#define ATMEL_SPI_NCPHA (1 << 1) /* Clock Phase */ -+#define ATMEL_SPI_CSAAT (1 << 3) /* Chip Select Active After Transfer [SAM9261 only] */ -+#define ATMEL_SPI_BITS (0xf << 4) /* Bits Per Transfer */ -+#define ATMEL_SPI_BITS_8 (0 << 4) -+#define ATMEL_SPI_BITS_9 (1 << 4) -+#define ATMEL_SPI_BITS_10 (2 << 4) -+#define ATMEL_SPI_BITS_11 (3 << 4) -+#define ATMEL_SPI_BITS_12 (4 << 4) -+#define ATMEL_SPI_BITS_13 (5 << 4) -+#define ATMEL_SPI_BITS_14 (6 << 4) -+#define ATMEL_SPI_BITS_15 (7 << 4) -+#define ATMEL_SPI_BITS_16 (8 << 4) -+#define ATMEL_SPI_BITS_(x) ((x - 8) << 4) -+#define ATMEL_SPI_SCBR (0xff << 8) /* Serial Clock Baud Rate */ -+#define ATMEL_SPI_SCBR_(x) ((x) << 8) -+#define ATMEL_SPI_DLYBS (0xff << 16) /* Delay before SPCK */ -+#define ATMEL_SPI_DLYBS_(x) ((x) << 16) -+#define ATMEL_SPI_DLYBCT (0xff << 24) /* Delay between Consecutive Transfers */ -+#define ATMEL_SPI_DLYBCT_(x) ((x) << 24) -+ -+#endif -diff -urN -x CVS linux-2.6.19-final/drivers/spi/spi_at91_bitbang.c linux-2.6.19/drivers/spi/spi_at91_bitbang.c ---- linux-2.6.19-final/drivers/spi/spi_at91_bitbang.c Thu Jan 1 02:00:00 1970 -+++ linux-2.6.19/drivers/spi/spi_at91_bitbang.c Thu Oct 12 17:07:39 2006 +diff -urN -x CVS linux-2.6.21/drivers/spi/spi_at91_bitbang.c linux-2.6-stable/drivers/spi/spi_at91_bitbang.c +--- linux-2.6.21/drivers/spi/spi_at91_bitbang.c Thu Jan 1 02:00:00 1970 ++++ linux-2.6-stable/drivers/spi/spi_at91_bitbang.c Tue May 8 14:31:24 2007 @@ -0,0 +1,207 @@ +/* + * at91_spi.c - at91 SPI driver (BOOTSTRAP/BITBANG VERSION) @@ -14497,2033 +7186,1719 @@ diff -urN -x CVS linux-2.6.19-final/drivers/spi/spi_at91_bitbang.c linux-2.6.19/ +MODULE_DESCRIPTION("AT91 SPI support (BOOTSTRAP/BITBANG VERSION)"); +MODULE_AUTHOR("David Brownell"); +MODULE_LICENSE("GPL"); -diff -urN -x CVS linux-2.6.19-final/drivers/usb/Kconfig linux-2.6.19/drivers/usb/Kconfig ---- linux-2.6.19-final/drivers/usb/Kconfig Mon Dec 4 16:40:49 2006 -+++ linux-2.6.19/drivers/usb/Kconfig Thu Oct 12 17:07:39 2006 -@@ -24,7 +24,7 @@ - default y if ARCH_S3C2410 - default y if PXA27x - default y if ARCH_EP93XX -- default y if (ARCH_AT91RM9200 || ARCH_AT91SAM9261) -+ default y if ARCH_AT91 - default y if ARCH_PNX4008 - # PPC: - default y if STB03xxx -diff -urN -x CVS linux-2.6.19-final/drivers/usb/gadget/Kconfig linux-2.6.19/drivers/usb/gadget/Kconfig ---- linux-2.6.19-final/drivers/usb/gadget/Kconfig Mon Dec 4 16:40:49 2006 -+++ linux-2.6.19/drivers/usb/gadget/Kconfig Thu Oct 12 17:07:39 2006 +diff -urN -x CVS linux-2.6.21/drivers/usb/gadget/Kconfig linux-2.6-stable/drivers/usb/gadget/Kconfig +--- linux-2.6.21/drivers/usb/gadget/Kconfig Thu Apr 26 05:08:32 2007 ++++ linux-2.6-stable/drivers/usb/gadget/Kconfig Wed May 9 10:20:54 2007 @@ -189,7 +189,7 @@ config USB_GADGET_AT91 boolean "AT91 USB Device Port" -- depends on ARCH_AT91RM9200 -+ depends on ARCH_AT91 +- depends on ARCH_AT91 ++ depends on ARCH_AT91 && !ARCH_AT91SAM9RL select USB_GADGET_SELECTED help Many Atmel AT91 processors (such as the AT91RM2000) have a -diff -urN -x CVS linux-2.6.19-final/drivers/usb/gadget/at91_udc.c linux-2.6.19/drivers/usb/gadget/at91_udc.c ---- linux-2.6.19-final/drivers/usb/gadget/at91_udc.c Mon Dec 4 16:40:49 2006 -+++ linux-2.6.19/drivers/usb/gadget/at91_udc.c Wed Nov 15 11:33:30 2006 -@@ -43,14 +43,16 @@ - #include <linux/usb_gadget.h> - - #include <asm/byteorder.h> -+#include <asm/hardware.h> - #include <asm/io.h> - #include <asm/irq.h> - #include <asm/system.h> - #include <asm/mach-types.h> - --#include <asm/arch/hardware.h> - #include <asm/arch/gpio.h> - #include <asm/arch/board.h> -+#include <asm/arch/cpu.h> -+#include <asm/arch/at91sam9261_matrix.h> - - #include "at91_udc.h" - -@@ -78,27 +80,9 @@ - static const char driver_name [] = "at91_udc"; - static const char ep0name[] = "ep0"; - --/*-------------------------------------------------------------------------*/ - --/* -- * Read from a UDP register. -- */ --static inline unsigned long at91_udp_read(unsigned int reg) --{ -- void __iomem *udp_base = (void __iomem *)AT91_VA_BASE_UDP; -- -- return __raw_readl(udp_base + reg); --} -- --/* -- * Write to a UDP register. -- */ --static inline void at91_udp_write(unsigned int reg, unsigned long value) --{ -- void __iomem *udp_base = (void __iomem *)AT91_VA_BASE_UDP; -- -- __raw_writel(value, udp_base + reg); --} -+#define at91_udp_read(dev, reg) __raw_readl((dev)->udp_baseaddr + (reg)) -+#define at91_udp_write(dev, reg, val) __raw_writel((val), (dev)->udp_baseaddr + (reg)) - - /*-------------------------------------------------------------------------*/ - -@@ -210,13 +194,13 @@ - return 0; - } - -- tmp = at91_udp_read(AT91_UDP_FRM_NUM); -+ tmp = at91_udp_read(udc, AT91_UDP_FRM_NUM); - seq_printf(s, "frame %05x:%s%s frame=%d\n", tmp, - (tmp & AT91_UDP_FRM_OK) ? " ok" : "", - (tmp & AT91_UDP_FRM_ERR) ? " err" : "", - (tmp & AT91_UDP_NUM)); - -- tmp = at91_udp_read(AT91_UDP_GLB_STAT); -+ tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT); - seq_printf(s, "glbstate %02x:%s" FOURBITS "\n", tmp, - (tmp & AT91_UDP_RMWUPE) ? " rmwupe" : "", - (tmp & AT91_UDP_RSMINPR) ? " rsminpr" : "", -@@ -224,13 +208,13 @@ - (tmp & AT91_UDP_CONFG) ? " confg" : "", - (tmp & AT91_UDP_FADDEN) ? " fadden" : ""); - -- tmp = at91_udp_read(AT91_UDP_FADDR); -+ tmp = at91_udp_read(udc, AT91_UDP_FADDR); - seq_printf(s, "faddr %03x:%s fadd=%d\n", tmp, - (tmp & AT91_UDP_FEN) ? " fen" : "", - (tmp & AT91_UDP_FADD)); - -- proc_irq_show(s, "imr ", at91_udp_read(AT91_UDP_IMR)); -- proc_irq_show(s, "isr ", at91_udp_read(AT91_UDP_ISR)); -+ proc_irq_show(s, "imr ", at91_udp_read(udc, AT91_UDP_IMR)); -+ proc_irq_show(s, "isr ", at91_udp_read(udc, AT91_UDP_ISR)); - - if (udc->enabled && udc->vbus) { - proc_ep_show(s, &udc->ep[0]); -@@ -286,6 +270,7 @@ - static void done(struct at91_ep *ep, struct at91_request *req, int status) - { - unsigned stopped = ep->stopped; -+ struct at91_udc *udc = ep->udc; - - list_del_init(&req->queue); - if (req->req.status == -EINPROGRESS) -@@ -300,8 +285,8 @@ - ep->stopped = stopped; - - /* ep0 is always ready; other endpoints need a non-empty queue */ -- if (list_empty(&ep->queue) && ep->int_mask != (1 << 0)) -- at91_udp_write(AT91_UDP_IDR, ep->int_mask); -+ if (list_empty(&ep->queue) && (ep->id != 0)) -+ at91_udp_write(udc, AT91_UDP_IDR, 1 << ep->id); - } - - /*-------------------------------------------------------------------------*/ -@@ -554,8 +539,8 @@ - * reset/init endpoint fifo. NOTE: leaves fifo_bank alone, - * since endpoint resets don't reset hw pingpong state. +diff -urN -x CVS linux-2.6.21/drivers/usb/gadget/at91_udc.c linux-2.6-stable/drivers/usb/gadget/at91_udc.c +--- linux-2.6.21/drivers/usb/gadget/at91_udc.c Thu Apr 26 05:08:32 2007 ++++ linux-2.6-stable/drivers/usb/gadget/at91_udc.c Tue May 8 12:13:31 2007 +@@ -1804,7 +1804,7 @@ */ -- at91_udp_write(AT91_UDP_RST_EP, ep->int_mask); -- at91_udp_write(AT91_UDP_RST_EP, 0); -+ at91_udp_write(dev, AT91_UDP_RST_EP, 1 << ep->id); -+ at91_udp_write(dev, AT91_UDP_RST_EP, 0); - - local_irq_restore(flags); - return 0; -@@ -564,6 +549,7 @@ - static int at91_ep_disable (struct usb_ep * _ep) - { - struct at91_ep *ep = container_of(_ep, struct at91_ep, ep); -+ struct at91_udc *udc = ep->udc; - unsigned long flags; - - if (ep == &ep->udc->ep[0]) -@@ -579,8 +565,8 @@ - - /* reset fifos and endpoint */ - if (ep->udc->clocked) { -- at91_udp_write(AT91_UDP_RST_EP, ep->int_mask); -- at91_udp_write(AT91_UDP_RST_EP, 0); -+ at91_udp_write(udc, AT91_UDP_RST_EP, 1 << ep->id); -+ at91_udp_write(udc, AT91_UDP_RST_EP, 0); - __raw_writel(0, ep->creg); - } - -@@ -695,10 +681,10 @@ - * reconfigures the endpoints. - */ - if (dev->wait_for_config_ack) { -- tmp = at91_udp_read(AT91_UDP_GLB_STAT); -+ tmp = at91_udp_read(dev, AT91_UDP_GLB_STAT); - tmp ^= AT91_UDP_CONFG; - VDBG("toggle config\n"); -- at91_udp_write(AT91_UDP_GLB_STAT, tmp); -+ at91_udp_write(dev, AT91_UDP_GLB_STAT, tmp); - } - if (req->req.length == 0) { - ep0_in_status: -@@ -727,7 +713,7 @@ - - if (req && !status) { - list_add_tail (&req->queue, &ep->queue); -- at91_udp_write(AT91_UDP_IER, ep->int_mask); -+ at91_udp_write(dev, AT91_UDP_IER, 1 << ep->id); + if ((!udc->suspended && udc->addr) + || !wake +- || at91_suspend_entering_slow_clock()) { ++ || clk_must_disable(udc->fclk)) { + pullup(udc, 0); + wake = 0; + } else +diff -urN -x CVS linux-2.6.21/drivers/usb/host/ohci-at91.c linux-2.6-stable/drivers/usb/host/ohci-at91.c +--- linux-2.6.21/drivers/usb/host/ohci-at91.c Thu Apr 26 05:08:32 2007 ++++ linux-2.6-stable/drivers/usb/host/ohci-at91.c Tue May 8 12:13:31 2007 +@@ -299,7 +299,7 @@ + * + * REVISIT: some boards will be able to turn VBUS off... + */ +- if (at91_suspend_entering_slow_clock()) { ++ if (clk_must_disable(fclk)) { + ohci_usb_reset (ohci); + at91_stop_clock(); } - done: - local_irq_restore(flags); -@@ -758,6 +744,7 @@ - static int at91_ep_set_halt(struct usb_ep *_ep, int value) - { - struct at91_ep *ep = container_of(_ep, struct at91_ep, ep); -+ struct at91_udc *udc = ep->udc; - u32 __iomem *creg; - u32 csr; - unsigned long flags; -@@ -785,8 +772,8 @@ - csr |= AT91_UDP_FORCESTALL; - VDBG("halt %s\n", ep->ep.name); - } else { -- at91_udp_write(AT91_UDP_RST_EP, ep->int_mask); -- at91_udp_write(AT91_UDP_RST_EP, 0); -+ at91_udp_write(udc, AT91_UDP_RST_EP, 1 << ep->id); -+ at91_udp_write(udc, AT91_UDP_RST_EP, 0); - csr &= ~AT91_UDP_FORCESTALL; - } - __raw_writel(csr, creg); -@@ -813,9 +800,11 @@ - - static int at91_get_frame(struct usb_gadget *gadget) - { -+ struct at91_udc *udc = to_udc(gadget); +diff -urN -x CVS linux-2.6.21/drivers/video/Kconfig linux-2.6-stable/drivers/video/Kconfig +--- linux-2.6.21/drivers/video/Kconfig Thu Apr 26 05:08:32 2007 ++++ linux-2.6-stable/drivers/video/Kconfig Thu May 10 12:34:41 2007 +@@ -663,6 +663,17 @@ + framebuffer. Product specs at + <http://www.erd.epson.com/vdc/html/products.htm>. + ++config FB_S1D15605 ++ tristate "Epson S1D15605 framebuffer support" ++ depends on FB ++ default m if MACH_KB9200 ++ select FB_CFB_FILLRECT ++ select FB_CFB_COPYAREA ++ select FB_CFB_IMAGEBLIT ++ help ++ Build in support for the S1D15605 Epson Research 128x64 ++ LCD controller as a framebuffer. ++ + config FB_S1D13XXX + tristate "Epson S1D13XXX framebuffer support" + depends on FB +@@ -674,6 +685,22 @@ + working with S1D13806). Product specs at + <http://www.erd.epson.com/vdc/html/legacy_13xxx.htm> + ++config FB_ATMEL ++ tristate "AT91/AT32 LCD Controller support" ++ depends on FB && (ARCH_AT91SAM9261 || ARCH_AT91SAM9263 || ARCH_AT91SAM9RL || AVR32) ++ select FB_CFB_FILLRECT ++ select FB_CFB_COPYAREA ++ select FB_CFB_IMAGEBLIT ++ help ++ This enables support for the AT91/AT32 LCD Controller. + - if (!to_udc(gadget)->clocked) - return -EINVAL; -- return at91_udp_read(AT91_UDP_FRM_NUM) & AT91_UDP_NUM; -+ return at91_udp_read(udc, AT91_UDP_FRM_NUM) & AT91_UDP_NUM; - } - - static int at91_wakeup(struct usb_gadget *gadget) -@@ -833,11 +822,11 @@ - - /* NOTE: some "early versions" handle ESR differently ... */ - -- glbstate = at91_udp_read(AT91_UDP_GLB_STAT); -+ glbstate = at91_udp_read(udc, AT91_UDP_GLB_STAT); - if (!(glbstate & AT91_UDP_ESR)) - goto done; - glbstate |= AT91_UDP_ESR; -- at91_udp_write(AT91_UDP_GLB_STAT, glbstate); -+ at91_udp_write(udc, AT91_UDP_GLB_STAT, glbstate); - - done: - local_irq_restore(flags); -@@ -861,6 +850,7 @@ - ep->stopped = 0; - ep->fifo_bank = 0; - ep->ep.maxpacket = ep->maxpacket; -+ ep->creg = (void __iomem *) udc->udp_baseaddr + AT91_UDP_CSR(i); - // initialiser une queue par endpoint - INIT_LIST_HEAD(&ep->queue); - } -@@ -915,14 +905,25 @@ - if (!udc->enabled || !udc->vbus) - is_on = 0; - DBG("%sactive\n", is_on ? "" : "in"); -+ - if (is_on) { - clk_on(udc); -- at91_udp_write(AT91_UDP_TXVC, 0); -- at91_set_gpio_value(udc->board.pullup_pin, 1); -- } else { -+ at91_udp_write(udc, AT91_UDP_TXVC, 0); -+ if (cpu_is_at91rm9200()) -+ at91_set_gpio_value(udc->board.pullup_pin, 1); -+ else if (cpu_is_at91sam9260()) -+ at91_udp_write(udc, AT91_UDP_TXVC, (at91_udp_read(udc, AT91_UDP_TXVC) | AT91_UDP_TXVC_PUON)); -+ else if (cpu_is_at91sam9261()) -+ at91_sys_write(AT91_MATRIX_USBPUCR, (at91_sys_read(AT91_MATRIX_USBPUCR) | AT91_MATRIX_USBPUCR_PUON)); -+ } else { - stop_activity(udc); -- at91_udp_write(AT91_UDP_TXVC, AT91_UDP_TXVC_TXVDIS); -- at91_set_gpio_value(udc->board.pullup_pin, 0); -+ at91_udp_write(udc, AT91_UDP_TXVC, AT91_UDP_TXVC_TXVDIS); -+ if (cpu_is_at91rm9200()) -+ at91_set_gpio_value(udc->board.pullup_pin, 0); -+ else if (cpu_is_at91sam9260()) -+ at91_udp_write(udc, AT91_UDP_TXVC, (at91_udp_read(udc, AT91_UDP_TXVC) & ~AT91_UDP_TXVC_PUON)); -+ else if (cpu_is_at91sam9261()) -+ at91_sys_write(AT91_MATRIX_USBPUCR, (at91_sys_read(AT91_MATRIX_USBPUCR) & ~AT91_MATRIX_USBPUCR_PUON)); - clk_off(udc); - } - } -@@ -1086,7 +1087,7 @@ - - case ((USB_TYPE_STANDARD|USB_RECIP_DEVICE) << 8) - | USB_REQ_SET_CONFIGURATION: -- tmp = at91_udp_read(AT91_UDP_GLB_STAT) & AT91_UDP_CONFG; -+ tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT) & AT91_UDP_CONFG; - if (pkt.r.wValue) - udc->wait_for_config_ack = (tmp == 0); - else -@@ -1103,7 +1104,7 @@ - case ((USB_DIR_IN|USB_TYPE_STANDARD|USB_RECIP_DEVICE) << 8) - | USB_REQ_GET_STATUS: - tmp = (udc->selfpowered << USB_DEVICE_SELF_POWERED); -- if (at91_udp_read(AT91_UDP_GLB_STAT) & AT91_UDP_ESR) -+ if (at91_udp_read(udc, AT91_UDP_GLB_STAT) & AT91_UDP_ESR) - tmp |= (1 << USB_DEVICE_REMOTE_WAKEUP); - PACKET("get device status\n"); - __raw_writeb(tmp, dreg); -@@ -1114,17 +1115,17 @@ - | USB_REQ_SET_FEATURE: - if (w_value != USB_DEVICE_REMOTE_WAKEUP) - goto stall; -- tmp = at91_udp_read(AT91_UDP_GLB_STAT); -+ tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT); - tmp |= AT91_UDP_ESR; -- at91_udp_write(AT91_UDP_GLB_STAT, tmp); -+ at91_udp_write(udc, AT91_UDP_GLB_STAT, tmp); - goto succeed; - case ((USB_TYPE_STANDARD|USB_RECIP_DEVICE) << 8) - | USB_REQ_CLEAR_FEATURE: - if (w_value != USB_DEVICE_REMOTE_WAKEUP) - goto stall; -- tmp = at91_udp_read(AT91_UDP_GLB_STAT); -+ tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT); - tmp &= ~AT91_UDP_ESR; -- at91_udp_write(AT91_UDP_GLB_STAT, tmp); -+ at91_udp_write(udc, AT91_UDP_GLB_STAT, tmp); - goto succeed; - - /* -@@ -1206,8 +1207,8 @@ - } else if (ep->is_in) - goto stall; - -- at91_udp_write(AT91_UDP_RST_EP, ep->int_mask); -- at91_udp_write(AT91_UDP_RST_EP, 0); -+ at91_udp_write(udc, AT91_UDP_RST_EP, 1 << ep->id); -+ at91_udp_write(udc, AT91_UDP_RST_EP, 0); - tmp = __raw_readl(ep->creg); - tmp |= CLR_FX; - tmp &= ~(SET_FX | AT91_UDP_FORCESTALL); -@@ -1300,13 +1301,13 @@ - if (udc->wait_for_addr_ack) { - u32 tmp; - -- at91_udp_write(AT91_UDP_FADDR, -+ at91_udp_write(udc, AT91_UDP_FADDR, - AT91_UDP_FEN | udc->addr); -- tmp = at91_udp_read(AT91_UDP_GLB_STAT); -+ tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT); - tmp &= ~AT91_UDP_FADDEN; - if (udc->addr) - tmp |= AT91_UDP_FADDEN; -- at91_udp_write(AT91_UDP_GLB_STAT, tmp); -+ at91_udp_write(udc, AT91_UDP_GLB_STAT, tmp); - - udc->wait_for_addr_ack = 0; - VDBG("address %d\n", udc->addr); -@@ -1374,28 +1375,28 @@ - while (rescans--) { - u32 status; - -- status = at91_udp_read(AT91_UDP_ISR) -- & at91_udp_read(AT91_UDP_IMR); -+ status = at91_udp_read(udc, AT91_UDP_ISR) -+ & at91_udp_read(udc, AT91_UDP_IMR); - if (!status) - break; - - /* USB reset irq: not maskable */ - if (status & AT91_UDP_ENDBUSRES) { -- at91_udp_write(AT91_UDP_IDR, ~MINIMUS_INTERRUPTUS); -- at91_udp_write(AT91_UDP_IER, MINIMUS_INTERRUPTUS); -+ at91_udp_write(udc, AT91_UDP_IDR, ~MINIMUS_INTERRUPTUS); -+ at91_udp_write(udc, AT91_UDP_IER, MINIMUS_INTERRUPTUS); - /* Atmel code clears this irq twice */ -- at91_udp_write(AT91_UDP_ICR, AT91_UDP_ENDBUSRES); -- at91_udp_write(AT91_UDP_ICR, AT91_UDP_ENDBUSRES); -+ at91_udp_write(udc, AT91_UDP_ICR, AT91_UDP_ENDBUSRES); -+ at91_udp_write(udc, AT91_UDP_ICR, AT91_UDP_ENDBUSRES); - VDBG("end bus reset\n"); - udc->addr = 0; - stop_activity(udc); - - /* enable ep0 */ -- at91_udp_write(AT91_UDP_CSR(0), -+ at91_udp_write(udc, AT91_UDP_CSR(0), - AT91_UDP_EPEDS | AT91_UDP_EPTYPE_CTRL); - udc->gadget.speed = USB_SPEED_FULL; - udc->suspended = 0; -- at91_udp_write(AT91_UDP_IER, AT91_UDP_EP(0)); -+ at91_udp_write(udc, AT91_UDP_IER, AT91_UDP_EP(0)); - - /* - * NOTE: this driver keeps clocks off unless the -@@ -1406,9 +1407,9 @@ - - /* host initiated suspend (3+ms bus idle) */ - } else if (status & AT91_UDP_RXSUSP) { -- at91_udp_write(AT91_UDP_IDR, AT91_UDP_RXSUSP); -- at91_udp_write(AT91_UDP_IER, AT91_UDP_RXRSM); -- at91_udp_write(AT91_UDP_ICR, AT91_UDP_RXSUSP); -+ at91_udp_write(udc, AT91_UDP_IDR, AT91_UDP_RXSUSP); -+ at91_udp_write(udc, AT91_UDP_IER, AT91_UDP_RXRSM); -+ at91_udp_write(udc, AT91_UDP_ICR, AT91_UDP_RXSUSP); - // VDBG("bus suspend\n"); - if (udc->suspended) - continue; -@@ -1425,9 +1426,9 @@ - - /* host initiated resume */ - } else if (status & AT91_UDP_RXRSM) { -- at91_udp_write(AT91_UDP_IDR, AT91_UDP_RXRSM); -- at91_udp_write(AT91_UDP_IER, AT91_UDP_RXSUSP); -- at91_udp_write(AT91_UDP_ICR, AT91_UDP_RXRSM); -+ at91_udp_write(udc, AT91_UDP_IDR, AT91_UDP_RXRSM); -+ at91_udp_write(udc, AT91_UDP_IER, AT91_UDP_RXSUSP); -+ at91_udp_write(udc, AT91_UDP_ICR, AT91_UDP_RXRSM); - // VDBG("bus resume\n"); - if (!udc->suspended) - continue; -@@ -1479,17 +1480,16 @@ - } - }, - .ep[0] = { -+ .id = 0, - .ep = { - .name = ep0name, - .ops = &at91_ep_ops, - }, - .udc = &controller, - .maxpacket = 8, -- .creg = (void __iomem *)(AT91_VA_BASE_UDP -- + AT91_UDP_CSR(0)), -- .int_mask = 1 << 0, - }, - .ep[1] = { -+ .id = 1, - .ep = { - .name = "ep1", - .ops = &at91_ep_ops, -@@ -1497,11 +1497,9 @@ - .udc = &controller, - .is_pingpong = 1, - .maxpacket = 64, -- .creg = (void __iomem *)(AT91_VA_BASE_UDP -- + AT91_UDP_CSR(1)), -- .int_mask = 1 << 1, - }, - .ep[2] = { -+ .id = 2, - .ep = { - .name = "ep2", - .ops = &at91_ep_ops, -@@ -1509,11 +1507,9 @@ - .udc = &controller, - .is_pingpong = 1, - .maxpacket = 64, -- .creg = (void __iomem *)(AT91_VA_BASE_UDP -- + AT91_UDP_CSR(2)), -- .int_mask = 1 << 2, - }, - .ep[3] = { -+ .id = 3, - .ep = { - /* could actually do bulk too */ - .name = "ep3-int", -@@ -1521,11 +1517,9 @@ - }, - .udc = &controller, - .maxpacket = 8, -- .creg = (void __iomem *)(AT91_VA_BASE_UDP -- + AT91_UDP_CSR(3)), -- .int_mask = 1 << 3, - }, - .ep[4] = { -+ .id = 4, - .ep = { - .name = "ep4", - .ops = &at91_ep_ops, -@@ -1533,11 +1527,9 @@ - .udc = &controller, - .is_pingpong = 1, - .maxpacket = 256, -- .creg = (void __iomem *)(AT91_VA_BASE_UDP -- + AT91_UDP_CSR(4)), -- .int_mask = 1 << 4, - }, - .ep[5] = { -+ .id = 5, - .ep = { - .name = "ep5", - .ops = &at91_ep_ops, -@@ -1545,9 +1537,6 @@ - .udc = &controller, - .is_pingpong = 1, - .maxpacket = 256, -- .creg = (void __iomem *)(AT91_VA_BASE_UDP -- + AT91_UDP_CSR(5)), -- .int_mask = 1 << 5, - }, - /* ep6 and ep7 are also reserved (custom silicon might use them) */ - }; -@@ -1616,7 +1605,7 @@ - - local_irq_disable(); - udc->enabled = 0; -- at91_udp_write(AT91_UDP_IDR, ~0); -+ at91_udp_write(udc, AT91_UDP_IDR, ~0); - pullup(udc, 0); - local_irq_enable(); - -@@ -1641,6 +1630,7 @@ - struct device *dev = &pdev->dev; - struct at91_udc *udc; - int retval; -+ struct resource *res; - - if (!dev->platform_data) { - /* small (so we copy it) but critical! */ -@@ -1658,7 +1648,11 @@ - return -ENODEV; - } - -- if (!request_mem_region(AT91RM9200_BASE_UDP, SZ_16K, driver_name)) { -+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ if (!res) -+ return -ENXIO; ++config FB_INTSRAM ++ bool "Frame Buffer in internal SRAM" ++ depends on FB_ATMEL && ARCH_AT91SAM9261 ++ help ++ Say Y if you want to map Frame Buffer in internal SRAM. Say N if you want ++ to let frame buffer in external SDRAM. ++ + config FB_NVIDIA + tristate "nVidia Framebuffer Support" + depends on FB && PCI +diff -urN -x CVS linux-2.6.21/drivers/video/Makefile linux-2.6-stable/drivers/video/Makefile +--- linux-2.6.21/drivers/video/Makefile Thu Apr 26 05:08:32 2007 ++++ linux-2.6-stable/drivers/video/Makefile Thu May 10 12:34:01 2007 +@@ -75,6 +75,8 @@ + obj-$(CONFIG_FB_SA1100) += sa1100fb.o + obj-$(CONFIG_FB_HIT) += hitfb.o + obj-$(CONFIG_FB_EPSON1355) += epson1355fb.o ++obj-$(CONFIG_FB_S1D15605) += s1d15605fb.o ++obj-$(CONFIG_FB_ATMEL) += atmel_lcdfb.o + obj-$(CONFIG_FB_PVR2) += pvr2fb.o + obj-$(CONFIG_FB_VOODOO1) += sstfb.o + obj-$(CONFIG_FB_ARMCLCD) += amba-clcd.o +diff -urN -x CVS linux-2.6.21/drivers/video/atmel_lcdfb.c linux-2.6-stable/drivers/video/atmel_lcdfb.c +--- linux-2.6.21/drivers/video/atmel_lcdfb.c Thu Jan 1 02:00:00 1970 ++++ linux-2.6-stable/drivers/video/atmel_lcdfb.c Thu May 10 12:34:01 2007 +@@ -0,0 +1,752 @@ ++/* ++ * Driver for AT91/AT32 LCD Controller ++ * ++ * Copyright (C) 2007 Atmel Corporation ++ * ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file COPYING in the main directory of this archive for ++ * more details. ++ */ + -+ if (!request_mem_region(res->start, res->end - res->start + 1, driver_name)) { - DBG("someone's using UDC memory\n"); - return -EBUSY; - } -@@ -1668,15 +1662,23 @@ - udc->gadget.dev.parent = dev; - udc->board = *(struct at91_udc_data *) dev->platform_data; - udc->pdev = pdev; -- udc_reinit(udc); - udc->enabled = 0; - -+ udc->udp_baseaddr = ioremap(res->start, res->end - res->start + 1); -+ if (!udc->udp_baseaddr) { -+ release_mem_region(res->start, res->end - res->start + 1); -+ return -ENOMEM; -+ } ++#include <linux/kernel.h> ++#include <linux/platform_device.h> ++#include <linux/dma-mapping.h> ++#include <linux/interrupt.h> ++#include <linux/clk.h> ++#include <linux/fb.h> ++#include <linux/init.h> ++#include <linux/delay.h> + -+ udc_reinit(udc); ++#include <asm/arch/board.h> ++#include <asm/arch/cpu.h> ++#include <asm/arch/gpio.h> + - /* get interface and function clocks */ - udc->iclk = clk_get(dev, "udc_clk"); - udc->fclk = clk_get(dev, "udpck"); - if (IS_ERR(udc->iclk) || IS_ERR(udc->fclk)) { - DBG("clocks missing\n"); -- return -ENODEV; -+ retval = -ENODEV; -+ goto fail0; - } - - retval = device_register(&udc->gadget.dev); -@@ -1685,8 +1687,10 @@ - - /* don't do anything until we have both gadget driver and VBUS */ - clk_enable(udc->iclk); -- at91_udp_write(AT91_UDP_TXVC, AT91_UDP_TXVC_TXVDIS); -- at91_udp_write(AT91_UDP_IDR, 0xffffffff); -+ at91_udp_write(udc, AT91_UDP_TXVC, AT91_UDP_TXVC_TXVDIS); -+ at91_udp_write(udc, AT91_UDP_IDR, 0xffffffff); -+ /* Clear all pending interrupts - UDP may be used by bootloader. */ -+ at91_udp_write(udc, AT91_UDP_ICR, 0xffffffff); - clk_disable(udc->iclk); - - /* request UDC and maybe VBUS irqs */ -@@ -1698,6 +1702,11 @@ - goto fail1; - } - if (udc->board.vbus_pin > 0) { -+ /* -+ * Get the initial state of VBUS - we cannot expect -+ * a pending interrupt. -+ */ -+ udc->vbus = at91_get_gpio_value(udc->board.vbus_pin); - if (request_irq(udc->board.vbus_pin, at91_vbus_irq, - IRQF_DISABLED, driver_name, udc)) { - DBG("request vbus irq %d failed\n", -@@ -1720,7 +1729,7 @@ - fail1: - device_unregister(&udc->gadget.dev); - fail0: -- release_mem_region(AT91RM9200_BASE_UDP, SZ_16K); -+ release_mem_region(res->start, res->end - res->start + 1); - DBG("%s probe failed, %d\n", driver_name, retval); - return retval; - } -@@ -1728,6 +1737,7 @@ - static int __devexit at91udc_remove(struct platform_device *pdev) - { - struct at91_udc *udc = platform_get_drvdata(pdev); -+ struct resource *res; - - DBG("remove\n"); - -@@ -1742,7 +1752,10 @@ - free_irq(udc->board.vbus_pin, udc); - free_irq(udc->udp_irq, udc); - device_unregister(&udc->gadget.dev); -- release_mem_region(AT91RM9200_BASE_UDP, SZ_16K); ++#include <video/atmel_lcdc.h> + -+ iounmap(udc->udp_baseaddr); -+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ release_mem_region(res->start, res->end - res->start + 1); - - clk_put(udc->iclk); - clk_put(udc->fclk); -diff -urN -x CVS linux-2.6.19-final/drivers/usb/gadget/at91_udc.h linux-2.6.19/drivers/usb/gadget/at91_udc.h ---- linux-2.6.19-final/drivers/usb/gadget/at91_udc.h Mon Dec 4 16:34:04 2006 -+++ linux-2.6.19/drivers/usb/gadget/at91_udc.h Thu Nov 16 17:30:01 2006 -@@ -51,10 +51,10 @@ - #define AT91_UDP_EP(n) (1 << (n)) /* Endpoint Interrupt Status */ - #define AT91_UDP_RXSUSP (1 << 8) /* USB Suspend Interrupt Status */ - #define AT91_UDP_RXRSM (1 << 9) /* USB Resume Interrupt Status */ --#define AT91_UDP_EXTRSM (1 << 10) /* External Resume Interrupt Status */ -+#define AT91_UDP_EXTRSM (1 << 10) /* External Resume Interrupt Status [AT91RM9200 only] */ - #define AT91_UDP_SOFINT (1 << 11) /* Start of Frame Interrupt Status */ - #define AT91_UDP_ENDBUSRES (1 << 12) /* End of Bus Reset Interrpt Status */ --#define AT91_UDP_WAKEUP (1 << 13) /* USB Wakeup Interrupt Status */ -+#define AT91_UDP_WAKEUP (1 << 13) /* USB Wakeup Interrupt Status [AT91RM9200 only] */ - - #define AT91_UDP_ICR 0x20 /* Interrupt Clear Register */ - #define AT91_UDP_RST_EP 0x28 /* Reset Endpoint Register */ -@@ -84,7 +84,7 @@ - - #define AT91_UDP_TXVC 0x74 /* Transceiver Control Register */ - #define AT91_UDP_TXVC_TXVDIS (1 << 8) /* Transceiver Disable */ -- -+#define AT91_UDP_TXVC_PUON (1 << 9) /* PullUp On [AT91SAM9260 only] */ - - /*-------------------------------------------------------------------------*/ - -@@ -105,10 +105,10 @@ - struct usb_ep ep; - struct list_head queue; - struct at91_udc *udc; -+ u8 id; - void __iomem *creg; - - unsigned maxpacket:16; -- u8 int_mask; - unsigned is_pingpong:1; - - unsigned stopped:1; -@@ -141,6 +141,7 @@ - struct clk *iclk, *fclk; - struct platform_device *pdev; - struct proc_dir_entry *pde; -+ void __iomem *udp_baseaddr; - int udp_irq; - }; - -diff -urN -x CVS linux-2.6.19-final/drivers/usb/host/ohci-at91.c linux-2.6.19/drivers/usb/host/ohci-at91.c ---- linux-2.6.19-final/drivers/usb/host/ohci-at91.c Mon Dec 4 16:40:49 2006 -+++ linux-2.6.19/drivers/usb/host/ohci-at91.c Mon Oct 16 17:19:45 2006 -@@ -187,7 +187,6 @@ - { - struct at91_usbh_data *board = hcd->self.controller->platform_data; - struct ohci_hcd *ohci = hcd_to_ohci (hcd); -- struct usb_device *root = hcd->self.root_hub; - int ret; - - if ((ret = ohci_init(ohci)) < 0) -diff -urN -x CVS linux-2.6.19-final/drivers/usb/host/ohci-hcd.c linux-2.6.19/drivers/usb/host/ohci-hcd.c ---- linux-2.6.19-final/drivers/usb/host/ohci-hcd.c Mon Dec 4 16:40:49 2006 -+++ linux-2.6.19/drivers/usb/host/ohci-hcd.c Thu Nov 30 09:08:25 2006 -@@ -935,7 +935,7 @@ - #include "ohci-ppc-soc.c" - #endif - --#if defined(CONFIG_ARCH_AT91RM9200) || defined(CONFIG_ARCH_AT91SAM9261) -+#ifdef CONFIG_ARCH_AT91 - #include "ohci-at91.c" - #endif - -@@ -952,8 +952,7 @@ - || defined (CONFIG_ARCH_EP93XX) \ - || defined (CONFIG_SOC_AU1X00) \ - || defined (CONFIG_USB_OHCI_HCD_PPC_SOC) \ -- || defined (CONFIG_ARCH_AT91RM9200) \ -- || defined (CONFIG_ARCH_AT91SAM9261) \ -+ || defined (CONFIG_ARCH_AT91) \ - || defined (CONFIG_ARCH_PNX4008) \ - ) - #error "missing bus glue for ohci-hcd" -diff -urN -x CVS linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91_aic.h linux-2.6.19/include/asm-arm/arch-at91rm9200/at91_aic.h ---- linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91_aic.h Thu Jan 1 02:00:00 1970 -+++ linux-2.6.19/include/asm-arm/arch-at91rm9200/at91_aic.h Tue Oct 24 16:14:13 2006 -@@ -0,0 +1,53 @@ -+/* -+ * include/asm-arm/arch-at91rm9200/at91_aic.h -+ * -+ * Copyright (C) 2005 Ivan Kokshaysky -+ * Copyright (C) SAN People -+ * -+ * Advanced Interrupt Controller (AIC) - System peripherals registers. -+ * Based on AT91RM9200 datasheet revision E. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ */ ++#define lcdc_readl(sinfo, reg) __raw_readl((sinfo)->mmio+(reg)) ++#define lcdc_writel(sinfo, reg, val) __raw_writel((val), (sinfo)->mmio+(reg)) + -+#ifndef AT91_AIC_H -+#define AT91_AIC_H -+ -+#define AT91_AIC_SMR(n) (AT91_AIC + ((n) * 4)) /* Source Mode Registers 0-31 */ -+#define AT91_AIC_PRIOR (7 << 0) /* Priority Level */ -+#define AT91_AIC_SRCTYPE (3 << 5) /* Interrupt Source Type */ -+#define AT91_AIC_SRCTYPE_LOW (0 << 5) -+#define AT91_AIC_SRCTYPE_FALLING (1 << 5) -+#define AT91_AIC_SRCTYPE_HIGH (2 << 5) -+#define AT91_AIC_SRCTYPE_RISING (3 << 5) -+ -+#define AT91_AIC_SVR(n) (AT91_AIC + 0x80 + ((n) * 4)) /* Source Vector Registers 0-31 */ -+#define AT91_AIC_IVR (AT91_AIC + 0x100) /* Interrupt Vector Register */ -+#define AT91_AIC_FVR (AT91_AIC + 0x104) /* Fast Interrupt Vector Register */ -+#define AT91_AIC_ISR (AT91_AIC + 0x108) /* Interrupt Status Register */ -+#define AT91_AIC_IRQID (0x1f << 0) /* Current Interrupt Identifier */ -+ -+#define AT91_AIC_IPR (AT91_AIC + 0x10c) /* Interrupt Pending Register */ -+#define AT91_AIC_IMR (AT91_AIC + 0x110) /* Interrupt Mask Register */ -+#define AT91_AIC_CISR (AT91_AIC + 0x114) /* Core Interrupt Status Register */ -+#define AT91_AIC_NFIQ (1 << 0) /* nFIQ Status */ -+#define AT91_AIC_NIRQ (1 << 1) /* nIRQ Status */ -+ -+#define AT91_AIC_IECR (AT91_AIC + 0x120) /* Interrupt Enable Command Register */ -+#define AT91_AIC_IDCR (AT91_AIC + 0x124) /* Interrupt Disable Command Register */ -+#define AT91_AIC_ICCR (AT91_AIC + 0x128) /* Interrupt Clear Command Register */ -+#define AT91_AIC_ISCR (AT91_AIC + 0x12c) /* Interrupt Set Command Register */ -+#define AT91_AIC_EOICR (AT91_AIC + 0x130) /* End of Interrupt Command Register */ -+#define AT91_AIC_SPU (AT91_AIC + 0x134) /* Spurious Interrupt Vector Register */ -+#define AT91_AIC_DCR (AT91_AIC + 0x138) /* Debug Control Register */ -+#define AT91_AIC_DCR_PROT (1 << 0) /* Protection Mode */ -+#define AT91_AIC_DCR_GMSK (1 << 1) /* General Mask */ -+ -+#define AT91_AIC_FFER (AT91_AIC + 0x140) /* Fast Forcing Enable Register [SAM9 only] */ -+#define AT91_AIC_FFDR (AT91_AIC + 0x144) /* Fast Forcing Disable Register [SAM9 only] */ -+#define AT91_AIC_FFSR (AT91_AIC + 0x148) /* Fast Forcing Status Register [SAM9 only] */ ++/* configurable parameters */ ++#define ATMEL_LCDC_CVAL_DEFAULT 0xc8 ++#define ATMEL_LCDC_DMA_BURST_LEN 8 + ++#if defined(CONFIG_ARCH_AT91SAM9263) ++#define ATMEL_LCDC_FIFO_SIZE 2048 ++#else ++#define ATMEL_LCDC_FIFO_SIZE 512 +#endif -diff -urN -x CVS linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91_dbgu.h linux-2.6.19/include/asm-arm/arch-at91rm9200/at91_dbgu.h ---- linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91_dbgu.h Thu Jan 1 02:00:00 1970 -+++ linux-2.6.19/include/asm-arm/arch-at91rm9200/at91_dbgu.h Tue Oct 24 16:03:07 2006 -@@ -0,0 +1,45 @@ -+/* -+ * include/asm-arm/arch-at91rm9200/at91_dbgu.h -+ * -+ * Copyright (C) 2005 Ivan Kokshaysky -+ * Copyright (C) SAN People -+ * -+ * Debug Unit (DBGU) - System peripherals registers. -+ * Based on AT91RM9200 datasheet revision E. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ */ + -+#ifndef AT91_DBGU_H -+#define AT91_DBGU_H -+ -+#define AT91_DBGU_CR (AT91_DBGU + 0x00) /* Control Register */ -+#define AT91_DBGU_MR (AT91_DBGU + 0x04) /* Mode Register */ -+#define AT91_DBGU_IER (AT91_DBGU + 0x08) /* Interrupt Enable Register */ -+#define AT91_DBGU_TXRDY (1 << 1) /* Transmitter Ready */ -+#define AT91_DBGU_TXEMPTY (1 << 9) /* Transmitter Empty */ -+#define AT91_DBGU_IDR (AT91_DBGU + 0x0c) /* Interrupt Disable Register */ -+#define AT91_DBGU_IMR (AT91_DBGU + 0x10) /* Interrupt Mask Register */ -+#define AT91_DBGU_SR (AT91_DBGU + 0x14) /* Status Register */ -+#define AT91_DBGU_RHR (AT91_DBGU + 0x18) /* Receiver Holding Register */ -+#define AT91_DBGU_THR (AT91_DBGU + 0x1c) /* Transmitter Holding Register */ -+#define AT91_DBGU_BRGR (AT91_DBGU + 0x20) /* Baud Rate Generator Register */ -+ -+#define AT91_DBGU_CIDR (AT91_DBGU + 0x40) /* Chip ID Register */ -+#define AT91_DBGU_EXID (AT91_DBGU + 0x44) /* Chip ID Extension Register */ -+#define AT91_CIDR_VERSION (0x1f << 0) /* Version of the Device */ -+#define AT91_CIDR_EPROC (7 << 5) /* Embedded Processor */ -+#define AT91_CIDR_NVPSIZ (0xf << 8) /* Nonvolatile Program Memory Size */ -+#define AT91_CIDR_NVPSIZ2 (0xf << 12) /* Second Nonvolatile Program Memory Size */ -+#define AT91_CIDR_SRAMSIZ (0xf << 16) /* Internal SRAM Size */ -+#define AT91_CIDR_ARCH (0xff << 20) /* Architecture Identifier */ -+#define AT91_CIDR_NVPTYP (7 << 28) /* Nonvolatile Program Memory Type */ -+#define AT91_CIDR_EXT (1 << 31) /* Extension Flag */ -+ -+#define AT91_DBGU_FNR (AT91_DBGU + 0x48) /* Force NTRST Register [SAM9 only] */ -+#define AT91_DBGU_FNTRST (1 << 0) /* Force NTRST */ ++#if defined(CONFIG_ARCH_AT91) ++#define ATMEL_LCDFB_FBINFO_DEFAULT FBINFO_DEFAULT ++ ++static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo, ++ struct fb_var_screeninfo *var) ++{ ++ ++} ++#elif defined(CONFIG_AVR32) ++#define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \ ++ | FBINFO_PARTIAL_PAN_OK \ ++ | FBINFO_HWACCEL_XPAN \ ++ | FBINFO_HWACCEL_YPAN) ++ ++static void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo, ++ struct fb_var_screeninfo *var) ++{ ++ u32 dma2dcfg; ++ u32 pixeloff; ++ ++ pixeloff = (var->xoffset * var->bits_per_pixel) & 0x1f; + ++ dma2dcfg = ((var->xres_virtual - var->xres) * var->bits_per_pixel) / 8; ++ dma2dcfg |= pixeloff << ATMEL_LCDC_PIXELOFF_OFFSET; ++ lcdc_writel(sinfo, ATMEL_LCDC_DMA2DCFG, dma2dcfg); ++ ++ /* Update configuration */ ++ lcdc_writel(sinfo, ATMEL_LCDC_DMACON, ++ lcdc_readl(sinfo, ATMEL_LCDC_DMACON) ++ | ATMEL_LCDC_DMAUPDT); ++} +#endif -diff -urN -x CVS linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91_ecc.h linux-2.6.19/include/asm-arm/arch-at91rm9200/at91_ecc.h ---- linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91_ecc.h Thu Jan 1 02:00:00 1970 -+++ linux-2.6.19/include/asm-arm/arch-at91rm9200/at91_ecc.h Wed Nov 15 11:56:12 2006 -@@ -0,0 +1,38 @@ -+/* -+ * include/asm-arm/arch-at91rm9200/at91_ecc.h -+ * -+ * Error Corrected Code Controller (ECC) - System peripherals regsters. -+ * Based on AT91SAM9260 datasheet revision B. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License as published by the -+ * Free Software Foundation; either version 2 of the License, or (at your -+ * option) any later version. -+ */ + -+#ifndef AT91_ECC_H -+#define AT91_ECC_H + -+#define AT91_ECC_CR (AT91_ECC + 0x00) /* Control register */ -+#define AT91_ECC_RST (1 << 0) /* Reset parity */ ++static struct fb_fix_screeninfo atmel_lcdfb_fix __initdata = { ++ .type = FB_TYPE_PACKED_PIXELS, ++ .visual = FB_VISUAL_TRUECOLOR, ++ .xpanstep = 0, ++ .ypanstep = 0, ++ .ywrapstep = 0, ++ .accel = FB_ACCEL_NONE, ++}; + -+#define AT91_ECC_MR (AT91_ECC + 0x04) /* Mode register */ -+#define AT91_ECC_PAGESIZE (3 << 0) /* Page Size */ -+#define AT91_ECC_PAGESIZE_528 (0) -+#define AT91_ECC_PAGESIZE_1056 (1) -+#define AT91_ECC_PAGESIZE_2112 (2) -+#define AT91_ECC_PAGESIZE_4224 (3) + -+#define AT91_ECC_SR (AT91_ECC + 0x08) /* Status register */ -+#define AT91_ECC_RECERR (1 << 0) /* Recoverable Error */ -+#define AT91_ECC_ECCERR (1 << 1) /* ECC Single Bit Error */ -+#define AT91_ECC_MULERR (1 << 2) /* Multiple Errors */ ++static void atmel_lcdfb_update_dma(struct fb_info *info, ++ struct fb_var_screeninfo *var) ++{ ++ struct atmel_lcdfb_info *sinfo = info->par; ++ struct fb_fix_screeninfo *fix = &info->fix; ++ unsigned long dma_addr; + -+#define AT91_ECC_PR (AT91_ECC + 0x0c) /* Parity register */ -+#define AT91_ECC_BITADDR (0xf << 0) /* Bit Error Address */ -+#define AT91_ECC_WORDADDR (0xfff << 4) /* Word Error Address */ ++ dma_addr = (fix->smem_start + var->yoffset * fix->line_length ++ + var->xoffset * var->bits_per_pixel / 8); + -+#define AT91_ECC_NPR (AT91_ECC + 0x10) /* NParity register */ -+#define AT91_ECC_NPARITY (0xffff << 0) /* NParity */ ++ dma_addr &= ~3UL; + -+#endif -diff -urN -x CVS linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91_lcdc.h linux-2.6.19/include/asm-arm/arch-at91rm9200/at91_lcdc.h ---- linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91_lcdc.h Thu Jan 1 02:00:00 1970 -+++ linux-2.6.19/include/asm-arm/arch-at91rm9200/at91_lcdc.h Sat Nov 25 11:06:19 2006 -@@ -0,0 +1,148 @@ -+/* -+ * include/asm-arm/arch-at91rm9200/at91_lcdc.h -+ * -+ * LCD Controller (LCDC). -+ * Based on AT91SAM9261 datasheet revision E. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. ++ /* Set framebuffer DMA base address and pixel offset */ ++ lcdc_writel(sinfo, ATMEL_LCDC_DMABADDR1, dma_addr); ++ ++ atmel_lcdfb_update_dma2d(sinfo, var); ++} ++ ++static inline void atmel_lcdfb_free_video_memory(struct atmel_lcdfb_info *sinfo) ++{ ++ struct fb_info *info = sinfo->info; ++ ++ dma_free_writecombine(info->device, info->fix.smem_len, ++ info->screen_base, info->fix.smem_start); ++} ++ ++/** ++ * atmel_lcdfb_alloc_video_memory - Allocate framebuffer memory ++ * @sinfo: the frame buffer to allocate memory for + */ ++static int atmel_lcdfb_alloc_video_memory(struct atmel_lcdfb_info *sinfo) ++{ ++ struct fb_info *info = sinfo->info; ++ struct fb_var_screeninfo *var = &info->var; + -+#ifndef AT91_LCDC_H -+#define AT91_LCDC_H -+ -+#define AT91_LCDC_DMABADDR1 0x00 /* DMA Base Address Register 1 */ -+#define AT91_LCDC_DMABADDR2 0x04 /* DMA Base Address Register 2 */ -+#define AT91_LCDC_DMAFRMPT1 0x08 /* DMA Frame Pointer Register 1 */ -+#define AT91_LCDC_DMAFRMPT2 0x0c /* DMA Frame Pointer Register 2 */ -+#define AT91_LCDC_DMAFRMADD1 0x10 /* DMA Frame Address Register 1 */ -+#define AT91_LCDC_DMAFRMADD2 0x14 /* DMA Frame Address Register 2 */ -+ -+#define AT91_LCDC_DMAFRMCFG 0x18 /* DMA Frame Configuration Register */ -+#define AT91_LCDC_FRSIZE (0x7fffff << 0) /* Frame Size */ -+#define AT91_LCDC_BLENGTH (0x7f << 24) /* Burst Length */ -+ -+#define AT91_LCDC_DMACON 0x1c /* DMA Control Register */ -+#define AT91_LCDC_DMAEN (0x1 << 0) /* DMA Enable */ -+#define AT91_LCDC_DMARST (0x1 << 1) /* DMA Reset */ -+#define AT91_LCDC_DMABUSY (0x1 << 2) /* DMA Busy */ -+ -+#define AT91_LCDC_LCDCON1 0x0800 /* LCD Control Register 1 */ -+#define AT91_LCDC_BYPASS (1 << 0) /* Bypass lcd_dotck divider */ -+#define AT91_LCDC_CLKVAL (0x1ff << 12) /* Clock Divider */ -+#define AT91_LCDC_LINCNT (0x7ff << 21) /* Line Counter */ -+ -+#define AT91_LCDC_LCDCON2 0x0804 /* LCD Control Register 2 */ -+#define AT91_LCDC_DISTYPE (3 << 0) /* Display Type */ -+#define AT91_LCDC_DISTYPE_STNMONO (0 << 0) -+#define AT91_LCDC_DISTYPE_STNCOLOR (1 << 0) -+#define AT91_LCDC_DISTYPE_TFT (2 << 0) -+#define AT91_LCDC_SCANMOD (1 << 2) /* Scan Mode */ -+#define AT91_LCDC_SCANMOD_SINGLE (0 << 2) -+#define AT91_LCDC_SCANMOD_DUAL (1 << 2) -+#define AT91_LCDC_IFWIDTH (3 << 3) /*Interface Width */ -+#define AT91_LCDC_IFWIDTH_4 (0 << 3) -+#define AT91_LCDC_IFWIDTH_8 (1 << 3) -+#define AT91_LCDC_IFWIDTH_16 (2 << 3) -+#define AT91_LCDC_PIXELSIZE (7 << 5) /* Bits per pixel */ -+#define AT91_LCDC_PIXELSIZE_1 (0 << 5) -+#define AT91_LCDC_PIXELSIZE_2 (1 << 5) -+#define AT91_LCDC_PIXELSIZE_4 (2 << 5) -+#define AT91_LCDC_PIXELSIZE_8 (3 << 5) -+#define AT91_LCDC_PIXELSIZE_16 (4 << 5) -+#define AT91_LCDC_PIXELSIZE_24 (5 << 5) -+#define AT91_LCDC_INVVD (1 << 8) /* LCD Data polarity */ -+#define AT91_LCDC_INVVD_NORMAL (0 << 8) -+#define AT91_LCDC_INVVD_INVERTED (1 << 8) -+#define AT91_LCDC_INVFRAME (1 << 9 ) /* LCD VSync polarity */ -+#define AT91_LCDC_INVFRAME_NORMAL (0 << 9) -+#define AT91_LCDC_INVFRAME_INVERTED (1 << 9) -+#define AT91_LCDC_INVLINE (1 << 10) /* LCD HSync polarity */ -+#define AT91_LCDC_INVLINE_NORMAL (0 << 10) -+#define AT91_LCDC_INVLINE_INVERTED (1 << 10) -+#define AT91_LCDC_INVCLK (1 << 11) /* LCD dotclk polarity */ -+#define AT91_LCDC_INVCLK_NORMAL (0 << 11) -+#define AT91_LCDC_INVCLK_INVERTED (1 << 11) -+#define AT91_LCDC_INVDVAL (1 << 12) /* LCD dval polarity */ -+#define AT91_LCDC_INVDVAL_NORMAL (0 << 12) -+#define AT91_LCDC_INVDVAL_INVERTED (1 << 12) -+#define AT91_LCDC_CLKMOD (1 << 15) /* LCD dotclk mode */ -+#define AT91_LCDC_CLKMOD_ACTIVEDISPLAY (0 << 15) -+#define AT91_LCDC_CLKMOD_ALWAYSACTIVE (1 << 15) -+#define AT91_LCDC_MEMOR (1 << 31) /* Memory Ordering Format */ -+#define AT91_LCDC_MEMOR_BIG (0 << 31) -+#define AT91_LCDC_MEMOR_LITTLE (1 << 31) -+ -+#define AT91_LCDC_TIM1 0x0808 /* LCD Timing Register 1 */ -+#define AT91_LCDC_VFP (0xff << 0) /* Vertical Front Porch */ -+#define AT91_LCDC_VBP (0xff << 8) /* Vertical Back Porch */ -+#define AT91_LCDC_VPW (0x3f << 16) /* Vertical Synchronization Pulse Width */ -+#define AT91_LCDC_VHDLY (0xf << 24) /* Vertical to Horizontal Delay */ -+ -+#define AT91_LCDC_TIM2 0x080c /* LCD Timing Register 2 */ -+#define AT91_LCDC_HBP (0xff << 0) /* Horizontal Back Porch */ -+#define AT91_LCDC_HPW (0x3f << 8) /* Horizontal Synchronization Pulse Width */ -+#define AT91_LCDC_HFP (0x7ff << 21) /* Horizontal Front Porch */ -+ -+#define AT91_LCDC_LCDFRMCFG 0x0810 /* LCD Frame Configuration Register */ -+#define AT91_LCDC_LINEVAL (0x7ff << 0) /* Vertical Size of LCD Module */ -+#define AT91_LCDC_HOZVAL (0x7ff << 21) /* Horizontal Size of LCD Module */ -+ -+#define AT91_LCDC_FIFO 0x0814 /* LCD FIFO Register */ -+#define AT91_LCDC_FIFOTH (0xffff) /* FIFO Threshold */ -+ -+#define AT91_LCDC_DP1_2 0x081c /* Dithering Pattern DP1_2 Register */ -+#define AT91_LCDC_DP4_7 0x0820 /* Dithering Pattern DP4_7 Register */ -+#define AT91_LCDC_DP3_5 0x0824 /* Dithering Pattern DP3_5 Register */ -+#define AT91_LCDC_DP2_3 0x0828 /* Dithering Pattern DP2_3 Register */ -+#define AT91_LCDC_DP5_7 0x082c /* Dithering Pattern DP5_7 Register */ -+#define AT91_LCDC_DP3_4 0x0830 /* Dithering Pattern DP3_4 Register */ -+#define AT91_LCDC_DP4_5 0x0834 /* Dithering Pattern DP4_5 Register */ -+#define AT91_LCDC_DP6_7 0x0838 /* Dithering Pattern DP6_7 Register */ -+#define AT91_LCDC_DP1_2_VAL (0xff) -+#define AT91_LCDC_DP4_7_VAL (0xfffffff) -+#define AT91_LCDC_DP3_5_VAL (0xfffff) -+#define AT91_LCDC_DP2_3_VAL (0xfff) -+#define AT91_LCDC_DP5_7_VAL (0xfffffff) -+#define AT91_LCDC_DP3_4_VAL (0xffff) -+#define AT91_LCDC_DP4_5_VAL (0xfffff) -+#define AT91_LCDC_DP6_7_VAL (0xfffffff) -+ -+#define AT91_LCDC_PWRCON 0x083c /* Power Control Register */ -+#define AT91_LCDC_PWR (1 << 0) /* LCD Module Power Control */ -+#define AT91_LCDC_GUARDT (0x7f << 1) /* Delay in Frame Period */ -+#define AT91_LCDC_BUSY (1 << 31) /* LCD Busy */ -+ -+#define AT91_LCDC_CONTRAST_CTR 0x0840 /* Contrast Control Register */ -+#define AT91_LCDC_PS (3 << 0) /* Contrast Counter Prescaler */ -+#define AT91_LCDC_PS_DIV1 (0 << 0) -+#define AT91_LCDC_PS_DIV2 (1 << 0) -+#define AT91_LCDC_PS_DIV4 (2 << 0) -+#define AT91_LCDC_PS_DIV8 (3 << 0) -+#define AT91_LCDC_POL (1 << 2) /* Polarity of output Pulse */ -+#define AT91_LCDC_POL_NEGATIVE (0 << 2) -+#define AT91_LCDC_POL_POSITIVE (1 << 2) -+#define AT91_LCDC_ENA (1 << 3) /* PWM generator Control */ -+#define AT91_LCDC_ENA_PWMDISABLE (0 << 3) -+#define AT91_LCDC_ENA_PWMENABLE (1 << 3) -+ -+#define AT91_LCDC_CONTRAST_VAL 0x0844 /* Contrast Value Register */ -+#define AT91_LCDC_CVAL (0xff) /* PWM compare value */ -+ -+#define AT91_LCDC_IER 0x0848 /* Interrupt Enable Register */ -+#define AT91_LCDC_IDR 0x084c /* Interrupt Disable Register */ -+#define AT91_LCDC_IMR 0x0850 /* Interrupt Mask Register */ -+#define AT91_LCDC_ISR 0x0854 /* Interrupt Enable Register */ -+#define AT91_LCDC_ICR 0x0858 /* Interrupt Clear Register */ -+#define AT91_LCDC_LNI (1 << 0) /* Line Interrupt */ -+#define AT91_LCDC_LSTLNI (1 << 1) /* Last Line Interrupt */ -+#define AT91_LCDC_EOFI (1 << 2) /* DMA End Of Frame Interrupt */ -+#define AT91_LCDC_UFLWI (1 << 4) /* FIFO Underflow Interrupt */ -+#define AT91_LCDC_OWRI (1 << 5) /* FIFO Overwrite Interrupt */ -+#define AT91_LCDC_MERI (1 << 6) /* DMA Memory Error Interrupt */ -+ -+#define AT91_LCDC_LUT_(n) (0x0c00 + ((n)*4)) /* Palette Entry 0..255 */ ++ info->fix.smem_len = (var->xres_virtual * var->yres_virtual ++ * ((var->bits_per_pixel + 7) / 8)); + -+#endif -diff -urN -x CVS linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91_mci.h linux-2.6.19/include/asm-arm/arch-at91rm9200/at91_mci.h ---- linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91_mci.h Thu Jan 1 02:00:00 1970 -+++ linux-2.6.19/include/asm-arm/arch-at91rm9200/at91_mci.h Mon Nov 6 12:20:14 2006 -@@ -0,0 +1,106 @@ -+/* -+ * include/asm-arm/arch-at91rm9200/at91_mci.h -+ * -+ * Copyright (C) 2005 Ivan Kokshaysky -+ * Copyright (C) SAN People ++ info->screen_base = dma_alloc_writecombine(info->device, info->fix.smem_len, ++ (dma_addr_t *)&info->fix.smem_start, GFP_KERNEL); ++ ++ if (!info->screen_base) { ++ return -ENOMEM; ++ } ++ ++ return 0; ++} ++ ++/** ++ * atmel_lcdfb_check_var - Validates a var passed in. ++ * @var: frame buffer variable screen structure ++ * @info: frame buffer structure that represents a single frame buffer ++ * ++ * Checks to see if the hardware supports the state requested by ++ * var passed in. This function does not alter the hardware ++ * state!!! This means the data stored in struct fb_info and ++ * struct atmel_lcdfb_info do not change. This includes the var ++ * inside of struct fb_info. Do NOT change these. This function ++ * can be called on its own if we intent to only test a mode and ++ * not actually set it. The stuff in modedb.c is a example of ++ * this. If the var passed in is slightly off by what the ++ * hardware can support then we alter the var PASSED in to what ++ * we can do. If the hardware doesn't support mode change a ++ * -EINVAL will be returned by the upper layers. You don't need ++ * to implement this function then. If you hardware doesn't ++ * support changing the resolution then this function is not ++ * needed. In this case the driver would just provide a var that ++ * represents the static state the screen is in. ++ * ++ * Returns negative errno on error, or zero on success. ++ */ ++static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var, ++ struct fb_info *info) ++{ ++ struct device *dev = info->device; ++ struct atmel_lcdfb_info *sinfo = info->par; ++ unsigned long clk_value_khz; ++ ++ clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000; ++ ++ dev_dbg(dev, "%s:\n", __func__); ++ dev_dbg(dev, " resolution: %ux%u\n", var->xres, var->yres); ++ dev_dbg(dev, " pixclk: %lu KHz\n", PICOS2KHZ(var->pixclock)); ++ dev_dbg(dev, " bpp: %u\n", var->bits_per_pixel); ++ dev_dbg(dev, " clk: %lu KHz\n", clk_value_khz); ++ ++ if ((PICOS2KHZ(var->pixclock) * var->bits_per_pixel / 8) > clk_value_khz) { ++ dev_err(dev, "%lu KHz pixel clock is too fast\n", PICOS2KHZ(var->pixclock)); ++ return -EINVAL; ++ } ++ ++ /* Force same alignment for each line */ ++ var->xres = (var->xres + 3) & ~3UL; ++ var->xres_virtual = (var->xres_virtual + 3) & ~3UL; ++ ++ var->red.msb_right = var->green.msb_right = var->blue.msb_right = 0; ++ var->transp.msb_right = 0; ++ var->transp.offset = var->transp.length = 0; ++ var->xoffset = var->yoffset = 0; ++ ++ switch (var->bits_per_pixel) { ++ case 2: ++ case 4: ++ case 8: ++ var->red.offset = var->green.offset = var->blue.offset = 0; ++ var->red.length = var->green.length = var->blue.length ++ = var->bits_per_pixel; ++ break; ++ case 15: ++ case 16: ++ var->red.offset = 0; ++ var->green.offset = 5; ++ var->blue.offset = 10; ++ var->red.length = var->green.length = var->blue.length = 5; ++ break; ++ case 24: ++ case 32: ++ var->red.offset = 0; ++ var->green.offset = 8; ++ var->blue.offset = 16; ++ var->red.length = var->green.length = var->blue.length = 8; ++ break; ++ default: ++ dev_err(dev, "color depth %d not supported\n", ++ var->bits_per_pixel); ++ return -EINVAL; ++ } ++ ++ return 0; ++} ++ ++/** ++ * atmel_lcdfb_set_par - Alters the hardware state. ++ * @info: frame buffer structure that represents a single frame buffer + * -+ * MultiMedia Card Interface (MCI) registers. -+ * Based on AT91RM9200 datasheet revision F. ++ * Using the fb_var_screeninfo in fb_info we set the resolution ++ * of the this particular framebuffer. This function alters the ++ * par AND the fb_fix_screeninfo stored in fb_info. It doesn't ++ * not alter var in fb_info since we are using that data. This ++ * means we depend on the data in var inside fb_info to be ++ * supported by the hardware. atmel_lcdfb_check_var is always called ++ * before atmel_lcdfb_set_par to ensure this. Again if you can't ++ * change the resolution you don't need this function. + * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. + */ ++static int atmel_lcdfb_set_par(struct fb_info *info) ++{ ++ struct atmel_lcdfb_info *sinfo = info->par; ++ unsigned long value; ++ unsigned long clk_value_khz; + -+#ifndef AT91_MCI_H -+#define AT91_MCI_H -+ -+#define AT91_MCI_CR 0x00 /* Control Register */ -+#define AT91_MCI_MCIEN (1 << 0) /* Multi-Media Interface Enable */ -+#define AT91_MCI_MCIDIS (1 << 1) /* Multi-Media Interface Disable */ -+#define AT91_MCI_PWSEN (1 << 2) /* Power Save Mode Enable */ -+#define AT91_MCI_PWSDIS (1 << 3) /* Power Save Mode Disable */ -+#define AT91_MCI_SWRST (1 << 7) /* Software Reset */ -+ -+#define AT91_MCI_MR 0x04 /* Mode Register */ -+#define AT91_MCI_CLKDIV (0xff << 0) /* Clock Divider */ -+#define AT91_MCI_PWSDIV (7 << 8) /* Power Saving Divider */ -+#define AT91_MCI_PDCPADV (1 << 14) /* PDC Padding Value */ -+#define AT91_MCI_PDCMODE (1 << 15) /* PDC-orientated Mode */ -+#define AT91_MCI_BLKLEN (0xfff << 18) /* Data Block Length */ -+ -+#define AT91_MCI_DTOR 0x08 /* Data Timeout Register */ -+#define AT91_MCI_DTOCYC (0xf << 0) /* Data Timeout Cycle Number */ -+#define AT91_MCI_DTOMUL (7 << 4) /* Data Timeout Multiplier */ -+#define AT91_MCI_DTOMUL_1 (0 << 4) -+#define AT91_MCI_DTOMUL_16 (1 << 4) -+#define AT91_MCI_DTOMUL_128 (2 << 4) -+#define AT91_MCI_DTOMUL_256 (3 << 4) -+#define AT91_MCI_DTOMUL_1K (4 << 4) -+#define AT91_MCI_DTOMUL_4K (5 << 4) -+#define AT91_MCI_DTOMUL_64K (6 << 4) -+#define AT91_MCI_DTOMUL_1M (7 << 4) -+ -+#define AT91_MCI_SDCR 0x0c /* SD Card Register */ -+#define AT91_MCI_SDCSEL (3 << 0) /* SD Card Selector */ -+#define AT91_MCI_SDCBUS (1 << 7) /* 1-bit or 4-bit bus */ -+ -+#define AT91_MCI_ARGR 0x10 /* Argument Register */ -+ -+#define AT91_MCI_CMDR 0x14 /* Command Register */ -+#define AT91_MCI_CMDNB (0x3f << 0) /* Command Number */ -+#define AT91_MCI_RSPTYP (3 << 6) /* Response Type */ -+#define AT91_MCI_RSPTYP_NONE (0 << 6) -+#define AT91_MCI_RSPTYP_48 (1 << 6) -+#define AT91_MCI_RSPTYP_136 (2 << 6) -+#define AT91_MCI_SPCMD (7 << 8) /* Special Command */ -+#define AT91_MCI_SPCMD_NONE (0 << 8) -+#define AT91_MCI_SPCMD_INIT (1 << 8) -+#define AT91_MCI_SPCMD_SYNC (2 << 8) -+#define AT91_MCI_SPCMD_ICMD (4 << 8) -+#define AT91_MCI_SPCMD_IRESP (5 << 8) -+#define AT91_MCI_OPDCMD (1 << 11) /* Open Drain Command */ -+#define AT91_MCI_MAXLAT (1 << 12) /* Max Latency for Command to Response */ -+#define AT91_MCI_TRCMD (3 << 16) /* Transfer Command */ -+#define AT91_MCI_TRCMD_NONE (0 << 16) -+#define AT91_MCI_TRCMD_START (1 << 16) -+#define AT91_MCI_TRCMD_STOP (2 << 16) -+#define AT91_MCI_TRDIR (1 << 18) /* Transfer Direction */ -+#define AT91_MCI_TRTYP (3 << 19) /* Transfer Type */ -+#define AT91_MCI_TRTYP_BLOCK (0 << 19) -+#define AT91_MCI_TRTYP_MULTIPLE (1 << 19) -+#define AT91_MCI_TRTYP_STREAM (2 << 19) -+ -+#define AT91_MCI_RSPR(n) (0x20 + ((n) * 4)) /* Response Registers 0-3 */ -+#define AT91_MCR_RDR 0x30 /* Receive Data Register */ -+#define AT91_MCR_TDR 0x34 /* Transmit Data Register */ -+ -+#define AT91_MCI_SR 0x40 /* Status Register */ -+#define AT91_MCI_CMDRDY (1 << 0) /* Command Ready */ -+#define AT91_MCI_RXRDY (1 << 1) /* Receiver Ready */ -+#define AT91_MCI_TXRDY (1 << 2) /* Transmit Ready */ -+#define AT91_MCI_BLKE (1 << 3) /* Data Block Ended */ -+#define AT91_MCI_DTIP (1 << 4) /* Data Transfer in Progress */ -+#define AT91_MCI_NOTBUSY (1 << 5) /* Data Not Busy */ -+#define AT91_MCI_ENDRX (1 << 6) /* End of RX Buffer */ -+#define AT91_MCI_ENDTX (1 << 7) /* End fo TX Buffer */ -+#define AT91_MCI_SDIOIRQA (1 << 8) /* SDIO Interrupt for Slot A */ -+#define At91_MCI_SDIOIRQB (1 << 9) /* SDIO Interrupt for Slot B [AT91RM9200 only] */ -+#define AT91_MCI_RXBUFF (1 << 14) /* RX Buffer Full */ -+#define AT91_MCI_TXBUFE (1 << 15) /* TX Buffer Empty */ -+#define AT91_MCI_RINDE (1 << 16) /* Response Index Error */ -+#define AT91_MCI_RDIRE (1 << 17) /* Response Direction Error */ -+#define AT91_MCI_RCRCE (1 << 18) /* Response CRC Error */ -+#define AT91_MCI_RENDE (1 << 19) /* Response End Bit Error */ -+#define AT91_MCI_RTOE (1 << 20) /* Reponse Time-out Error */ -+#define AT91_MCI_DCRCE (1 << 21) /* Data CRC Error */ -+#define AT91_MCI_DTOE (1 << 22) /* Data Time-out Error */ -+#define AT91_MCI_OVRE (1 << 30) /* Overrun */ -+#define AT91_MCI_UNRE (1 << 31) /* Underrun */ -+ -+#define AT91_MCI_IER 0x44 /* Interrupt Enable Register */ -+#define AT91_MCI_IDR 0x48 /* Interrupt Disable Register */ -+#define AT91_MCI_IMR 0x4c /* Interrupt Mask Register */ ++ dev_dbg(info->device, "%s:\n", __func__); ++ dev_dbg(info->device, " * resolution: %ux%u (%ux%u virtual)\n", ++ info->var.xres, info->var.yres, ++ info->var.xres_virtual, info->var.yres_virtual); + -+#endif -diff -urN -x CVS linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91_pdc.h linux-2.6.19/include/asm-arm/arch-at91rm9200/at91_pdc.h ---- linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91_pdc.h Thu Jan 1 02:00:00 1970 -+++ linux-2.6.19/include/asm-arm/arch-at91rm9200/at91_pdc.h Tue Oct 24 14:28:55 2006 -@@ -0,0 +1,36 @@ ++ /* Turn off the LCD controller and the DMA controller */ ++ lcdc_writel(sinfo, ATMEL_LCDC_PWRCON, sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET); ++ ++ lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 0); ++ ++ if (info->var.bits_per_pixel <= 8) ++ info->fix.visual = FB_VISUAL_PSEUDOCOLOR; ++ else ++ info->fix.visual = FB_VISUAL_TRUECOLOR; ++ ++ info->fix.line_length = info->var.xres_virtual * (info->var.bits_per_pixel / 8); ++ ++ /* Re-initialize the DMA engine... */ ++ dev_dbg(info->device, " * update DMA engine\n"); ++ atmel_lcdfb_update_dma(info, &info->var); ++ ++ /* ...set frame size and burst length = 8 words (?) */ ++ value = (info->var.yres * info->var.xres * info->var.bits_per_pixel) / 32; ++ value |= ((ATMEL_LCDC_DMA_BURST_LEN - 1) << ATMEL_LCDC_BLENGTH_OFFSET); ++ lcdc_writel(sinfo, ATMEL_LCDC_DMAFRMCFG, value); ++ ++ /* Now, the LCDC core... */ ++ ++ /* Set pixel clock */ ++ clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000; ++ ++ value = clk_value_khz / PICOS2KHZ(info->var.pixclock); ++ ++ if (clk_value_khz % PICOS2KHZ(info->var.pixclock)) ++ value++; ++ ++ value = (value / 2) - 1; ++ ++ if (value <= 0) { ++ dev_notice(info->device, "Bypassing pixel clock divider\n"); ++ lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS); ++ } else ++ lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, value << ATMEL_LCDC_CLKVAL_OFFSET); ++ ++ /* Initialize control register 2 */ ++ value = sinfo->default_lcdcon2; ++ ++ if (!(info->var.sync & FB_SYNC_HOR_HIGH_ACT)) ++ value |= ATMEL_LCDC_INVLINE_INVERTED; ++ if (!(info->var.sync & FB_SYNC_VERT_HIGH_ACT)) ++ value |= ATMEL_LCDC_INVFRAME_INVERTED; ++ ++ switch (info->var.bits_per_pixel) { ++ case 1: value |= ATMEL_LCDC_PIXELSIZE_1; break; ++ case 2: value |= ATMEL_LCDC_PIXELSIZE_2; break; ++ case 4: value |= ATMEL_LCDC_PIXELSIZE_4; break; ++ case 8: value |= ATMEL_LCDC_PIXELSIZE_8; break; ++ case 15: /* fall through */ ++ case 16: value |= ATMEL_LCDC_PIXELSIZE_16; break; ++ case 24: value |= ATMEL_LCDC_PIXELSIZE_24; break; ++ case 32: value |= ATMEL_LCDC_PIXELSIZE_32; break; ++ default: BUG(); break; ++ } ++ dev_dbg(info->device, " * LCDCON2 = %08lx\n", value); ++ lcdc_writel(sinfo, ATMEL_LCDC_LCDCON2, value); ++ ++ /* Vertical timing */ ++ value = (info->var.vsync_len - 1) << ATMEL_LCDC_VPW_OFFSET; ++ value |= info->var.upper_margin << ATMEL_LCDC_VBP_OFFSET; ++ value |= info->var.lower_margin; ++ dev_dbg(info->device, " * LCDTIM1 = %08lx\n", value); ++ lcdc_writel(sinfo, ATMEL_LCDC_TIM1, value); ++ ++ /* Horizontal timing */ ++ value = (info->var.right_margin - 1) << ATMEL_LCDC_HFP_OFFSET; ++ value |= (info->var.hsync_len - 1) << ATMEL_LCDC_HPW_OFFSET; ++ value |= (info->var.left_margin - 1); ++ dev_dbg(info->device, " * LCDTIM2 = %08lx\n", value); ++ lcdc_writel(sinfo, ATMEL_LCDC_TIM2, value); ++ ++ /* Display size */ ++ value = (info->var.xres - 1) << ATMEL_LCDC_HOZVAL_OFFSET; ++ value |= info->var.yres - 1; ++ lcdc_writel(sinfo, ATMEL_LCDC_LCDFRMCFG, value); ++ ++ /* FIFO Threshold: Use formula from data sheet */ ++ value = ATMEL_LCDC_FIFO_SIZE - (2 * ATMEL_LCDC_DMA_BURST_LEN + 3); ++ lcdc_writel(sinfo, ATMEL_LCDC_FIFO, value); ++ ++ /* Toggle LCD_MODE every frame */ ++ lcdc_writel(sinfo, ATMEL_LCDC_MVAL, 0); ++ ++ /* Disable all interrupts */ ++ lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL); ++ ++ /* Set contrast */ ++ value = ATMEL_LCDC_PS_DIV8 | ATMEL_LCDC_POL_POSITIVE | ATMEL_LCDC_ENA_PWMENABLE; ++ lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, value); ++ lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, ATMEL_LCDC_CVAL_DEFAULT); ++ /* ...wait for DMA engine to become idle... */ ++ while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY) ++ msleep(10); ++ ++ dev_dbg(info->device, " * re-enable DMA engine\n"); ++ /* ...and enable it with updated configuration */ ++ lcdc_writel(sinfo, ATMEL_LCDC_DMACON, sinfo->default_dmacon); ++ ++ dev_dbg(info->device, " * re-enable LCDC core\n"); ++ lcdc_writel(sinfo, ATMEL_LCDC_PWRCON, ++ (sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET) | ATMEL_LCDC_PWR); ++ ++ dev_dbg(info->device, " * DONE\n"); ++ ++ return 0; ++} ++ ++static inline unsigned int chan_to_field(unsigned int chan, const struct fb_bitfield *bf) ++{ ++ chan &= 0xffff; ++ chan >>= 16 - bf->length; ++ return chan << bf->offset; ++} ++ ++/** ++ * atmel_lcdfb_setcolreg - Optional function. Sets a color register. ++ * @regno: Which register in the CLUT we are programming ++ * @red: The red value which can be up to 16 bits wide ++ * @green: The green value which can be up to 16 bits wide ++ * @blue: The blue value which can be up to 16 bits wide. ++ * @transp: If supported the alpha value which can be up to 16 bits wide. ++ * @info: frame buffer info structure ++ * ++ * Set a single color register. The values supplied have a 16 bit ++ * magnitude which needs to be scaled in this function for the hardware. ++ * Things to take into consideration are how many color registers, if ++ * any, are supported with the current color visual. With truecolor mode ++ * no color palettes are supported. Here a psuedo palette is created ++ * which we store the value in pseudo_palette in struct fb_info. For ++ * pseudocolor mode we have a limited color palette. To deal with this ++ * we can program what color is displayed for a particular pixel value. ++ * DirectColor is similar in that we can program each color field. If ++ * we have a static colormap we don't need to implement this function. ++ * ++ * Returns negative errno on error, or zero on success. In an ++ * ideal world, this would have been the case, but as it turns ++ * out, the other drivers return 1 on failure, so that's what ++ * we're going to do. ++ */ ++static int atmel_lcdfb_setcolreg(unsigned int regno, unsigned int red, ++ unsigned int green, unsigned int blue, ++ unsigned int transp, struct fb_info *info) ++{ ++ struct atmel_lcdfb_info *sinfo = info->par; ++ unsigned int val; ++ u32 *pal; ++ int ret = 1; ++ ++ if (info->var.grayscale) ++ red = green = blue = (19595 * red + 38470 * green ++ + 7471 * blue) >> 16; ++ ++ switch (info->fix.visual) { ++ case FB_VISUAL_TRUECOLOR: ++ if (regno < 16) { ++ pal = info->pseudo_palette; ++ ++ val = chan_to_field(red, &info->var.red); ++ val |= chan_to_field(green, &info->var.green); ++ val |= chan_to_field(blue, &info->var.blue); ++ ++ pal[regno] = val; ++ ret = 0; ++ } ++ break; ++ ++ case FB_VISUAL_PSEUDOCOLOR: ++ if (regno < 256) { ++ val = ((red >> 11) & 0x001f); ++ val |= ((green >> 6) & 0x03e0); ++ val |= ((blue >> 1) & 0x7c00); ++ ++ /* ++ * TODO: intensity bit. Maybe something like ++ * ~(red[10] ^ green[10] ^ blue[10]) & 1 ++ */ ++ ++ lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val); ++ ret = 0; ++ } ++ break; ++ } ++ ++ return ret; ++} ++ ++static int atmel_lcdfb_pan_display(struct fb_var_screeninfo *var, ++ struct fb_info *info) ++{ ++ dev_dbg(info->device, "%s\n", __func__); ++ ++ atmel_lcdfb_update_dma(info, var); ++ ++ return 0; ++} ++ ++static struct fb_ops atmel_lcdfb_ops = { ++ .owner = THIS_MODULE, ++ .fb_check_var = atmel_lcdfb_check_var, ++ .fb_set_par = atmel_lcdfb_set_par, ++ .fb_setcolreg = atmel_lcdfb_setcolreg, ++ .fb_pan_display = atmel_lcdfb_pan_display, ++ .fb_fillrect = cfb_fillrect, ++ .fb_copyarea = cfb_copyarea, ++ .fb_imageblit = cfb_imageblit, ++}; ++ ++static irqreturn_t atmel_lcdfb_interrupt(int irq, void *dev_id) ++{ ++ struct fb_info *info = dev_id; ++ struct atmel_lcdfb_info *sinfo = info->par; ++ u32 status; ++ ++ status = lcdc_readl(sinfo, ATMEL_LCDC_ISR); ++ lcdc_writel(sinfo, ATMEL_LCDC_IDR, status); ++ return IRQ_HANDLED; ++} ++ ++static int __init atmel_lcdfb_init_fbinfo(struct atmel_lcdfb_info *sinfo) ++{ ++ struct fb_info *info = sinfo->info; ++ int ret = 0; ++ ++ memset_io(info->screen_base, 0, info->fix.smem_len); ++ info->var.activate |= FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW; ++ ++ dev_info(info->device, ++ "%luKiB frame buffer at %08lx (mapped at %p)\n", ++ (unsigned long)info->fix.smem_len / 1024, ++ (unsigned long)info->fix.smem_start, ++ info->screen_base); ++ ++ /* Allocate colormap */ ++ ret = fb_alloc_cmap(&info->cmap, 256, 0); ++ if (ret < 0) ++ dev_err(info->device, "Alloc color map failed\n"); ++ ++ return ret; ++} ++ ++static void atmel_lcdfb_start_clock(struct atmel_lcdfb_info *sinfo) ++{ ++ if (sinfo->bus_clk) ++ clk_enable(sinfo->bus_clk); ++ clk_enable(sinfo->lcdc_clk); ++} ++ ++static void atmel_lcdfb_stop_clock(struct atmel_lcdfb_info *sinfo) ++{ ++ if (sinfo->bus_clk) ++ clk_disable(sinfo->bus_clk); ++ clk_disable(sinfo->lcdc_clk); ++} ++ ++ ++static int __init atmel_lcdfb_probe(struct platform_device *pdev) ++{ ++ struct device *dev = &pdev->dev; ++ struct fb_info *info; ++ struct atmel_lcdfb_info *sinfo; ++ struct atmel_lcdfb_info *pdata_sinfo; ++ struct resource *regs = NULL; ++ struct resource *map = NULL; ++ int ret; ++ ++ dev_dbg(dev, "%s BEGIN\n", __func__); ++ ++ ret = -ENOMEM; ++ info = framebuffer_alloc(sizeof(struct atmel_lcdfb_info), dev); ++ if (!info) { ++ dev_err(dev, "cannot allocate memory\n"); ++ goto out; ++ } ++ ++ sinfo = info->par; ++ ++ if (dev->platform_data) { ++ pdata_sinfo = (struct atmel_lcdfb_info *)dev->platform_data; ++ sinfo->default_bpp = pdata_sinfo->default_bpp; ++ sinfo->default_dmacon = pdata_sinfo->default_dmacon; ++ sinfo->default_lcdcon2 = pdata_sinfo->default_lcdcon2; ++ sinfo->default_monspecs = pdata_sinfo->default_monspecs; ++ sinfo->atmel_lcdfb_power_control = pdata_sinfo->atmel_lcdfb_power_control; ++ sinfo->guard_time = pdata_sinfo->guard_time; ++ } else { ++ dev_err(dev, "cannot get default configuration\n"); ++ goto free_info; ++ } ++ sinfo->info = info; ++ sinfo->pdev = pdev; ++ ++ strcpy(info->fix.id, sinfo->pdev->name); ++ info->flags = ATMEL_LCDFB_FBINFO_DEFAULT; ++ info->pseudo_palette = sinfo->pseudo_palette; ++ info->fbops = &atmel_lcdfb_ops; ++ ++ memcpy(&info->monspecs, sinfo->default_monspecs, sizeof(info->monspecs)); ++ info->fix = atmel_lcdfb_fix; ++ ++ /* Enable LCDC Clocks */ ++ if (cpu_is_at91sam9261()) { ++ sinfo->bus_clk = clk_get(dev, "hck1"); ++ if (IS_ERR(sinfo->bus_clk)) { ++ ret = PTR_ERR(sinfo->bus_clk); ++ goto free_info; ++ } ++ } ++ sinfo->lcdc_clk = clk_get(dev, "lcdc_clk"); ++ if (IS_ERR(sinfo->lcdc_clk)) { ++ ret = PTR_ERR(sinfo->lcdc_clk); ++ goto put_bus_clk; ++ } ++ atmel_lcdfb_start_clock(sinfo); ++ ++ ret = fb_find_mode(&info->var, info, NULL, info->monspecs.modedb, ++ info->monspecs.modedb_len, info->monspecs.modedb, ++ sinfo->default_bpp); ++ if (!ret) { ++ dev_err(dev, "no suitable video mode found\n"); ++ goto stop_clk; ++ } ++ ++ ++ regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ if (!regs) { ++ dev_err(dev, "resources unusable\n"); ++ ret = -ENXIO; ++ goto stop_clk; ++ } ++ ++ sinfo->irq_base = platform_get_irq(pdev, 0); ++ if (sinfo->irq_base < 0) { ++ dev_err(dev, "unable to get irq\n"); ++ ret = sinfo->irq_base; ++ goto stop_clk; ++ } ++ ++ /* Initialize video memory */ ++ map = platform_get_resource(pdev, IORESOURCE_MEM, 1); ++ if (map) { ++ /* use a pre-allocated memory buffer */ ++ info->fix.smem_start = map->start; ++ info->fix.smem_len = map->end - map->start + 1; ++ if (!request_mem_region(info->fix.smem_start, ++ info->fix.smem_len, pdev->name)) { ++ ret = -EBUSY; ++ goto stop_clk; ++ } ++ ++ info->screen_base = ioremap(info->fix.smem_start, info->fix.smem_len); ++ if (!info->screen_base) ++ goto release_intmem; ++ } else { ++ /* alocate memory buffer */ ++ ret = atmel_lcdfb_alloc_video_memory(sinfo); ++ if (ret < 0) { ++ dev_err(dev, "cannot allocate framebuffer: %d\n", ret); ++ goto stop_clk; ++ } ++ } ++ ++ /* LCDC registers */ ++ info->fix.mmio_start = regs->start; ++ info->fix.mmio_len = regs->end - regs->start + 1; ++ ++ if (!request_mem_region(info->fix.mmio_start, ++ info->fix.mmio_len, pdev->name)) { ++ ret = -EBUSY; ++ goto free_fb; ++ } ++ ++ sinfo->mmio = ioremap(info->fix.mmio_start, info->fix.mmio_len); ++ if (!sinfo->mmio) { ++ dev_err(dev, "cannot map LCDC registers\n"); ++ goto release_mem; ++ } ++ ++ /* interrupt */ ++ ret = request_irq(sinfo->irq_base, atmel_lcdfb_interrupt, 0, pdev->name, info); ++ if (ret) { ++ dev_err(dev, "request_irq failed: %d\n", ret); ++ goto unmap_mmio; ++ } ++ ++ ret = atmel_lcdfb_init_fbinfo(sinfo); ++ if (ret < 0) { ++ dev_err(dev, "init fbinfo failed: %d\n", ret); ++ goto unregister_irqs; ++ } ++ ++ /* ++ * This makes sure that our colour bitfield ++ * descriptors are correctly initialised. ++ */ ++ atmel_lcdfb_check_var(&info->var, info); ++ ++ ret = fb_set_var(info, &info->var); ++ if (ret) { ++ dev_warn(dev, "unable to set display parameters\n"); ++ goto free_cmap; ++ } ++ ++ dev_set_drvdata(dev, info); ++ ++ /* ++ * Tell the world that we're ready to go ++ */ ++ ret = register_framebuffer(info); ++ if (ret < 0) { ++ dev_err(dev, "failed to register framebuffer device: %d\n", ret); ++ goto free_cmap; ++ } ++ ++ /* Power up the LCDC screen */ ++ if (sinfo->atmel_lcdfb_power_control) ++ sinfo->atmel_lcdfb_power_control(1); ++ ++ dev_info(dev, "fb%d: Atmel LCDC at 0x%08lx (mapped at %p), irq %lu\n", ++ info->node, info->fix.mmio_start, sinfo->mmio, sinfo->irq_base); ++ ++ return 0; ++ ++ ++free_cmap: ++ fb_dealloc_cmap(&info->cmap); ++unregister_irqs: ++ free_irq(sinfo->irq_base, info); ++unmap_mmio: ++ iounmap(sinfo->mmio); ++release_mem: ++ release_mem_region(info->fix.mmio_start, info->fix.mmio_len); ++free_fb: ++ if (map) ++ iounmap(info->screen_base); ++ else ++ atmel_lcdfb_free_video_memory(sinfo); ++ ++release_intmem: ++ if (map) ++ release_mem_region(info->fix.smem_start, info->fix.smem_len); ++stop_clk: ++ atmel_lcdfb_stop_clock(sinfo); ++ clk_put(sinfo->lcdc_clk); ++put_bus_clk: ++ if (sinfo->bus_clk) ++ clk_put(sinfo->bus_clk); ++free_info: ++ framebuffer_release(info); ++out: ++ dev_dbg(dev, "%s FAILED\n", __func__); ++ return ret; ++} ++ ++static int __exit atmel_lcdfb_remove(struct platform_device *pdev) ++{ ++ struct device *dev = &pdev->dev; ++ struct fb_info *info = dev_get_drvdata(dev); ++ struct atmel_lcdfb_info *sinfo = info->par; ++ ++ if (!sinfo) ++ return 0; ++ ++ if (sinfo->atmel_lcdfb_power_control) ++ sinfo->atmel_lcdfb_power_control(0); ++ unregister_framebuffer(info); ++ atmel_lcdfb_stop_clock(sinfo); ++ clk_put(sinfo->lcdc_clk); ++ if (sinfo->bus_clk) ++ clk_put(sinfo->bus_clk); ++ fb_dealloc_cmap(&info->cmap); ++ free_irq(sinfo->irq_base, info); ++ iounmap(sinfo->mmio); ++ release_mem_region(info->fix.mmio_start, info->fix.mmio_len); ++ if (platform_get_resource(pdev, IORESOURCE_MEM, 1)) { ++ iounmap(info->screen_base); ++ release_mem_region(info->fix.smem_start, info->fix.smem_len); ++ } else { ++ atmel_lcdfb_free_video_memory(sinfo); ++ } ++ ++ dev_set_drvdata(dev, NULL); ++ framebuffer_release(info); ++ ++ return 0; ++} ++ ++static struct platform_driver atmel_lcdfb_driver = { ++ .remove = __exit_p(atmel_lcdfb_remove), ++ .driver = { ++ .name = "atmel_lcdfb", ++ .owner = THIS_MODULE, ++ }, ++}; ++ ++static int __init atmel_lcdfb_init(void) ++{ ++ return platform_driver_probe(&atmel_lcdfb_driver, atmel_lcdfb_probe); ++} ++ ++static void __exit atmel_lcdfb_exit(void) ++{ ++ platform_driver_unregister(&atmel_lcdfb_driver); ++} ++ ++module_init(atmel_lcdfb_init); ++module_exit(atmel_lcdfb_exit); ++ ++MODULE_DESCRIPTION("AT91/AT32 LCD Controller framebuffer driver"); ++MODULE_AUTHOR("Nicolas Ferre <nicolas.ferre@rfo.atmel.com>"); ++MODULE_LICENSE("GPL"); +diff -urN -x CVS linux-2.6.21/drivers/video/backlight/Kconfig linux-2.6-stable/drivers/video/backlight/Kconfig +--- linux-2.6.21/drivers/video/backlight/Kconfig Thu Apr 26 05:08:32 2007 ++++ linux-2.6-stable/drivers/video/backlight/Kconfig Tue May 8 12:13:31 2007 +@@ -63,3 +63,11 @@ + help + If you have a Frontpath ProGear say Y to enable the + backlight driver. ++ ++config BACKLIGHT_KB920x ++ tristate "KwikByte KB9202 Backlight Driver" ++ depends on BACKLIGHT_CLASS_DEVICE && MACH_KB9200 ++ default y ++ help ++ If you have a KwikByte KB9202 board, say Y to enable the ++ backlight driver. +diff -urN -x CVS linux-2.6.21/drivers/video/backlight/Makefile linux-2.6-stable/drivers/video/backlight/Makefile +--- linux-2.6.21/drivers/video/backlight/Makefile Thu Apr 26 05:08:32 2007 ++++ linux-2.6-stable/drivers/video/backlight/Makefile Tue May 8 12:13:31 2007 +@@ -6,3 +6,4 @@ + obj-$(CONFIG_BACKLIGHT_HP680) += hp680_bl.o + obj-$(CONFIG_BACKLIGHT_LOCOMO) += locomolcd.o + obj-$(CONFIG_BACKLIGHT_PROGEAR) += progear_bl.o ++obj-$(CONFIG_BACKLIGHT_KB920x) += kb920x_bl.o +diff -urN -x CVS linux-2.6.21/drivers/video/backlight/kb920x_bl.c linux-2.6-stable/drivers/video/backlight/kb920x_bl.c +--- linux-2.6.21/drivers/video/backlight/kb920x_bl.c Thu Jan 1 02:00:00 1970 ++++ linux-2.6-stable/drivers/video/backlight/kb920x_bl.c Tue May 8 12:13:31 2007 +@@ -0,0 +1,164 @@ +/* -+ * include/asm-arm/arch-at91rm9200/at91_pdc.h ++ * Backlight Driver for KB9202 + * -+ * Copyright (C) 2005 Ivan Kokshaysky -+ * Copyright (C) SAN People ++ * Copyright (c) 2006 KwikByte + * -+ * Peripheral Data Controller (PDC) registers. -+ * Based on AT91RM9200 datasheet revision E. ++ * Based on Sharp's Corgi Backlight Driver + * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file "COPYING" in the main directory of this archive ++ * for more details. + */ + -+#ifndef AT91_PDC_H -+#define AT91_PDC_H ++#include <linux/module.h> ++#include <linux/kernel.h> ++#include <linux/init.h> ++#include <linux/platform_device.h> ++#include <linux/spinlock.h> ++#include <linux/fb.h> ++#include <linux/backlight.h> ++ ++#include <asm/arch/gpio.h> ++ ++/* The backlight is on(1)/off(0) */ ++#define KB9202_DEFAULT_INTENSITY 1 ++#define KB9202_MAX_INTENSITY 1 ++ ++static int kb9202bl_suspended; ++static int current_intensity = 0; ++static DEFINE_SPINLOCK(bl_lock); ++ ++static int kb9202bl_set_intensity(struct backlight_device *bd) ++{ ++ unsigned long flags; ++ int intensity = bd->props.brightness; ++ ++ if (bd->props.power != FB_BLANK_UNBLANK) ++ intensity = 0; ++ if (bd->props.fb_blank != FB_BLANK_UNBLANK) ++ intensity = 0; ++ if (kb9202bl_suspended) ++ intensity = 0; ++ ++ if ((!current_intensity) && (bd->props.power == FB_BLANK_UNBLANK)) ++ intensity = 1; ++ ++ spin_lock_irqsave(&bl_lock, flags); ++ if (intensity) ++ gpio_set_value(AT91_PIN_PC23, 1); ++ else ++ gpio_set_value(AT91_PIN_PC23, 0); ++ spin_unlock_irqrestore(&bl_lock, flags); ++ ++ current_intensity = intensity; ++ ++ return 0; ++} ++ ++static int kb9202bl_get_intensity(struct backlight_device *bd) ++{ ++ return current_intensity; ++} ++ ++static struct backlight_ops kb9202bl_ops = { ++ .get_brightness = kb9202bl_get_intensity, ++ .update_status = kb9202bl_set_intensity, ++}; ++ ++static int __init kb9202bl_probe(struct platform_device *pdev) ++{ ++ struct backlight_device *bd; ++ ++ bd = backlight_device_register ("kb9202-bl", &pdev->dev, NULL, &kb9202bl_ops); ++ if (IS_ERR(bd)) ++ return PTR_ERR(bd); ++ ++ platform_set_drvdata(pdev, bd); ++ ++ bd->props.max_brightness = KB9202_MAX_INTENSITY; ++ bd->props.brightness = KB9202_DEFAULT_INTENSITY; ++ (void) kb9202bl_set_intensity(bd); ++ ++ return 0; ++} ++ ++static int kb9202bl_remove(struct platform_device *pdev) ++{ ++ struct backlight_device *bd = platform_get_drvdata(pdev); ++ ++ bd->props.brightness = 0; ++ bd->props.power = 0; ++ (void) kb9202bl_set_intensity(bd); + -+#define AT91_PDC_RPR 0x100 /* Receive Pointer Register */ -+#define AT91_PDC_RCR 0x104 /* Receive Counter Register */ -+#define AT91_PDC_TPR 0x108 /* Transmit Pointer Register */ -+#define AT91_PDC_TCR 0x10c /* Transmit Counter Register */ -+#define AT91_PDC_RNPR 0x110 /* Receive Next Pointer Register */ -+#define AT91_PDC_RNCR 0x114 /* Receive Next Counter Register */ -+#define AT91_PDC_TNPR 0x118 /* Transmit Next Pointer Register */ -+#define AT91_PDC_TNCR 0x11c /* Transmit Next Counter Register */ ++ backlight_device_unregister(bd); ++ ++ return 0; ++} ++ ++#ifdef CONFIG_PM ++static int kb9202bl_suspend(struct platform_device *dev, pm_message_t state) ++{ ++ struct backlight_device *bd = platform_get_drvdata(pdev); + -+#define AT91_PDC_PTCR 0x120 /* Transfer Control Register */ -+#define AT91_PDC_RXTEN (1 << 0) /* Receiver Transfer Enable */ -+#define AT91_PDC_RXTDIS (1 << 1) /* Receiver Transfer Disable */ -+#define AT91_PDC_TXTEN (1 << 8) /* Transmitter Transfer Enable */ -+#define AT91_PDC_TXTDIS (1 << 9) /* Transmitter Transfer Disable */ ++ kb9202bl_suspended = 1; ++ (void) kb9202bl_set_intensity(bd); ++ return 0; ++} + -+#define AT91_PDC_PTSR 0x124 /* Transfer Status Register */ ++static int kb9202bl_resume(struct platform_device *dev) ++{ ++ struct backlight_device *bd = platform_get_drvdata(pdev); + ++ kb9202bl_suspended = 0; ++ (void) kb9202bl_set_intensity(bd); ++ return 0; ++} ++#else ++#define kb9202bl_suspend NULL ++#define kb9202bl_resume NULL +#endif -diff -urN -x CVS linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91_pio.h linux-2.6.19/include/asm-arm/arch-at91rm9200/at91_pio.h ---- linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91_pio.h Thu Jan 1 02:00:00 1970 -+++ linux-2.6.19/include/asm-arm/arch-at91rm9200/at91_pio.h Tue Oct 24 15:47:04 2006 -@@ -0,0 +1,49 @@ ++ ++static struct platform_driver kb9202bl_driver = { ++ .probe = kb9202bl_probe, ++ .remove = kb9202bl_remove, ++ .suspend = kb9202bl_suspend, ++ .resume = kb9202bl_resume, ++ .driver = { ++ .name = "kb9202-bl", ++ .owner = THIS_MODULE, ++ }, ++}; ++ ++static struct platform_device *kb9202bl_device; ++ ++static int __init kb9202bl_init(void) ++{ ++ int ret; ++ ++ ret = platform_driver_register(&kb9202bl_driver); ++ if (!ret) { ++ kb9202bl_device = platform_device_alloc("kb9202-bl", -1); ++ if (!kb9202bl_device) ++ return -ENOMEM; ++ ++ ret = platform_device_add(kb9202bl_device); ++ if (ret) { ++ platform_device_put(kb9202bl_device); ++ platform_driver_unregister(&kb9202bl_driver); ++ } ++ } ++ return ret; ++} ++ ++static void __exit kb9202bl_exit(void) ++{ ++ platform_device_unregister(kb9202bl_device); ++ platform_driver_unregister(&kb9202bl_driver); ++} ++ ++module_init(kb9202bl_init); ++module_exit(kb9202bl_exit); ++ ++MODULE_AUTHOR("KwikByte <kb9200_dev@kwikbyte.com>"); ++MODULE_DESCRIPTION("KB9202 Backlight Driver"); ++MODULE_LICENSE("GPL"); +diff -urN -x CVS linux-2.6.21/drivers/video/s1d15605fb.c linux-2.6-stable/drivers/video/s1d15605fb.c +--- linux-2.6.21/drivers/video/s1d15605fb.c Thu Jan 1 02:00:00 1970 ++++ linux-2.6-stable/drivers/video/s1d15605fb.c Tue May 8 12:13:31 2007 +@@ -0,0 +1,659 @@ +/* -+ * include/asm-arm/arch-at91rm9200/at91_pio.h ++ * drivers/video/s1d15605.c + * -+ * Copyright (C) 2005 Ivan Kokshaysky -+ * Copyright (C) SAN People ++ * Adapted from several sources including: ++ * 1) Driver for AT91 LCD Controller ++ * Copyright (C) 2006 Atmel + * -+ * Parallel I/O Controller (PIO) - System peripherals registers. -+ * Based on AT91RM9200 datasheet revision E. ++ * 2) Copyright (C) 2005 S. Kevin Hester + * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ */ -+ -+#ifndef AT91_PIO_H -+#define AT91_PIO_H -+ -+#define PIO_PER 0x00 /* Enable Register */ -+#define PIO_PDR 0x04 /* Disable Register */ -+#define PIO_PSR 0x08 /* Status Register */ -+#define PIO_OER 0x10 /* Output Enable Register */ -+#define PIO_ODR 0x14 /* Output Disable Register */ -+#define PIO_OSR 0x18 /* Output Status Register */ -+#define PIO_IFER 0x20 /* Glitch Input Filter Enable */ -+#define PIO_IFDR 0x24 /* Glitch Input Filter Disable */ -+#define PIO_IFSR 0x28 /* Glitch Input Filter Status */ -+#define PIO_SODR 0x30 /* Set Output Data Register */ -+#define PIO_CODR 0x34 /* Clear Output Data Register */ -+#define PIO_ODSR 0x38 /* Output Data Status Register */ -+#define PIO_PDSR 0x3c /* Pin Data Status Register */ -+#define PIO_IER 0x40 /* Interrupt Enable Register */ -+#define PIO_IDR 0x44 /* Interrupt Disable Register */ -+#define PIO_IMR 0x48 /* Interrupt Mask Register */ -+#define PIO_ISR 0x4c /* Interrupt Status Register */ -+#define PIO_MDER 0x50 /* Multi-driver Enable Register */ -+#define PIO_MDDR 0x54 /* Multi-driver Disable Register */ -+#define PIO_MDSR 0x58 /* Multi-driver Status Register */ -+#define PIO_PUDR 0x60 /* Pull-up Disable Register */ -+#define PIO_PUER 0x64 /* Pull-up Enable Register */ -+#define PIO_PUSR 0x68 /* Pull-up Status Register */ -+#define PIO_ASR 0x70 /* Peripheral A Select Register */ -+#define PIO_BSR 0x74 /* Peripheral B Select Register */ -+#define PIO_ABSR 0x78 /* AB Status Register */ -+#define PIO_OWER 0xa0 /* Output Write Enable Register */ -+#define PIO_OWDR 0xa4 /* Output Write Disable Register */ -+#define PIO_OWSR 0xa8 /* Output Write Status Register */ -+ -+#endif -diff -urN -x CVS linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91_pit.h linux-2.6.19/include/asm-arm/arch-at91rm9200/at91_pit.h ---- linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91_pit.h Thu Jan 1 02:00:00 1970 -+++ linux-2.6.19/include/asm-arm/arch-at91rm9200/at91_pit.h Thu Nov 9 15:09:54 2006 -@@ -0,0 +1,29 @@ -+/* -+ * include/asm-arm/arch-at91rm9200/at91_pit.h ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file COPYING in the main directory of this archive for ++ * more details. + * -+ * Periodic Interval Timer (PIT) - System peripherals regsters. -+ * Based on AT91SAM9261 datasheet revision D. ++ * This is a basic framebuffer driver for the Optrex F-51320 128x64 mono LCD ++ * display. This display uses a clone of the common Epson SED 1531 display ++ * controller. ++ * ++ * I've heavily borrowed code from the vfb.c driver. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + -+#ifndef AT91_PIT_H -+#define AT91_PIT_H ++#ifdef DEBUG ++#define MSG(string, args...) printk("s1d15605fb:" string, ##args) ++#else ++#define MSG(string, args...) ++#endif + -+#define AT91_PIT_MR (AT91_PIT + 0x00) /* Mode Register */ -+#define AT91_PIT_PITIEN (1 << 25) /* Timer Interrupt Enable */ -+#define AT91_PIT_PITEN (1 << 24) /* Timer Enabled */ -+#define AT91_PIT_PIV (0xfffff) /* Periodic Interval Value */ ++#include <linux/kernel.h> ++#include <linux/platform_device.h> ++#include <linux/dma-mapping.h> ++#include <linux/interrupt.h> ++#include <linux/clk.h> ++#include <linux/fb.h> ++#include <linux/init.h> ++#include <linux/delay.h> + -+#define AT91_PIT_SR (AT91_PIT + 0x04) /* Status Register */ -+#define AT91_PIT_PITS (1 << 0) /* Timer Status */ ++#include <asm/uaccess.h> + -+#define AT91_PIT_PIVR (AT91_PIT + 0x08) /* Periodic Interval Value Register */ -+#define AT91_PIT_PIIR (AT91_PIT + 0x0c) /* Periodic Interval Image Register */ -+#define AT91_PIT_PICNT (0xfff << 20) /* Interval Counter */ -+#define AT91_PIT_CPIV (0xfffff) /* Inverval Value */ ++#include <asm/arch/board.h> ++#include <asm/arch/gpio.h> + ++#ifdef CONFIG_PMAC_BACKLIGHT ++#include <asm/backlight.h> +#endif -diff -urN -x CVS linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91_pmc.h linux-2.6.19/include/asm-arm/arch-at91rm9200/at91_pmc.h ---- linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91_pmc.h Thu Jan 1 02:00:00 1970 -+++ linux-2.6.19/include/asm-arm/arch-at91rm9200/at91_pmc.h Thu Nov 9 09:03:41 2006 -@@ -0,0 +1,92 @@ ++ ++#define VIDEOWIDTH 128 ++#define VIDEOHEIGHT 64 ++#define VIDEODEPTH 1 /* bits/pixel */ ++#define VIDEOWIDTH_BYTES ((VIDEOWIDTH * VIDEODEPTH) / 8) ++ ++/* The number of bytes that actually go to the device */ ++#define ACTUALVIDEOMEMSIZE (VIDEOWIDTH_BYTES * VIDEOHEIGHT) ++#define VIDEOMEMSIZE PAGE_SIZE ++ ++static struct fb_var_screeninfo s1d15605_default __initdata = { ++ .xres = VIDEOWIDTH, ++ .yres = VIDEOHEIGHT, ++ .xres_virtual = VIDEOWIDTH, ++ .yres_virtual = VIDEOHEIGHT, ++ .bits_per_pixel = VIDEODEPTH, ++ .red = { 0, 1, 0 }, ++ .green = { 0, 1, 0 }, ++ .blue = { 0, 1, 0 }, ++ .activate = FB_ACTIVATE_NOW, ++ .pixclock = 20000, ++ .vmode = FB_VMODE_NONINTERLACED, ++}; ++ ++static struct fb_fix_screeninfo s1d15605_fix __initdata = { ++ .id = "s1d15605", ++ .type = FB_TYPE_PACKED_PIXELS, ++ .visual = FB_VISUAL_MONO10, ++ .xpanstep = 0, ++ .ypanstep = 0, ++ .ywrapstep = 0, ++ .accel = FB_ACCEL_NONE, ++}; ++ ++struct s1d15605fb_info { ++ struct fb_info *info; ++ char *mmio; ++ unsigned long reset_pin; ++ struct platform_device *pdev; ++}; ++ +/* -+ * include/asm-arm/arch-at91rm9200/at91_pmc.h -+ * -+ * Copyright (C) 2005 Ivan Kokshaysky -+ * Copyright (C) SAN People -+ * -+ * Power Management Controller (PMC) - System peripherals registers. -+ * Based on AT91RM9200 datasheet revision E. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. ++ * LCD device interface + */ ++#define RESET_DISPLAY 0xE2 ++#define LCD_BIAS_1_9 0xA2 ++#define ADC_SELECT_REVERSE 0xA1 ++#define COMMON_OUTPUT_NORMAL 0xC0 ++#define V5_RESISTOR_RATIO 0x26 ++#define ELECTRONIC_VOLUME_SET 0x81 ++#define ELECTRONIC_VOLUME_INIT 0x20 ++#define POWER_CONTROL_SET 0x28 ++#define VOLTAGE_REGULATOR 0x02 ++#define VOLTAGE_FOLLOWER 0x01 ++#define BOOSTER_CIRCUIT 0x04 ++#define DISPLAY_ON 0xAF ++#define START_LINE_SET 0x40 ++#define PAGE_ADDRESS_SET 0xB0 ++#define COLUMN_ADDRESS_HIGH 0x10 ++#define COLUMN_ADDRESS_LOW 0x00 ++#define RESISTOR_RATIO_START 0x20 ++ ++#define NUM_OF_PAGES 8 ++#define NUM_OF_COLUMNS 128 ++ ++#define WRITE_COMMAND(x) __raw_writeb((x), (sinfo)->mmio) ++#define READ_COMMAND __raw_readb((sinfo)->mmio) ++#define WRITE_DATA(x) __raw_writeb((x), (sinfo)->mmio + (0x10000)) ++#define READ_DATA __raw_readb((sinfo)->mmio + (0x10000)) + -+#ifndef AT91_PMC_H -+#define AT91_PMC_H -+ -+#define AT91_PMC_SCER (AT91_PMC + 0x00) /* System Clock Enable Register */ -+#define AT91_PMC_SCDR (AT91_PMC + 0x04) /* System Clock Disable Register */ -+ -+#define AT91_PMC_SCSR (AT91_PMC + 0x08) /* System Clock Status Register */ -+#define AT91_PMC_PCK (1 << 0) /* Processor Clock */ -+#define AT91RM9200_PMC_UDP (1 << 1) /* USB Devcice Port Clock [AT91RM9200 only] */ -+#define AT91RM9200_PMC_MCKUDP (1 << 2) /* USB Device Port Master Clock Automatic Disable on Suspend [AT91RM9200 only] */ -+#define AT91RM9200_PMC_UHP (1 << 4) /* USB Host Port Clock [AT91RM9200 only] */ -+#define AT91SAM926x_PMC_UHP (1 << 6) /* USB Host Port Clock [AT91SAM926x only] */ -+#define AT91SAM926x_PMC_UDP (1 << 7) /* USB Devcice Port Clock [AT91SAM926x only] */ -+#define AT91_PMC_PCK0 (1 << 8) /* Programmable Clock 0 */ -+#define AT91_PMC_PCK1 (1 << 9) /* Programmable Clock 1 */ -+#define AT91_PMC_PCK2 (1 << 10) /* Programmable Clock 2 */ -+#define AT91_PMC_PCK3 (1 << 11) /* Programmable Clock 3 */ -+#define AT91_PMC_HCK0 (1 << 16) /* AHB Clock (USB host) [AT91SAM9261 only] */ -+#define AT91_PMC_HCK1 (1 << 17) /* AHB Clock (LCD) [AT91SAM9261 only] */ -+ -+#define AT91_PMC_PCER (AT91_PMC + 0x10) /* Peripheral Clock Enable Register */ -+#define AT91_PMC_PCDR (AT91_PMC + 0x14) /* Peripheral Clock Disable Register */ -+#define AT91_PMC_PCSR (AT91_PMC + 0x18) /* Peripheral Clock Status Register */ -+ -+#define AT91_CKGR_MOR (AT91_PMC + 0x20) /* Main Oscillator Register */ -+#define AT91_PMC_MOSCEN (1 << 0) /* Main Oscillator Enable */ -+#define AT91_PMC_OSCBYPASS (1 << 1) /* Oscillator Bypass [AT91SAM926x only] */ -+#define AT91_PMC_OSCOUNT (0xff << 8) /* Main Oscillator Start-up Time */ -+ -+#define AT91_CKGR_MCFR (AT91_PMC + 0x24) /* Main Clock Frequency Register */ -+#define AT91_PMC_MAINF (0xffff << 0) /* Main Clock Frequency */ -+#define AT91_PMC_MAINRDY (1 << 16) /* Main Clock Ready */ -+ -+#define AT91_CKGR_PLLAR (AT91_PMC + 0x28) /* PLL A Register */ -+#define AT91_CKGR_PLLBR (AT91_PMC + 0x2c) /* PLL B Register */ -+#define AT91_PMC_DIV (0xff << 0) /* Divider */ -+#define AT91_PMC_PLLCOUNT (0x3f << 8) /* PLL Counter */ -+#define AT91_PMC_OUT (3 << 14) /* PLL Clock Frequency Range */ -+#define AT91_PMC_MUL (0x7ff << 16) /* PLL Multiplier */ -+#define AT91_PMC_USB96M (1 << 28) /* Divider by 2 Enable (PLLB only) */ -+ -+#define AT91_PMC_MCKR (AT91_PMC + 0x30) /* Master Clock Register */ -+#define AT91_PMC_CSS (3 << 0) /* Master Clock Selection */ -+#define AT91_PMC_CSS_SLOW (0 << 0) -+#define AT91_PMC_CSS_MAIN (1 << 0) -+#define AT91_PMC_CSS_PLLA (2 << 0) -+#define AT91_PMC_CSS_PLLB (3 << 0) -+#define AT91_PMC_PRES (7 << 2) /* Master Clock Prescaler */ -+#define AT91_PMC_PRES_1 (0 << 2) -+#define AT91_PMC_PRES_2 (1 << 2) -+#define AT91_PMC_PRES_4 (2 << 2) -+#define AT91_PMC_PRES_8 (3 << 2) -+#define AT91_PMC_PRES_16 (4 << 2) -+#define AT91_PMC_PRES_32 (5 << 2) -+#define AT91_PMC_PRES_64 (6 << 2) -+#define AT91_PMC_MDIV (3 << 8) /* Master Clock Division */ -+#define AT91_PMC_MDIV_1 (0 << 8) -+#define AT91_PMC_MDIV_2 (1 << 8) -+#define AT91_PMC_MDIV_3 (2 << 8) -+#define AT91_PMC_MDIV_4 (3 << 8) -+ -+#define AT91_PMC_PCKR(n) (AT91_PMC + 0x40 + ((n) * 4)) /* Programmable Clock 0-3 Registers */ -+ -+#define AT91_PMC_IER (AT91_PMC + 0x60) /* Interrupt Enable Register */ -+#define AT91_PMC_IDR (AT91_PMC + 0x64) /* Interrupt Disable Register */ -+#define AT91_PMC_SR (AT91_PMC + 0x68) /* Status Register */ -+#define AT91_PMC_MOSCS (1 << 0) /* MOSCS Flag */ -+#define AT91_PMC_LOCKA (1 << 1) /* PLLA Lock */ -+#define AT91_PMC_LOCKB (1 << 2) /* PLLB Lock */ -+#define AT91_PMC_MCKRDY (1 << 3) /* Master Clock */ -+#define AT91_PMC_PCK0RDY (1 << 8) /* Programmable Clock 0 */ -+#define AT91_PMC_PCK1RDY (1 << 9) /* Programmable Clock 1 */ -+#define AT91_PMC_PCK2RDY (1 << 10) /* Programmable Clock 2 */ -+#define AT91_PMC_PCK3RDY (1 << 11) /* Programmable Clock 3 */ -+#define AT91_PMC_IMR (AT91_PMC + 0x6c) /* Interrupt Mask Register */ + -+#endif -diff -urN -x CVS linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91_rstc.h linux-2.6.19/include/asm-arm/arch-at91rm9200/at91_rstc.h ---- linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91_rstc.h Thu Jan 1 02:00:00 1970 -+++ linux-2.6.19/include/asm-arm/arch-at91rm9200/at91_rstc.h Thu Nov 2 15:59:35 2006 -@@ -0,0 +1,39 @@ +/* -+ * include/asm-arm/arch-at91rm9200/at91_rstc.h ++ * s1d15605fb_resize_framebuffer + * -+ * Reset Controller (RSTC) - System peripherals regsters. -+ * Based on AT91SAM9261 datasheet revision D. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. ++ * Free allocated space if different. Allocate on new of changed. ++ * Returns -ENOMEM if the new framebuffer can not be allocated, ++ * zero on success. + */ ++static int s1d15605fb_resize_framebuffer(struct s1d15605fb_info *sinfo) ++{ ++ struct fb_info *info = sinfo->info; ++ struct fb_fix_screeninfo *fix = &info->fix; ++ struct fb_var_screeninfo *var = &info->var; ++ unsigned int new_size; ++ void *new_vaddr; ++ ++ new_size = ((var->xres_virtual * var->yres_virtual * var->bits_per_pixel) / 8); ++ ++ MSG("%s: x (%d) y (%d) bpp (%d): new size 0x%08x\n", __FUNCTION__, ++ var->xres_virtual, var->yres_virtual, var->bits_per_pixel, new_size); ++ ++ if (new_size == fix->smem_len) ++ return 0; ++ ++ if (fix->smem_len) { ++ kfree(info->screen_base); ++ } ++ ++ new_vaddr = kmalloc(new_size, GFP_KERNEL); ++ ++ if (!new_vaddr) { ++ fix->smem_len = 0; ++ return -ENOMEM; ++ } ++ ++ info->screen_base = new_vaddr; ++ fix->smem_start = (unsigned)new_vaddr; ++ fix->smem_len = new_size; ++ fix->line_length = (var->xres_virtual * var->bits_per_pixel) / 8; ++ ++ dev_info(info->device, ++ "%luKiB frame buffer at %08lx (mapped at %p)\n", ++ (unsigned long)info->fix.smem_len / 1024, ++ (unsigned long)info->fix.smem_start, ++ info->screen_base); ++ ++ return 0; ++} + -+#ifndef AT91_RSTC_H -+#define AT91_RSTC_H -+ -+#define AT91_RSTC_CR (AT91_RSTC + 0x00) /* Reset Controller Control Register */ -+#define AT91_RSTC_PROCRST (1 << 0) /* Processor Reset */ -+#define AT91_RSTC_PERRST (1 << 2) /* Peripheral Reset */ -+#define AT91_RSTC_EXTRST (1 << 3) /* External Reset */ -+#define AT01_RSTC_KEY (0xff << 24) /* KEY Password */ -+ -+#define AT91_RSTC_SR (AT91_RSTC + 0x04) /* Reset Controller Status Register */ -+#define AT91_RSTC_URSTS (1 << 0) /* User Reset Status */ -+#define AT91_RSTC_RSTTYP (7 << 8) /* Reset Type */ -+#define AT91_RSTC_RSTTYP_GENERAL (0 << 8) -+#define AT91_RSTC_RSTTYP_WAKEUP (1 << 8) -+#define AT91_RSTC_RSTTYP_WATCHDOG (2 << 8) -+#define AT91_RSTC_RSTTYP_SOFTWARE (3 << 8) -+#define AT91_RSTC_RSTTYP_USER (4 << 8) -+#define AT91_RSTC_NRSTL (1 << 16) /* NRST Pin Level */ -+#define AT91_RSTC_SRCMP (1 << 17) /* Software Reset Command in Progress */ -+ -+#define AT91_RSTC_MR (AT91_RSTC + 0x08) /* Reset Controller Mode Register */ -+#define AT91_RSTC_URSTEN (1 << 0) /* User Reset Enable */ -+#define AT91_RSTC_URSTIEN (1 << 4) /* User Reset Interrupt Enable */ -+#define AT91_RSTC_ERSTL (0xf << 8) /* External Reset Length */ -+#define AT91_RSTC_KEY (0xff << 24) /* KEY Password */ + -+#endif -diff -urN -x CVS linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91_rtc.h linux-2.6.19/include/asm-arm/arch-at91rm9200/at91_rtc.h ---- linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91_rtc.h Thu Jan 1 02:00:00 1970 -+++ linux-2.6.19/include/asm-arm/arch-at91rm9200/at91_rtc.h Tue Oct 24 15:41:59 2006 -@@ -0,0 +1,75 @@ +/* -+ * include/asm-arm/arch-at91rm9200/at91_rtc.h -+ * -+ * Copyright (C) 2005 Ivan Kokshaysky -+ * Copyright (C) SAN People -+ * -+ * Real Time Clock (RTC) - System peripheral registers. -+ * Based on AT91RM9200 datasheet revision E. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. ++ * The s1d15605 seems to be divided into eight 128 pixel wide pages (from top to ++ * bottom) each page seems to be eight pixels high, where these eight pixels are ++ * one byte + */ ++static void s1d15605_update(struct fb_info *info) ++{ ++ struct s1d15605fb_info *sinfo = info->par; ++ int page, i, row, colmask; ++ u8 retVal, *rowPtr; ++ ++ WRITE_COMMAND(START_LINE_SET); ++ for (page = 0; page < NUM_OF_PAGES; ++page) { ++ WRITE_COMMAND(PAGE_ADDRESS_SET + page); ++ WRITE_COMMAND(COLUMN_ADDRESS_HIGH); ++ WRITE_COMMAND(COLUMN_ADDRESS_LOW); ++ ++ for (i = 0; i < NUM_OF_COLUMNS; ++i) ++ { ++ /* point of opportunity: optimization */ ++ colmask = (1 << (i & 0x7)); ++ rowPtr = (u8*)(info->screen_base); ++ rowPtr += (VIDEOWIDTH_BYTES * 8 * page); ++ rowPtr += (i >> 3); ++ retVal = 0; ++ for (row = 0; row < 8; ++row) ++ { ++ retVal = (retVal >> 1) | (((*rowPtr) & colmask) ? 0x80 : 0); ++ rowPtr += VIDEOWIDTH_BYTES; ++ } ++ WRITE_DATA(retVal); ++ } ++ } ++ ++ WRITE_COMMAND(DISPLAY_ON); ++} + -+#ifndef AT91_RTC_H -+#define AT91_RTC_H -+ -+#define AT91_RTC_CR (AT91_RTC + 0x00) /* Control Register */ -+#define AT91_RTC_UPDTIM (1 << 0) /* Update Request Time Register */ -+#define AT91_RTC_UPDCAL (1 << 1) /* Update Request Calendar Register */ -+#define AT91_RTC_TIMEVSEL (3 << 8) /* Time Event Selection */ -+#define AT91_RTC_TIMEVSEL_MINUTE (0 << 8) -+#define AT91_RTC_TIMEVSEL_HOUR (1 << 8) -+#define AT91_RTC_TIMEVSEL_DAY24 (2 << 8) -+#define AT91_RTC_TIMEVSEL_DAY12 (3 << 8) -+#define AT91_RTC_CALEVSEL (3 << 16) /* Calendar Event Selection */ -+#define AT91_RTC_CALEVSEL_WEEK (0 << 16) -+#define AT91_RTC_CALEVSEL_MONTH (1 << 16) -+#define AT91_RTC_CALEVSEL_YEAR (2 << 16) -+ -+#define AT91_RTC_MR (AT91_RTC + 0x04) /* Mode Register */ -+#define AT91_RTC_HRMOD (1 << 0) /* 12/24 Hour Mode */ -+ -+#define AT91_RTC_TIMR (AT91_RTC + 0x08) /* Time Register */ -+#define AT91_RTC_SEC (0x7f << 0) /* Current Second */ -+#define AT91_RTC_MIN (0x7f << 8) /* Current Minute */ -+#define AT91_RTC_HOUR (0x3f << 16) /* Current Hour */ -+#define AT91_RTC_AMPM (1 << 22) /* Ante Meridiem Post Meridiem Indicator */ -+ -+#define AT91_RTC_CALR (AT91_RTC + 0x0c) /* Calendar Register */ -+#define AT91_RTC_CENT (0x7f << 0) /* Current Century */ -+#define AT91_RTC_YEAR (0xff << 8) /* Current Year */ -+#define AT91_RTC_MONTH (0x1f << 16) /* Current Month */ -+#define AT91_RTC_DAY (7 << 21) /* Current Day */ -+#define AT91_RTC_DATE (0x3f << 24) /* Current Date */ -+ -+#define AT91_RTC_TIMALR (AT91_RTC + 0x10) /* Time Alarm Register */ -+#define AT91_RTC_SECEN (1 << 7) /* Second Alarm Enable */ -+#define AT91_RTC_MINEN (1 << 15) /* Minute Alarm Enable */ -+#define AT91_RTC_HOUREN (1 << 23) /* Hour Alarm Enable */ -+ -+#define AT91_RTC_CALALR (AT91_RTC + 0x14) /* Calendar Alarm Register */ -+#define AT91_RTC_MTHEN (1 << 23) /* Month Alarm Enable */ -+#define AT91_RTC_DATEEN (1 << 31) /* Date Alarm Enable */ -+ -+#define AT91_RTC_SR (AT91_RTC + 0x18) /* Status Register */ -+#define AT91_RTC_ACKUPD (1 << 0) /* Acknowledge for Update */ -+#define AT91_RTC_ALARM (1 << 1) /* Alarm Flag */ -+#define AT91_RTC_SECEV (1 << 2) /* Second Event */ -+#define AT91_RTC_TIMEV (1 << 3) /* Time Event */ -+#define AT91_RTC_CALEV (1 << 4) /* Calendar Event */ -+ -+#define AT91_RTC_SCCR (AT91_RTC + 0x1c) /* Status Clear Command Register */ -+#define AT91_RTC_IER (AT91_RTC + 0x20) /* Interrupt Enable Register */ -+#define AT91_RTC_IDR (AT91_RTC + 0x24) /* Interrupt Disable Register */ -+#define AT91_RTC_IMR (AT91_RTC + 0x28) /* Interrupt Mask Register */ -+ -+#define AT91_RTC_VER (AT91_RTC + 0x2c) /* Valid Entry Register */ -+#define AT91_RTC_NVTIM (1 << 0) /* Non valid Time */ -+#define AT91_RTC_NVCAL (1 << 1) /* Non valid Calendar */ -+#define AT91_RTC_NVTIMALR (1 << 2) /* Non valid Time Alarm */ -+#define AT91_RTC_NVCALALR (1 << 3) /* Non valid Calendar Alarm */ + -+#endif -diff -urN -x CVS linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91_rtt.h linux-2.6.19/include/asm-arm/arch-at91rm9200/at91_rtt.h ---- linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91_rtt.h Thu Jan 1 02:00:00 1970 -+++ linux-2.6.19/include/asm-arm/arch-at91rm9200/at91_rtt.h Thu Nov 9 15:09:30 2006 -@@ -0,0 +1,32 @@ +/* -+ * include/asm-arm/arch-at91rm9200/at91_rtt.h -+ * -+ * Real-time Timer (RTT) - System peripherals regsters. -+ * Based on AT91SAM9261 datasheet revision D. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. ++ * Setting the video mode has been split into two parts. ++ * First part, xxxfb_check_var, must not write anything ++ * to hardware, it should only verify and adjust var. ++ * This means it doesn't alter par but it does use hardware ++ * data from it to check this var. + */ ++static int s1d15605_check_var(struct fb_var_screeninfo *var, struct fb_info *info) ++{ ++ /* ++ * Some very basic checks ++ */ ++ if (!var->xres) ++ var->xres = 1; ++ if (!var->yres) ++ var->yres = 1; ++ if (var->xres > var->xres_virtual) ++ var->xres_virtual = var->xres; ++ if (var->yres > var->yres_virtual) ++ var->yres_virtual = var->yres; ++ ++ if(var->bits_per_pixel > VIDEODEPTH) ++ return -EINVAL; + -+#ifndef AT91_RTT_H -+#define AT91_RTT_H ++ /* ++ * Memory limit ++ */ ++ if (((var->yres_virtual * var->bits_per_pixel * var->yres_virtual) >> 3) > ++ ACTUALVIDEOMEMSIZE) ++ return -ENOMEM; + -+#define AT91_RTT_MR (AT91_RTT + 0x00) /* Real-time Mode Register */ -+#define AT91_RTT_RTPRES (0xffff << 0) /* Real-time Timer Prescaler Value */ -+#define AT91_RTT_ALMIEN (1 << 16) /* Alarm Interrupt Enable */ -+#define AT91_RTT_RTTINCIEN (1 << 17) /* Real Time Timer Increment Interrupt Enable */ -+#define AT91_RTT_RTTRST (1 << 18) /* Real Time Timer Restart */ ++ /* ++ * Now that we checked it we alter var. The reason being is that the video ++ * mode passed in might not work but slight changes to it might make it ++ * work. This way we let the user know what is acceptable. ++ */ ++ switch (var->bits_per_pixel) { ++ case 1: ++ var->red.offset = var->green.offset = var->blue.offset = 0; ++ var->red.length = var->green.length = var->blue.length ++ = var->bits_per_pixel; ++ break; ++ default: ++ return -EINVAL; ++ } + -+#define AT91_RTT_AR (AT91_RTT + 0x04) /* Real-time Alarm Register */ -+#define AT91_RTT_ALMV (0xffffffff) /* Alarm Value */ ++ var->xoffset = var->yoffset = 0; ++ var->red.msb_right = var->green.msb_right = var->blue.msb_right = ++ var->transp.msb_right = 0; + -+#define AT91_RTT_VR (AT91_RTT + 0x08) /* Real-time Value Register */ -+#define AT91_RTT_CRTV (0xffffffff) /* Current Real-time Value */ ++ return 0; ++} + -+#define AT91_RTT_SR (AT91_RTT + 0x0c) /* Real-time Status Register */ -+#define AT91_RTT_ALMS (1 << 0) /* Real-time Alarm Status */ -+#define AT91_RTT_RTTINC (1 << 1) /* Real-time Timer Increment */ + -+#endif -diff -urN -x CVS linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91_shdwc.h linux-2.6.19/include/asm-arm/arch-at91rm9200/at91_shdwc.h ---- linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91_shdwc.h Thu Jan 1 02:00:00 1970 -+++ linux-2.6.19/include/asm-arm/arch-at91rm9200/at91_shdwc.h Thu Nov 9 15:08:30 2006 -@@ -0,0 +1,33 @@ +/* -+ * include/asm-arm/arch-at91rm9200/at91_shdwc.h -+ * -+ * Shutdown Controller (SHDWC) - System peripherals regsters. -+ * Based on AT91SAM9261 datasheet revision D. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. ++ * This routine actually sets the video mode. It's in here where we ++ * the hardware state info->par and fix which can be affected by the ++ * change in par. For this driver it doesn't do much. + */ ++static int s1d15605_set_par(struct fb_info *info) ++{ ++ int ret; + -+#ifndef AT91_SHDWC_H -+#define AT91_SHDWC_H ++ MSG("%s:\n", __func__); ++ MSG(" * resolution: %ux%u (%ux%u virtual)\n", ++ info->var.xres, info->var.yres, ++ info->var.xres_virtual, info->var.yres_virtual); + -+#define AT91_SHDW_CR (AT91_SHDWC + 0x00) /* Shut Down Control Register */ -+#define AT91_SHDW_SHDW (1 << 0) /* Processor Reset */ -+#define AT91_SHDW_KEY (0xff << 24) /* KEY Password */ ++ ret = s1d15605fb_resize_framebuffer(info->par); + -+#define AT91_SHDW_MR (AT91_SHDWC + 0x04) /* Shut Down Mode Register */ -+#define AT91_SHDW_WKMODE0 (3 << 0) /* Wake-up 0 Mode Selection */ -+#define AT91_SHDW_WKMODE0_NONE 0 -+#define AT91_SHDW_WKMODE0_HIGH 1 -+#define AT91_SHDW_WKMODE0_LOW 2 -+#define AT91_SHDW_WKMODE0_ANYLEVEL 3 -+#define AT91_SHDW_CPTWK0 (0xf << 4) /* Counter On Wake Up 0 */ -+#define AT91_SHDW_RTTWKEN (1 << 16) /* Real Time Timer Wake-up Enable */ ++ info->fix.visual = FB_VISUAL_MONO10; ++ return ret; ++} + -+#define AT91_SHDW_SR (AT91_SHDWC + 0x08) /* Shut Down Status Register */ -+#define AT91_SHDW_WAKEUP0 (1 << 0) /* Wake-up 0 Status */ -+#define AT91_SHDW_RTTWK (1 << 16) /* Real-time Timer Wake-up */ + -+#endif -diff -urN -x CVS linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91_spi.h linux-2.6.19/include/asm-arm/arch-at91rm9200/at91_spi.h ---- linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91_spi.h Thu Jan 1 02:00:00 1970 -+++ linux-2.6.19/include/asm-arm/arch-at91rm9200/at91_spi.h Wed Nov 15 16:58:25 2006 -@@ -0,0 +1,81 @@ +/* -+ * include/asm-arm/arch-at91rm9200/at91_spi.h -+ * -+ * Copyright (C) 2005 Ivan Kokshaysky -+ * Copyright (C) SAN People -+ * -+ * Serial Peripheral Interface (SPI) registers. -+ * Based on AT91RM9200 datasheet revision E. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. ++ * Set a single color register. The values supplied are already ++ * rounded down to the hardware's capabilities (according to the ++ * entries in the var structure). Return != 0 for invalid regno. + */ ++static int s1d15605_setcolreg(u_int regno, u_int red, u_int green, u_int blue, ++ u_int transp, struct fb_info *info) ++{ ++ if (regno > 1) /* no. of hw registers - we only do mono now */ ++ return 1; ++ ++ return 0; ++} + -+#ifndef AT91_SPI_H -+#define AT91_SPI_H -+ -+#define AT91_SPI_CR 0x00 /* Control Register */ -+#define AT91_SPI_SPIEN (1 << 0) /* SPI Enable */ -+#define AT91_SPI_SPIDIS (1 << 1) /* SPI Disable */ -+#define AT91_SPI_SWRST (1 << 7) /* SPI Software Reset */ -+#define AT91_SPI_LASTXFER (1 << 24) /* Last Transfer [SAM9261 only] */ -+ -+#define AT91_SPI_MR 0x04 /* Mode Register */ -+#define AT91_SPI_MSTR (1 << 0) /* Master/Slave Mode */ -+#define AT91_SPI_PS (1 << 1) /* Peripheral Select */ -+#define AT91_SPI_PS_FIXED (0 << 1) -+#define AT91_SPI_PS_VARIABLE (1 << 1) -+#define AT91_SPI_PCSDEC (1 << 2) /* Chip Select Decode */ -+#define AT91_SPI_DIV32 (1 << 3) /* Clock Selection [AT91RM9200 only] */ -+#define AT91_SPI_MODFDIS (1 << 4) /* Mode Fault Detection */ -+#define AT91_SPI_LLB (1 << 7) /* Local Loopback Enable */ -+#define AT91_SPI_PCS (0xf << 16) /* Peripheral Chip Select */ -+#define AT91_SPI_DLYBCS (0xff << 24) /* Delay Between Chip Selects */ -+ -+#define AT91_SPI_RDR 0x08 /* Receive Data Register */ -+#define AT91_SPI_RD (0xffff << 0) /* Receive Data */ -+#define AT91_SPI_PCS (0xf << 16) /* Peripheral Chip Select */ -+ -+#define AT91_SPI_TDR 0x0c /* Transmit Data Register */ -+#define AT91_SPI_TD (0xffff << 0) /* Transmit Data */ -+#define AT91_SPI_PCS (0xf << 16) /* Peripheral Chip Select */ -+#define AT91_SPI_LASTXFER (1 << 24) /* Last Transfer [SAM9261 only] */ -+ -+#define AT91_SPI_SR 0x10 /* Status Register */ -+#define AT91_SPI_RDRF (1 << 0) /* Receive Data Register Full */ -+#define AT91_SPI_TDRE (1 << 1) /* Transmit Data Register Full */ -+#define AT91_SPI_MODF (1 << 2) /* Mode Fault Error */ -+#define AT91_SPI_OVRES (1 << 3) /* Overrun Error Status */ -+#define AT91_SPI_ENDRX (1 << 4) /* End of RX buffer */ -+#define AT91_SPI_ENDTX (1 << 5) /* End of TX buffer */ -+#define AT91_SPI_RXBUFF (1 << 6) /* RX Buffer Full */ -+#define AT91_SPI_TXBUFE (1 << 7) /* TX Buffer Empty */ -+#define AT91_SPI_NSSR (1 << 8) /* NSS Rising [SAM9261 only] */ -+#define AT91_SPI_TXEMPTY (1 << 9) /* Transmission Register Empty [SAM9261 only] */ -+#define AT91_SPI_SPIENS (1 << 16) /* SPI Enable Status */ -+ -+#define AT91_SPI_IER 0x14 /* Interrupt Enable Register */ -+#define AT91_SPI_IDR 0x18 /* Interrupt Disable Register */ -+#define AT91_SPI_IMR 0x1c /* Interrupt Mask Register */ -+ -+#define AT91_SPI_CSR(n) (0x30 + ((n) * 4)) /* Chip Select Registers 0-3 */ -+#define AT91_SPI_CPOL (1 << 0) /* Clock Polarity */ -+#define AT91_SPI_NCPHA (1 << 1) /* Clock Phase */ -+#define AT91_SPI_CSAAT (1 << 3) /* Chip Select Active After Transfer [SAM9261 only] */ -+#define AT91_SPI_BITS (0xf << 4) /* Bits Per Transfer */ -+#define AT91_SPI_BITS_8 (0 << 4) -+#define AT91_SPI_BITS_9 (1 << 4) -+#define AT91_SPI_BITS_10 (2 << 4) -+#define AT91_SPI_BITS_11 (3 << 4) -+#define AT91_SPI_BITS_12 (4 << 4) -+#define AT91_SPI_BITS_13 (5 << 4) -+#define AT91_SPI_BITS_14 (6 << 4) -+#define AT91_SPI_BITS_15 (7 << 4) -+#define AT91_SPI_BITS_16 (8 << 4) -+#define AT91_SPI_SCBR (0xff << 8) /* Serial Clock Baud Rate */ -+#define AT91_SPI_DLYBS (0xff << 16) /* Delay before SPCK */ -+#define AT91_SPI_DLYBCT (0xff << 24) /* Delay between Consecutive Transfers */ + -+#endif -diff -urN -x CVS linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91_ssc.h linux-2.6.19/include/asm-arm/arch-at91rm9200/at91_ssc.h ---- linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91_ssc.h Thu Jan 1 02:00:00 1970 -+++ linux-2.6.19/include/asm-arm/arch-at91rm9200/at91_ssc.h Mon Nov 6 12:40:23 2006 -@@ -0,0 +1,106 @@ +/* -+ * include/asm-arm/arch-at91rm9200/at91_ssc.h -+ * -+ * Copyright (C) SAN People -+ * -+ * Serial Synchronous Controller (SSC) registers. -+ * Based on AT91RM9200 datasheet revision E. ++ * Currently, the routine will simply shut-off the backlight and prevent ++ * updates/refreshes. Modify according to application. + * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. ++ * 0 unblank, 1 blank, 2 no vsync, 3 no hsync, 4 off + */ ++static int s1d15605_blank(int blank, struct fb_info *info) ++{ ++#ifdef CONFIG_PMAC_BACKLIGHT ++ if (blank) ++ pmac_backlight->props.power = FB_BLANK_POWERDOWN; ++ else ++ pmac_backlight->props.power = FB_BLANK_UNBLANK; ++ backlight_update_status(pmac_backlight); ++#endif ++ return 1; ++} + -+#ifndef AT91_SSC_H -+#define AT91_SSC_H -+ -+#define AT91_SSC_CR 0x00 /* Control Register */ -+#define AT91_SSC_RXEN (1 << 0) /* Receive Enable */ -+#define AT91_SSC_RXDIS (1 << 1) /* Receive Disable */ -+#define AT91_SSC_TXEN (1 << 8) /* Transmit Enable */ -+#define AT91_SSC_TXDIS (1 << 9) /* Transmit Disable */ -+#define AT91_SSC_SWRST (1 << 15) /* Software Reset */ -+ -+#define AT91_SSC_CMR 0x04 /* Clock Mode Register */ -+#define AT91_SSC_CMR_DIV (0xfff << 0) /* Clock Divider */ -+ -+#define AT91_SSC_RCMR 0x10 /* Receive Clock Mode Register */ -+#define AT91_SSC_CKS (3 << 0) /* Clock Selection */ -+#define AT91_SSC_CKS_DIV (0 << 0) -+#define AT91_SSC_CKS_CLOCK (1 << 0) -+#define AT91_SSC_CKS_PIN (2 << 0) -+#define AT91_SSC_CKO (7 << 2) /* Clock Output Mode Selection */ -+#define AT91_SSC_CKO_NONE (0 << 2) -+#define AT91_SSC_CKO_CONTINUOUS (1 << 2) -+#define AT91_SSC_CKI (1 << 5) /* Clock Inversion */ -+#define AT91_SSC_CKI_FALLING (0 << 5) -+#define AT91_SSC_CK_RISING (1 << 5) -+#define AT91_SSC_CKG (1 << 6) /* Receive Clock Gating Selection [AT91SAM9261 only] */ -+#define AT91_SSC_CKG_NONE (0 << 6) -+#define AT91_SSC_CKG_RFLOW (1 << 6) -+#define AT91_SSC_CKG_RFHIGH (2 << 6) -+#define AT91_SSC_START (0xf << 8) /* Start Selection */ -+#define AT91_SSC_START_CONTINUOUS (0 << 8) -+#define AT91_SSC_START_TX_RX (1 << 8) -+#define AT91_SSC_START_LOW_RF (2 << 8) -+#define AT91_SSC_START_HIGH_RF (3 << 8) -+#define AT91_SSC_START_FALLING_RF (4 << 8) -+#define AT91_SSC_START_RISING_RF (5 << 8) -+#define AT91_SSC_START_LEVEL_RF (6 << 8) -+#define AT91_SSC_START_EDGE_RF (7 << 8) -+#define AT91_SSC_STOP (1 << 12) /* Receive Stop Selection [AT91SAM9261 only] */ -+#define AT91_SSC_STTDLY (0xff << 16) /* Start Delay */ -+#define AT91_SSC_PERIOD (0xff << 24) /* Period Divider Selection */ -+ -+#define AT91_SSC_RFMR 0x14 /* Receive Frame Mode Register */ -+#define AT91_SSC_DATALEN (0x1f << 0) /* Data Length */ -+#define AT91_SSC_LOOP (1 << 5) /* Loop Mode */ -+#define AT91_SSC_MSBF (1 << 7) /* Most Significant Bit First */ -+#define AT91_SSC_DATNB (0xf << 8) /* Data Number per Frame */ -+#define AT91_SSC_FSLEN (0xf << 16) /* Frame Sync Length */ -+#define AT91_SSC_FSOS (7 << 20) /* Frame Sync Output Selection */ -+#define AT91_SSC_FSOS_NONE (0 << 20) -+#define AT91_SSC_FSOS_NEGATIVE (1 << 20) -+#define AT91_SSC_FSOS_POSITIVE (2 << 20) -+#define AT91_SSC_FSOS_LOW (3 << 20) -+#define AT91_SSC_FSOS_HIGH (4 << 20) -+#define AT91_SSC_FSOS_TOGGLE (5 << 20) -+#define AT91_SSC_FSEDGE (1 << 24) /* Frame Sync Edge Detection */ -+#define AT91_SSC_FSEDGE_POSITIVE (0 << 24) -+#define AT91_SSC_FSEDGE_NEGATIVE (1 << 24) -+ -+#define AT91_SSC_TCMR 0x18 /* Transmit Clock Mode Register */ -+#define AT91_SSC_TFMR 0x1c /* Transmit Fram Mode Register */ -+#define AT91_SSC_DATDEF (1 << 5) /* Data Default Value */ -+#define AT91_SSC_FSDEN (1 << 23) /* Frame Sync Data Enable */ -+ -+#define AT91_SSC_RHR 0x20 /* Receive Holding Register */ -+#define AT91_SSC_THR 0x24 /* Transmit Holding Register */ -+#define AT91_SSC_RSHR 0x30 /* Receive Sync Holding Register */ -+#define AT91_SSC_TSHR 0x34 /* Transmit Sync Holding Register */ -+ -+#define AT91_SSC_RC0R 0x38 /* Receive Compare 0 Register [AT91SAM9261 only] */ -+#define AT91_SSC_RC1R 0x3c /* Receive Compare 1 Register [AT91SAM9261 only] */ -+ -+#define AT91_SSC_SR 0x40 /* Status Register */ -+#define AT91_SSC_TXRDY (1 << 0) /* Transmit Ready */ -+#define AT91_SSC_TXEMPTY (1 << 1) /* Transmit Empty */ -+#define AT91_SSC_ENDTX (1 << 2) /* End of Transmission */ -+#define AT91_SSC_TXBUFE (1 << 3) /* Transmit Buffer Empty */ -+#define AT91_SSC_RXRDY (1 << 4) /* Receive Ready */ -+#define AT91_SSC_OVRUN (1 << 5) /* Receive Overrun */ -+#define AT91_SSC_ENDRX (1 << 6) /* End of Reception */ -+#define AT91_SSC_RXBUFF (1 << 7) /* Receive Buffer Full */ -+#define AT91_SSC_CP0 (1 << 8) /* Compare 0 [AT91SAM9261 only] */ -+#define AT91_SSC_CP1 (1 << 9) /* Compare 1 [AT91SAM9261 only] */ -+#define AT91_SSC_TXSYN (1 << 10) /* Transmit Sync */ -+#define AT91_SSC_RXSYN (1 << 11) /* Receive Sync */ -+#define AT91_SSC_TXENA (1 << 16) /* Transmit Enable */ -+#define AT91_SSC_RXENA (1 << 17) /* Receive Enable */ -+ -+#define AT91_SSC_IER 0x44 /* Interrupt Enable Register */ -+#define AT91_SSC_IDR 0x48 /* Interrupt Disable Register */ -+#define AT91_SSC_IMR 0x4c /* Interrupt Mask Register */ + -+#endif -diff -urN -x CVS linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91_st.h linux-2.6.19/include/asm-arm/arch-at91rm9200/at91_st.h ---- linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91_st.h Thu Jan 1 02:00:00 1970 -+++ linux-2.6.19/include/asm-arm/arch-at91rm9200/at91_st.h Tue Oct 24 17:15:02 2006 -@@ -0,0 +1,49 @@ +/* -+ * include/asm-arm/arch-at91rm9200/at91_st.h -+ * -+ * Copyright (C) 2005 Ivan Kokshaysky -+ * Copyright (C) SAN People ++ * Pan or Wrap the Display + * -+ * System Timer (ST) - System peripherals registers. -+ * Based on AT91RM9200 datasheet revision E. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. ++ * This call looks only at xoffset, yoffset and the FB_VMODE_YWRAP flag + */ ++/* ++static int s1d15605_pan_display(struct fb_var_screeninfo *var, ++ struct fb_info *info) ++{ ++ if (var->vmode & FB_VMODE_YWRAP) { ++ if (var->yoffset < 0 ++ || var->yoffset >= info->var.yres_virtual ++ || var->xoffset) ++ return -EINVAL; ++ } else { ++ if (var->xoffset + var->xres > info->var.xres_virtual || ++ var->yoffset + var->yres > info->var.yres_virtual) ++ return -EINVAL; ++ } ++ info->var.xoffset = var->xoffset; ++ info->var.yoffset = var->yoffset; ++ if (var->vmode & FB_VMODE_YWRAP) ++ info->var.vmode |= FB_VMODE_YWRAP; ++ else ++ info->var.vmode &= ~FB_VMODE_YWRAP; ++ return 0; ++} ++*/ + -+#ifndef AT91_ST_H -+#define AT91_ST_H -+ -+#define AT91_ST_CR (AT91_ST + 0x00) /* Control Register */ -+#define AT91_ST_WDRST (1 << 0) /* Watchdog Timer Restart */ -+ -+#define AT91_ST_PIMR (AT91_ST + 0x04) /* Period Interval Mode Register */ -+#define AT91_ST_PIV (0xffff << 0) /* Period Interval Value */ + -+#define AT91_ST_WDMR (AT91_ST + 0x08) /* Watchdog Mode Register */ -+#define AT91_ST_WDV (0xffff << 0) /* Watchdog Counter Value */ -+#define AT91_ST_RSTEN (1 << 16) /* Reset Enable */ -+#define AT91_ST_EXTEN (1 << 17) /* External Signal Assertion Enable */ ++static void s1d15605_copyarea(struct fb_info *info, const struct fb_copyarea *region) ++{ ++ cfb_copyarea(info, region); ++ s1d15605_update(info); ++} + -+#define AT91_ST_RTMR (AT91_ST + 0x0c) /* Real-time Mode Register */ -+#define AT91_ST_RTPRES (0xffff << 0) /* Real-time Prescalar Value */ + -+#define AT91_ST_SR (AT91_ST + 0x10) /* Status Register */ -+#define AT91_ST_PITS (1 << 0) /* Period Interval Timer Status */ -+#define AT91_ST_WDOVF (1 << 1) /* Watchdog Overflow */ -+#define AT91_ST_RTTINC (1 << 2) /* Real-time Timer Increment */ -+#define AT91_ST_ALMS (1 << 3) /* Alarm Status */ ++static void s1d15605_fillrect (struct fb_info *info, const struct fb_fillrect *rect) ++{ ++ cfb_fillrect(info, rect); ++ s1d15605_update(info); ++} + -+#define AT91_ST_IER (AT91_ST + 0x14) /* Interrupt Enable Register */ -+#define AT91_ST_IDR (AT91_ST + 0x18) /* Interrupt Disable Register */ -+#define AT91_ST_IMR (AT91_ST + 0x1c) /* Interrupt Mask Register */ + -+#define AT91_ST_RTAR (AT91_ST + 0x20) /* Real-time Alarm Register */ -+#define AT91_ST_ALMV (0xfffff << 0) /* Alarm Value */ ++static void s1d15605_imageblit(struct fb_info *p, const struct fb_image *image) ++{ ++ cfb_imageblit(p, image); ++ s1d15605_update(p); ++} + -+#define AT91_ST_CRTR (AT91_ST + 0x24) /* Current Real-time Register */ -+#define AT91_ST_CRTV (0xfffff << 0) /* Current Real-Time Value */ + -+#endif -diff -urN -x CVS linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91_tc.h linux-2.6.19/include/asm-arm/arch-at91rm9200/at91_tc.h ---- linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91_tc.h Thu Jan 1 02:00:00 1970 -+++ linux-2.6.19/include/asm-arm/arch-at91rm9200/at91_tc.h Tue Oct 24 15:21:53 2006 -@@ -0,0 +1,146 @@ +/* -+ * include/asm-arm/arch-at91rm9200/at91_tc.h -+ * -+ * Copyright (C) SAN People -+ * -+ * Timer/Counter Unit (TC) registers. -+ * Based on AT91RM9200 datasheet revision E. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. ++ * Write the users data to our framebuffer, and then trigger a psuedo DMA + */ ++static ssize_t s1d15605_write(struct file *file, const char *buf, ++ size_t count, loff_t *ppos) ++{ ++ unsigned long p = *ppos; ++ struct inode *inode = file->f_dentry->d_inode; ++ int fbidx = iminor(inode); ++ struct fb_info *info = registered_fb[fbidx]; ++ int err; ++ ++ if (p > info->fix.smem_len) ++ return -ENOSPC; ++ if (count >= info->fix.smem_len) ++ count = info->fix.smem_len; ++ err = 0; ++ if (count + p > info->fix.smem_len) { ++ count = info->fix.smem_len - p; ++ err = -ENOSPC; ++ } ++ if (count) { ++ char *base_addr; ++ ++ base_addr = info->screen_base; ++ count -= copy_from_user(base_addr+p, buf, count); ++ *ppos += count; ++ err = -EFAULT; ++ } ++ ++ s1d15605_update(info); + -+#ifndef AT91_TC_H -+#define AT91_TC_H -+ -+#define AT91_TC_BCR 0xc0 /* TC Block Control Register */ -+#define AT91_TC_SYNC (1 << 0) /* Synchro Command */ -+ -+#define AT91_TC_BMR 0xc4 /* TC Block Mode Register */ -+#define AT91_TC_TC0XC0S (3 << 0) /* External Clock Signal 0 Selection */ -+#define AT91_TC_TC0XC0S_TCLK0 (0 << 0) -+#define AT91_TC_TC0XC0S_NONE (1 << 0) -+#define AT91_TC_TC0XC0S_TIOA1 (2 << 0) -+#define AT91_TC_TC0XC0S_TIOA2 (3 << 0) -+#define AT91_TC_TC1XC1S (3 << 2) /* External Clock Signal 1 Selection */ -+#define AT91_TC_TC1XC1S_TCLK1 (0 << 2) -+#define AT91_TC_TC1XC1S_NONE (1 << 2) -+#define AT91_TC_TC1XC1S_TIOA0 (2 << 2) -+#define AT91_TC_TC1XC1S_TIOA2 (3 << 2) -+#define AT91_TC_TC2XC2S (3 << 4) /* External Clock Signal 2 Selection */ -+#define AT91_TC_TC2XC2S_TCLK2 (0 << 4) -+#define AT91_TC_TC2XC2S_NONE (1 << 4) -+#define AT91_TC_TC2XC2S_TIOA0 (2 << 4) -+#define AT91_TC_TC2XC2S_TIOA1 (3 << 4) -+ -+ -+#define AT91_TC_CCR 0x00 /* Channel Control Register */ -+#define AT91_TC_CLKEN (1 << 0) /* Counter Clock Enable Command */ -+#define AT91_TC_CLKDIS (1 << 1) /* Counter CLock Disable Command */ -+#define AT91_TC_SWTRG (1 << 2) /* Software Trigger Command */ -+ -+#define AT91_TC_CMR 0x04 /* Channel Mode Register */ -+#define AT91_TC_TCCLKS (7 << 0) /* Capture/Waveform Mode: Clock Selection */ -+#define AT91_TC_TIMER_CLOCK1 (0 << 0) -+#define AT91_TC_TIMER_CLOCK2 (1 << 0) -+#define AT91_TC_TIMER_CLOCK3 (2 << 0) -+#define AT91_TC_TIMER_CLOCK4 (3 << 0) -+#define AT91_TC_TIMER_CLOCK5 (4 << 0) -+#define AT91_TC_XC0 (5 << 0) -+#define AT91_TC_XC1 (6 << 0) -+#define AT91_TC_XC2 (7 << 0) -+#define AT91_TC_CLKI (1 << 3) /* Capture/Waveform Mode: Clock Invert */ -+#define AT91_TC_BURST (3 << 4) /* Capture/Waveform Mode: Burst Signal Selection */ -+#define AT91_TC_LDBSTOP (1 << 6) /* Capture Mode: Counter Clock Stopped with TB Loading */ -+#define AT91_TC_LDBDIS (1 << 7) /* Capture Mode: Counter Clock Disable with RB Loading */ -+#define AT91_TC_ETRGEDG (3 << 8) /* Capture Mode: External Trigger Edge Selection */ -+#define AT91_TC_ABETRG (1 << 10) /* Capture Mode: TIOA or TIOB External Trigger Selection */ -+#define AT91_TC_CPCTRG (1 << 14) /* Capture Mode: RC Compare Trigger Enable */ -+#define AT91_TC_WAVE (1 << 15) /* Capture/Waveform mode */ -+#define AT91_TC_LDRA (3 << 16) /* Capture Mode: RA Loading Selection */ -+#define AT91_TC_LDRB (3 << 18) /* Capture Mode: RB Loading Selection */ -+ -+#define AT91_TC_CPCSTOP (1 << 6) /* Waveform Mode: Counter Clock Stopped with RC Compare */ -+#define AT91_TC_CPCDIS (1 << 7) /* Waveform Mode: Counter Clock Disable with RC Compare */ -+#define AT91_TC_EEVTEDG (3 << 8) /* Waveform Mode: External Event Edge Selection */ -+#define AT91_TC_EEVTEDG_NONE (0 << 8) -+#define AT91_TC_EEVTEDG_RISING (1 << 8) -+#define AT91_TC_EEVTEDG_FALLING (2 << 8) -+#define AT91_TC_EEVTEDG_BOTH (3 << 8) -+#define AT91_TC_EEVT (3 << 10) /* Waveform Mode: External Event Selection */ -+#define AT91_TC_EEVT_TIOB (0 << 10) -+#define AT91_TC_EEVT_XC0 (1 << 10) -+#define AT91_TC_EEVT_XC1 (2 << 10) -+#define AT91_TC_EEVT_XC2 (3 << 10) -+#define AT91_TC_ENETRG (1 << 12) /* Waveform Mode: External Event Trigger Enable */ -+#define AT91_TC_WAVESEL (3 << 13) /* Waveform Mode: Waveform Selection */ -+#define AT91_TC_WAVESEL_UP (0 << 13) -+#define AT91_TC_WAVESEL_UP_AUTO (2 << 13) -+#define AT91_TC_WAVESEL_UPDOWN (1 << 13) -+#define AT91_TC_WAVESEL_UPDOWN_AUTO (3 << 13) -+#define AT91_TC_ACPA (3 << 16) /* Waveform Mode: RA Compare Effect on TIOA */ -+#define AT91_TC_ACPA_NONE (0 << 16) -+#define AT91_TC_ACPA_SET (1 << 16) -+#define AT91_TC_ACPA_CLEAR (2 << 16) -+#define AT91_TC_ACPA_TOGGLE (3 << 16) -+#define AT91_TC_ACPC (3 << 18) /* Waveform Mode: RC Compre Effect on TIOA */ -+#define AT91_TC_ACPC_NONE (0 << 18) -+#define AT91_TC_ACPC_SET (1 << 18) -+#define AT91_TC_ACPC_CLEAR (2 << 18) -+#define AT91_TC_ACPC_TOGGLE (3 << 18) -+#define AT91_TC_AEEVT (3 << 20) /* Waveform Mode: External Event Effect on TIOA */ -+#define AT91_TC_AEEVT_NONE (0 << 20) -+#define AT91_TC_AEEVT_SET (1 << 20) -+#define AT91_TC_AEEVT_CLEAR (2 << 20) -+#define AT91_TC_AEEVT_TOGGLE (3 << 20) -+#define AT91_TC_ASWTRG (3 << 22) /* Waveform Mode: Software Trigger Effect on TIOA */ -+#define AT91_TC_ASWTRG_NONE (0 << 22) -+#define AT91_TC_ASWTRG_SET (1 << 22) -+#define AT91_TC_ASWTRG_CLEAR (2 << 22) -+#define AT91_TC_ASWTRG_TOGGLE (3 << 22) -+#define AT91_TC_BCPB (3 << 24) /* Waveform Mode: RB Compare Effect on TIOB */ -+#define AT91_TC_BCPB_NONE (0 << 24) -+#define AT91_TC_BCPB_SET (1 << 24) -+#define AT91_TC_BCPB_CLEAR (2 << 24) -+#define AT91_TC_BCPB_TOGGLE (3 << 24) -+#define AT91_TC_BCPC (3 << 26) /* Waveform Mode: RC Compare Effect on TIOB */ -+#define AT91_TC_BCPC_NONE (0 << 26) -+#define AT91_TC_BCPC_SET (1 << 26) -+#define AT91_TC_BCPC_CLEAR (2 << 26) -+#define AT91_TC_BCPC_TOGGLE (3 << 26) -+#define AT91_TC_BEEVT (3 << 28) /* Waveform Mode: External Event Effect on TIOB */ -+#define AT91_TC_BEEVT_NONE (0 << 28) -+#define AT91_TC_BEEVT_SET (1 << 28) -+#define AT91_TC_BEEVT_CLEAR (2 << 28) -+#define AT91_TC_BEEVT_TOGGLE (3 << 28) -+#define AT91_TC_BSWTRG (3 << 30) /* Waveform Mode: Software Trigger Effect on TIOB */ -+#define AT91_TC_BSWTRG_NONE (0 << 30) -+#define AT91_TC_BSWTRG_SET (1 << 30) -+#define AT91_TC_BSWTRG_CLEAR (2 << 30) -+#define AT91_TC_BSWTRG_TOGGLE (3 << 30) -+ -+#define AT91_TC_CV 0x10 /* Counter Value */ -+#define AT91_TC_RA 0x14 /* Register A */ -+#define AT91_TC_RB 0x18 /* Register B */ -+#define AT91_TC_RC 0x1c /* Register C */ -+ -+#define AT91_TC_SR 0x20 /* Status Register */ -+#define AT91_TC_COVFS (1 << 0) /* Counter Overflow Status */ -+#define AT91_TC_LOVRS (1 << 1) /* Load Overrun Status */ -+#define AT91_TC_CPAS (1 << 2) /* RA Compare Status */ -+#define AT91_TC_CPBS (1 << 3) /* RB Compare Status */ -+#define AT91_TC_CPCS (1 << 4) /* RC Compare Status */ -+#define AT91_TC_LDRAS (1 << 5) /* RA Loading Status */ -+#define AT91_TC_LDRBS (1 << 6) /* RB Loading Status */ -+#define AT91_TC_ETRGS (1 << 7) /* External Trigger Status */ -+#define AT91_TC_CLKSTA (1 << 16) /* Clock Enabling Status */ -+#define AT91_TC_MTIOA (1 << 17) /* TIOA Mirror */ -+#define AT91_TC_MTIOB (1 << 18) /* TIOB Mirror */ -+ -+#define AT91_TC_IER 0x24 /* Interrupt Enable Register */ -+#define AT91_TC_IDR 0x28 /* Interrupt Disable Register */ -+#define AT91_TC_IMR 0x2c /* Interrupt Mask Register */ ++ if (count) ++ return count; + ++ return err; ++} ++ ++#ifdef USE_PRIVATE_VMA_FXS ++static void s1d15605_vma_open(struct vm_area_struct *vma) ++{ ++ // FIXME - store stats in the device data via vm_private_data ++} ++ ++ ++static void s1d15605_vma_close(struct vm_area_struct *vma) ++{ ++ // FIXME - store stats in the device data via vm_private_data ++} ++ ++ ++static struct page *s1d15605_vma_nopage(struct vm_area_struct *vma, ++ unsigned long address, int *type) ++{ ++ struct page *page; ++ struct fb_info *info = vma->vm_private_data; ++ ++ page = virt_to_page(info->screen_base); ++ get_page(page); ++ ++ // FIXME - now someone has a link to our page, start periodically blitting ++ // latest updates to the actual device. ++ ++ return page; ++} ++ ++ ++static struct vm_operations_struct s1d15605_vm_ops = { ++ .open = s1d15605_vma_open, ++ .close = s1d15605_vma_close, ++ .nopage = s1d15605_vma_nopage ++}; ++ ++ ++/* We don't do much here - because we have special vm_ops */ ++static int s1d15605_mmap(struct fb_info *info, struct vm_area_struct *vma) ++{ ++ vma->vm_ops = &s1d15605_vm_ops; ++ vma->vm_flags |= VM_RESERVED; ++ vma->vm_private_data = info; ++ s1d15605_vma_open(vma); ++ ++ return 0; ++} ++#endif /* USE_PRIVATE_VMA_FXS */ ++ ++ ++static struct fb_ops s1d15605fb_ops = { ++ .owner = THIS_MODULE, ++ .fb_check_var = s1d15605_check_var, ++ .fb_set_par = s1d15605_set_par, ++ .fb_setcolreg = s1d15605_setcolreg, ++ .fb_blank = s1d15605_blank, ++// .fb_pan_display = s1d15605_pan_display, ++ .fb_fillrect = s1d15605_fillrect, ++ .fb_copyarea = s1d15605_copyarea, ++ .fb_imageblit = s1d15605_imageblit, ++ .fb_write = s1d15605_write, ++#ifdef USE_PRIVATE_VMA_FXS ++ .fb_mmap = s1d15605_mmap, +#endif -diff -urN -x CVS linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91_twi.h linux-2.6.19/include/asm-arm/arch-at91rm9200/at91_twi.h ---- linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91_twi.h Thu Jan 1 02:00:00 1970 -+++ linux-2.6.19/include/asm-arm/arch-at91rm9200/at91_twi.h Thu Nov 2 16:46:07 2006 -@@ -0,0 +1,57 @@ -+/* -+ * include/asm-arm/arch-at91rm9200/at91_twi.h -+ * -+ * Copyright (C) 2005 Ivan Kokshaysky -+ * Copyright (C) SAN People -+ * -+ * Two-wire Interface (TWI) registers. -+ * Based on AT91RM9200 datasheet revision E. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ */ ++}; ++ ++ ++static void s1d15605_device_init(struct s1d15605fb_info *sinfo) { + -+#ifndef AT91_TWI_H -+#define AT91_TWI_H -+ -+#define AT91_TWI_CR 0x00 /* Control Register */ -+#define AT91_TWI_START (1 << 0) /* Send a Start Condition */ -+#define AT91_TWI_STOP (1 << 1) /* Send a Stop Condition */ -+#define AT91_TWI_MSEN (1 << 2) /* Master Transfer Enable */ -+#define AT91_TWI_MSDIS (1 << 3) /* Master Transfer Disable */ -+#define AT91_TWI_SWRST (1 << 7) /* Software Reset */ -+ -+#define AT91_TWI_MMR 0x04 /* Master Mode Register */ -+#define AT91_TWI_IADRSZ (3 << 8) /* Internal Device Address Size */ -+#define AT91_TWI_IADRSZ_NO (0 << 8) -+#define AT91_TWI_IADRSZ_1 (1 << 8) -+#define AT91_TWI_IADRSZ_2 (2 << 8) -+#define AT91_TWI_IADRSZ_3 (3 << 8) -+#define AT91_TWI_MREAD (1 << 12) /* Master Read Direction */ -+#define AT91_TWI_DADR (0x7f << 16) /* Device Address */ -+ -+#define AT91_TWI_IADR 0x0c /* Internal Address Register */ -+ -+#define AT91_TWI_CWGR 0x10 /* Clock Waveform Generator Register */ -+#define AT91_TWI_CLDIV (0xff << 0) /* Clock Low Divisor */ -+#define AT91_TWI_CHDIV (0xff << 8) /* Clock High Divisor */ -+#define AT91_TWI_CKDIV (7 << 16) /* Clock Divider */ -+ -+#define AT91_TWI_SR 0x20 /* Status Register */ -+#define AT91_TWI_TXCOMP (1 << 0) /* Transmission Complete */ -+#define AT91_TWI_RXRDY (1 << 1) /* Receive Holding Register Ready */ -+#define AT91_TWI_TXRDY (1 << 2) /* Transmit Holding Register Ready */ -+#define AT91_TWI_OVRE (1 << 6) /* Overrun Error [AT91RM9200 only] */ -+#define AT91_TWI_UNRE (1 << 7) /* Underrun Error [AT91RM9200 only] */ -+#define AT91_TWI_NACK (1 << 8) /* Not Acknowledged */ -+ -+#define AT91_TWI_IER 0x24 /* Interrupt Enable Register */ -+#define AT91_TWI_IDR 0x28 /* Interrupt Disable Register */ -+#define AT91_TWI_IMR 0x2c /* Interrupt Mask Register */ -+#define AT91_TWI_RHR 0x30 /* Receive Holding Register */ -+#define AT91_TWI_THR 0x34 /* Transmit Holding Register */ ++ char value; + ++ /* release the reset line by reading the device - proto hardware */ ++ value = READ_COMMAND; ++ value = READ_COMMAND; ++ ++#ifdef CONFIG_MACH_KB9200 ++ /* new boards have dedicated reset line */ ++ gpio_set_value(sinfo->reset_pin, 1); +#endif + -diff -urN -x CVS linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91_wdt.h linux-2.6.19/include/asm-arm/arch-at91rm9200/at91_wdt.h ---- linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91_wdt.h Thu Jan 1 02:00:00 1970 -+++ linux-2.6.19/include/asm-arm/arch-at91rm9200/at91_wdt.h Thu Nov 9 15:10:16 2006 -@@ -0,0 +1,34 @@ -+/* -+ * include/asm-arm/arch-at91rm9200/at91_wdt.h -+ * -+ * Watchdog Timer (WDT) - System peripherals regsters. -+ * Based on AT91SAM9261 datasheet revision D. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ */ ++ /* initialize the device within 5ms */ ++ WRITE_COMMAND(RESET_DISPLAY); ++ WRITE_COMMAND(LCD_BIAS_1_9); ++ WRITE_COMMAND(ADC_SELECT_REVERSE); ++ WRITE_COMMAND(COMMON_OUTPUT_NORMAL); ++ WRITE_COMMAND(V5_RESISTOR_RATIO); ++ WRITE_COMMAND(ELECTRONIC_VOLUME_SET); ++ WRITE_COMMAND(ELECTRONIC_VOLUME_INIT); ++ WRITE_COMMAND(POWER_CONTROL_SET | VOLTAGE_REGULATOR | VOLTAGE_FOLLOWER | BOOSTER_CIRCUIT); ++ WRITE_COMMAND(DISPLAY_ON); + -+#ifndef AT91_WDT_H -+#define AT91_WDT_H ++ WRITE_COMMAND(RESISTOR_RATIO_START + 4); ++ WRITE_COMMAND(ELECTRONIC_VOLUME_SET); ++ WRITE_COMMAND(0x33); ++} + -+#define AT91_WDT_CR (AT91_WDT + 0x00) /* Watchdog Control Register */ -+#define AT91_WDT_WDRSTT (1 << 0) /* Restart */ -+#define AT91_WDT_KEY (0xff << 24) /* KEY Password */ + -+#define AT91_WDT_MR (AT91_WDT + 0x04) /* Watchdog Mode Register */ -+#define AT91_WDT_WDV (0xfff << 0) /* Counter Value */ -+#define AT91_WDT_WDFIEN (1 << 12) /* Fault Interrupt Enable */ -+#define AT91_WDT_WDRSTEN (1 << 13) /* Reset Processor */ -+#define AT91_WDT_WDRPROC (1 << 14) /* Timer Restart */ -+#define AT91_WDT_WDDIS (1 << 15) /* Watchdog Disable */ -+#define AT91_WDT_WDD (0xfff << 16) /* Delta Value */ -+#define AT91_WDT_WDDBGHLT (1 << 28) /* Debug Halt */ -+#define AT91_WDT_WDIDLEHLT (1 << 29) /* Idle Halt */ ++static int s1d15605fb_probe(struct platform_device *pdev) ++{ ++ struct device *dev = &pdev->dev; ++ struct fb_info *info; ++ struct s1d15605fb_info *sinfo; ++ int ret; + -+#define AT91_WDT_SR (AT91_WDT + 0x08) /* Watchdog Status Register */ -+#define AT91_WDT_WDUNF (1 << 0) /* Watchdog Underflow */ -+#define AT91_WDT_WDERR (1 << 1) /* Watchdog Error */ ++ MSG("%s\n", __func__); + -+#endif -diff -urN -x CVS linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91rm9200.h linux-2.6.19/include/asm-arm/arch-at91rm9200/at91rm9200.h ---- linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91rm9200.h Mon Dec 4 16:41:04 2006 -+++ linux-2.6.19/include/asm-arm/arch-at91rm9200/at91rm9200.h Fri Nov 10 09:25:26 2006 -@@ -80,6 +80,22 @@ - - - /* -+ * System Peripherals (offset from AT91_BASE_SYS) -+ */ -+#define AT91_AIC (0xfffff000 - AT91_BASE_SYS) /* Advanced Interrupt Controller */ -+#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS) /* Debug Unit */ -+#define AT91_PIOA (0xfffff400 - AT91_BASE_SYS) /* PIO Controller A */ -+#define AT91_PIOB (0xfffff600 - AT91_BASE_SYS) /* PIO Controller B */ -+#define AT91_PIOC (0xfffff800 - AT91_BASE_SYS) /* PIO Controller C */ -+#define AT91_PIOD (0xfffffa00 - AT91_BASE_SYS) /* PIO Controller D */ -+#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) /* Power Management Controller */ -+#define AT91_ST (0xfffffd00 - AT91_BASE_SYS) /* System Timer */ -+#define AT91_RTC (0xfffffe00 - AT91_BASE_SYS) /* Real-Time Clock */ -+#define AT91_MC (0xffffff00 - AT91_BASE_SYS) /* Memory Controllers */ -+ -+#define AT91_MATRIX 0 /* not supported */ ++ if (!(info = framebuffer_alloc(sizeof(struct s1d15605fb_info), dev))) { ++ dev_err(dev, "Cannot allocate framebuffer struct\n"); ++ return -ENOMEM; ++ } + ++ sinfo = info->par; ++ sinfo->info = info; ++ sinfo->pdev = pdev; ++ ++ if (pdev->num_resources < 2) { ++ dev_err(dev, "Resources unusable\n"); ++ ret = -ENODEV; ++ goto free_info; ++ } ++ ++ info->fbops = &s1d15605fb_ops; ++ strcpy(info->fix.id, pdev->name); ++ ++ info->fix.mmio_start = pdev->resource[0].start; ++ info->fix.mmio_len = pdev->resource[0].end - pdev->resource[0].start + 1; ++ sinfo->reset_pin = pdev->resource[1].start; ++ ++ ret = s1d15605fb_resize_framebuffer(sinfo); ++ if (ret < 0) { ++ dev_err(dev, "Cannot resize framebuffer: %d\n", ret); ++ goto free_fb; ++ } ++ ++ if (!request_mem_region(info->fix.mmio_start, ++ info->fix.mmio_len, pdev->name)) { ++ ret = -EBUSY; ++ goto free_fb; ++ } ++ ++ sinfo->mmio = ioremap(info->fix.mmio_start, info->fix.mmio_len); ++ if (!sinfo->mmio) { ++ dev_err(dev, "Cannot map LCD memory region\n"); ++ goto release_mem; ++ } ++ ++ s1d15605_device_init(sinfo); ++ ++ ret = fb_find_mode(&info->var, info, NULL, NULL, 0, NULL, 1); ++ ++ if (!ret || (ret == 4)) ++ info->var = s1d15605_default; ++ ++ info->fix = s1d15605_fix; ++ info->flags = FBINFO_FLAG_DEFAULT | ++/* FBINFO_HWACCEL_YPAN | */ ++ FBINFO_HWACCEL_FILLRECT | FBINFO_HWACCEL_COPYAREA; ++ ++ ret = register_framebuffer(info); ++ if (ret < 0) { ++ dev_err(dev, "Failed to register framebuffer device: %d\n", ret); ++ goto unmap_mmio; ++ } ++ ++ dev_set_drvdata(dev, info); ++ ++ memset(info->screen_base, 0, info->fix.smem_len); ++ info->var.activate |= FB_ACTIVATE_NOW; ++ ret = fb_set_var(info, &info->var); ++ if (ret) { ++ dev_warn(dev, "Unable to set display parameters\n"); ++ } ++ ++ info->var.activate &= ~(FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW); ++ ++ dev_dbg(dev, "%s SUCCESS\n", __func__); ++ ++ dev_info(dev, "Driver $Revision: 1.1 $\n"); ++ ++ return 0; ++ ++unmap_mmio: ++ iounmap(sinfo->mmio); ++release_mem: ++ release_mem_region(info->fix.mmio_start, info->fix.mmio_len); ++free_fb: ++ kfree(info->screen_base); ++ ++free_info: ++ framebuffer_release(info); ++ ++ dev_dbg(dev, "%s FAILED\n", __func__); ++ return ret; ++} ++ ++ ++static int s1d15605fb_remove(struct platform_device *pdev) ++{ ++ struct device *dev = &pdev->dev; ++ struct fb_info *info = dev_get_drvdata(dev); ++ struct s1d15605fb_info *sinfo = info->par; ++ ++ if (!sinfo) ++ return 0; ++ ++ unregister_framebuffer(info); ++ ++ iounmap(sinfo->mmio); ++ release_mem_region(info->fix.mmio_start, info->fix.mmio_len); ++ ++ kfree(info->screen_base); ++ ++ dev_set_drvdata(dev, NULL); ++ framebuffer_release(info); ++ return 0; ++} ++ ++ ++static struct platform_driver s1d15605fb_driver = { ++ .probe = s1d15605fb_probe, ++ .remove = s1d15605fb_remove, ++ .driver = { ++ .name = "s1d15605fb", ++ .owner = THIS_MODULE, ++ }, ++}; ++ ++ ++static int __init s1d15605fb_init(void) ++{ ++ return platform_driver_register(&s1d15605fb_driver); ++} ++ ++ ++static void __exit s1d15605fb_exit(void) ++{ ++ platform_driver_unregister(&s1d15605fb_driver); ++} ++ ++ ++module_init(s1d15605fb_init); ++module_exit(s1d15605fb_exit); ++ ++ ++MODULE_AUTHOR("KwikByte"); ++MODULE_DESCRIPTION("Epson S1D15605 LCD Controller framebuffer driver"); ++MODULE_LICENSE("GPL"); +diff -urN -x CVS linux-2.6.21/include/asm-arm/arch-at91/at91_adc.h linux-2.6-stable/include/asm-arm/arch-at91/at91_adc.h +--- linux-2.6.21/include/asm-arm/arch-at91/at91_adc.h Thu Jan 1 02:00:00 1970 ++++ linux-2.6-stable/include/asm-arm/arch-at91/at91_adc.h Tue May 8 12:13:31 2007 +@@ -0,0 +1,61 @@ +/* - * Internal Memory. - */ - #define AT91RM9200_ROM_BASE 0x00100000 /* Internal ROM base address */ -diff -urN -x CVS linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91rm9200_mc.h linux-2.6.19/include/asm-arm/arch-at91rm9200/at91rm9200_mc.h ---- linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91rm9200_mc.h Thu Jan 1 02:00:00 1970 -+++ linux-2.6.19/include/asm-arm/arch-at91rm9200/at91rm9200_mc.h Thu Nov 2 16:54:12 2006 -@@ -0,0 +1,160 @@ -+/* -+ * include/asm-arm/arch-at91rm9200/at91rm9200_mc.h ++ * include/asm-arm/arch-at91/at91_adc.h + * -+ * Copyright (C) 2005 Ivan Kokshaysky + * Copyright (C) SAN People + * -+ * Memory Controllers (MC, EBI, SMC, SDRAMC, BFC) - System peripherals registers. -+ * Based on AT91RM9200 datasheet revision E. ++ * Analog-to-Digital Converter (ADC) registers. ++ * Based on AT91SAM9260 datasheet revision D. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by @@ -16531,1305 +8906,593 @@ diff -urN -x CVS linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91rm9200_m + * (at your option) any later version. + */ + -+#ifndef AT91RM9200_MC_H -+#define AT91RM9200_MC_H -+ -+/* Memory Controller */ -+#define AT91_MC_RCR (AT91_MC + 0x00) /* MC Remap Control Register */ -+#define AT91_MC_RCB (1 << 0) /* Remap Command Bit */ -+ -+#define AT91_MC_ASR (AT91_MC + 0x04) /* MC Abort Status Register */ -+#define AT91_MC_UNADD (1 << 0) /* Undefined Address Abort Status */ -+#define AT91_MC_MISADD (1 << 1) /* Misaligned Address Abort Status */ -+#define AT91_MC_ABTSZ (3 << 8) /* Abort Size Status */ -+#define AT91_MC_ABTSZ_BYTE (0 << 8) -+#define AT91_MC_ABTSZ_HALFWORD (1 << 8) -+#define AT91_MC_ABTSZ_WORD (2 << 8) -+#define AT91_MC_ABTTYP (3 << 10) /* Abort Type Status */ -+#define AT91_MC_ABTTYP_DATAREAD (0 << 10) -+#define AT91_MC_ABTTYP_DATAWRITE (1 << 10) -+#define AT91_MC_ABTTYP_FETCH (2 << 10) -+#define AT91_MC_MST0 (1 << 16) /* ARM920T Abort Source */ -+#define AT91_MC_MST1 (1 << 17) /* PDC Abort Source */ -+#define AT91_MC_MST2 (1 << 18) /* UHP Abort Source */ -+#define AT91_MC_MST3 (1 << 19) /* EMAC Abort Source */ -+#define AT91_MC_SVMST0 (1 << 24) /* Saved ARM920T Abort Source */ -+#define AT91_MC_SVMST1 (1 << 25) /* Saved PDC Abort Source */ -+#define AT91_MC_SVMST2 (1 << 26) /* Saved UHP Abort Source */ -+#define AT91_MC_SVMST3 (1 << 27) /* Saved EMAC Abort Source */ -+ -+#define AT91_MC_AASR (AT91_MC + 0x08) /* MC Abort Address Status Register */ -+ -+#define AT91_MC_MPR (AT91_MC + 0x0c) /* MC Master Priority Register */ -+#define AT91_MPR_MSTP0 (7 << 0) /* ARM920T Priority */ -+#define AT91_MPR_MSTP1 (7 << 4) /* PDC Priority */ -+#define AT91_MPR_MSTP2 (7 << 8) /* UHP Priority */ -+#define AT91_MPR_MSTP3 (7 << 12) /* EMAC Priority */ -+ -+/* External Bus Interface (EBI) registers */ -+#define AT91_EBI_CSA (AT91_MC + 0x60) /* Chip Select Assignment Register */ -+#define AT91_EBI_CS0A (1 << 0) /* Chip Select 0 Assignment */ -+#define AT91_EBI_CS0A_SMC (0 << 0) -+#define AT91_EBI_CS0A_BFC (1 << 0) -+#define AT91_EBI_CS1A (1 << 1) /* Chip Select 1 Assignment */ -+#define AT91_EBI_CS1A_SMC (0 << 1) -+#define AT91_EBI_CS1A_SDRAMC (1 << 1) -+#define AT91_EBI_CS3A (1 << 3) /* Chip Select 2 Assignment */ -+#define AT91_EBI_CS3A_SMC (0 << 3) -+#define AT91_EBI_CS3A_SMC_SMARTMEDIA (1 << 3) -+#define AT91_EBI_CS4A (1 << 4) /* Chip Select 3 Assignment */ -+#define AT91_EBI_CS4A_SMC (0 << 4) -+#define AT91_EBI_CS4A_SMC_COMPACTFLASH (1 << 4) -+#define AT91_EBI_CFGR (AT91_MC + 0x64) /* Configuration Register */ -+#define AT91_EBI_DBPUC (1 << 0) /* Data Bus Pull-Up Configuration */ -+ -+/* Static Memory Controller (SMC) registers */ -+#define AT91_SMC_CSR(n) (AT91_MC + 0x70 + ((n) * 4))/* SMC Chip Select Register */ -+#define AT91_SMC_NWS (0x7f << 0) /* Number of Wait States */ -+#define AT91_SMC_NWS_(x) ((x) << 0) -+#define AT91_SMC_WSEN (1 << 7) /* Wait State Enable */ -+#define AT91_SMC_TDF (0xf << 8) /* Data Float Time */ -+#define AT91_SMC_TDF_(x) ((x) << 8) -+#define AT91_SMC_BAT (1 << 12) /* Byte Access Type */ -+#define AT91_SMC_DBW (3 << 13) /* Data Bus Width */ -+#define AT91_SMC_DBW_16 (1 << 13) -+#define AT91_SMC_DBW_8 (2 << 13) -+#define AT91_SMC_DPR (1 << 15) /* Data Read Protocol */ -+#define AT91_SMC_ACSS (3 << 16) /* Address to Chip Select Setup */ -+#define AT91_SMC_ACSS_STD (0 << 16) -+#define AT91_SMC_ACSS_1 (1 << 16) -+#define AT91_SMC_ACSS_2 (2 << 16) -+#define AT91_SMC_ACSS_3 (3 << 16) -+#define AT91_SMC_RWSETUP (7 << 24) /* Read & Write Signal Time Setup */ -+#define AT91_SMC_RWSETUP_(x) ((x) << 24) -+#define AT91_SMC_RWHOLD (7 << 28) /* Read & Write Signal Hold Time */ -+#define AT91_SMC_RWHOLD_(x) ((x) << 28) -+ -+/* SDRAM Controller registers */ -+#define AT91_SDRAMC_MR (AT91_MC + 0x90) /* Mode Register */ -+#define AT91_SDRAMC_MODE (0xf << 0) /* Command Mode */ -+#define AT91_SDRAMC_MODE_NORMAL (0 << 0) -+#define AT91_SDRAMC_MODE_NOP (1 << 0) -+#define AT91_SDRAMC_MODE_PRECHARGE (2 << 0) -+#define AT91_SDRAMC_MODE_LMR (3 << 0) -+#define AT91_SDRAMC_MODE_REFRESH (4 << 0) -+#define AT91_SDRAMC_DBW (1 << 4) /* Data Bus Width */ -+#define AT91_SDRAMC_DBW_32 (0 << 4) -+#define AT91_SDRAMC_DBW_16 (1 << 4) -+ -+#define AT91_SDRAMC_TR (AT91_MC + 0x94) /* Refresh Timer Register */ -+#define AT91_SDRAMC_COUNT (0xfff << 0) /* Refresh Timer Count */ -+ -+#define AT91_SDRAMC_CR (AT91_MC + 0x98) /* Configuration Register */ -+#define AT91_SDRAMC_NC (3 << 0) /* Number of Column Bits */ -+#define AT91_SDRAMC_NC_8 (0 << 0) -+#define AT91_SDRAMC_NC_9 (1 << 0) -+#define AT91_SDRAMC_NC_10 (2 << 0) -+#define AT91_SDRAMC_NC_11 (3 << 0) -+#define AT91_SDRAMC_NR (3 << 2) /* Number of Row Bits */ -+#define AT91_SDRAMC_NR_11 (0 << 2) -+#define AT91_SDRAMC_NR_12 (1 << 2) -+#define AT91_SDRAMC_NR_13 (2 << 2) -+#define AT91_SDRAMC_NB (1 << 4) /* Number of Banks */ -+#define AT91_SDRAMC_NB_2 (0 << 4) -+#define AT91_SDRAMC_NB_4 (1 << 4) -+#define AT91_SDRAMC_CAS (3 << 5) /* CAS Latency */ -+#define AT91_SDRAMC_CAS_2 (2 << 5) -+#define AT91_SDRAMC_TWR (0xf << 7) /* Write Recovery Delay */ -+#define AT91_SDRAMC_TRC (0xf << 11) /* Row Cycle Delay */ -+#define AT91_SDRAMC_TRP (0xf << 15) /* Row Precharge Delay */ -+#define AT91_SDRAMC_TRCD (0xf << 19) /* Row to Column Delay */ -+#define AT91_SDRAMC_TRAS (0xf << 23) /* Active to Precharge Delay */ -+#define AT91_SDRAMC_TXSR (0xf << 27) /* Exit Self Refresh to Active Delay */ -+ -+#define AT91_SDRAMC_SRR (AT91_MC + 0x9c) /* Self Refresh Register */ -+#define AT91_SDRAMC_LPR (AT91_MC + 0xa0) /* Low Power Register */ -+#define AT91_SDRAMC_IER (AT91_MC + 0xa4) /* Interrupt Enable Register */ -+#define AT91_SDRAMC_IDR (AT91_MC + 0xa8) /* Interrupt Disable Register */ -+#define AT91_SDRAMC_IMR (AT91_MC + 0xac) /* Interrupt Mask Register */ -+#define AT91_SDRAMC_ISR (AT91_MC + 0xb0) /* Interrupt Status Register */ -+ -+/* Burst Flash Controller register */ -+#define AT91_BFC_MR (AT91_MC + 0xc0) /* Mode Register */ -+#define AT91_BFC_BFCOM (3 << 0) /* Burst Flash Controller Operating Mode */ -+#define AT91_BFC_BFCOM_DISABLED (0 << 0) -+#define AT91_BFC_BFCOM_ASYNC (1 << 0) -+#define AT91_BFC_BFCOM_BURST (2 << 0) -+#define AT91_BFC_BFCC (3 << 2) /* Burst Flash Controller Clock */ -+#define AT91_BFC_BFCC_MCK (1 << 2) -+#define AT91_BFC_BFCC_DIV2 (2 << 2) -+#define AT91_BFC_BFCC_DIV4 (3 << 2) -+#define AT91_BFC_AVL (0xf << 4) /* Address Valid Latency */ -+#define AT91_BFC_PAGES (7 << 8) /* Page Size */ -+#define AT91_BFC_PAGES_NO_PAGE (0 << 8) -+#define AT91_BFC_PAGES_16 (1 << 8) -+#define AT91_BFC_PAGES_32 (2 << 8) -+#define AT91_BFC_PAGES_64 (3 << 8) -+#define AT91_BFC_PAGES_128 (4 << 8) -+#define AT91_BFC_PAGES_256 (5 << 8) -+#define AT91_BFC_PAGES_512 (6 << 8) -+#define AT91_BFC_PAGES_1024 (7 << 8) -+#define AT91_BFC_OEL (3 << 12) /* Output Enable Latency */ -+#define AT91_BFC_BAAEN (1 << 16) /* Burst Address Advance Enable */ -+#define AT91_BFC_BFOEH (1 << 17) /* Burst Flash Output Enable Handling */ -+#define AT91_BFC_MUXEN (1 << 18) /* Multiplexed Bus Enable */ -+#define AT91_BFC_RDYEN (1 << 19) /* Ready Enable Mode */ ++#ifndef AT91_ADC_H ++#define AT91_ADC_H ++ ++#define AT91_ADC_CR 0x00 /* Control Register */ ++#define AT91_ADC_SWRST (1 << 0) /* Software Reset */ ++#define AT91_ADC_START (1 << 1) /* Start Conversion */ ++ ++#define AT91_ADC_MR 0x04 /* Mode Register */ ++#define AT91_ADC_TRGEN (1 << 0) /* Trigger Enable */ ++#define AT91_ADC_TRGSEL (7 << 1) /* Trigger Selection */ ++#define AT91_ADC_TRGSEL_TC0 (0 << 1) ++#define AT91_ADC_TRGSEL_TC1 (1 << 1) ++#define AT91_ADC_TRGSEL_TC2 (2 << 1) ++#define AT91_ADC_TRGSEL_EXTERNAL (6 << 1) ++#define AT91_ADC_LOWRES (1 << 4) /* Low Resolution */ ++#define AT91_ADC_SLEEP (1 << 5) /* Sleep Mode */ ++#define AT91_ADC_PRESCAL (0x3f << 8) /* Prescalar Rate Selection */ ++#define AT91_ADC_PRESCAL_(x) ((x) << 8) ++#define AT91_ADC_STARTUP (0x1f << 16) /* Startup Up Time */ ++#define AT91_ADC_STARTUP_(x) ((x) << 16) ++#define AT91_ADC_SHTIM (0xf << 24) /* Sample & Hold Time */ ++#define AT91_ADC_SHTIM_(x) ((x) << 24) ++ ++#define AT91_ADC_CHER 0x10 /* Channel Enable Register */ ++#define AT91_ADC_CHDR 0x14 /* Channel Disable Register */ ++#define AT91_ADC_CHSR 0x18 /* Channel Status Register */ ++#define AT91_ADC_CH(n) (1 << (n)) /* Channel Number */ ++ ++#define AT91_ADC_SR 0x1C /* Status Register */ ++#define AT91_ADC_EOC(n) (1 << (n)) /* End of Conversion on Channel N */ ++#define AT91_ADC_OVRE(n) (1 << ((n) + 8))/* Overrun Error on Channel N */ ++#define AT91_ADC_DRDY (1 << 16) /* Data Ready */ ++#define AT91_ADC_GOVRE (1 << 17) /* General Overrun Error */ ++#define AT91_ADC_ENDRX (1 << 18) /* End of RX Buffer */ ++#define AT91_ADC_RXFUFF (1 << 19) /* RX Buffer Full */ ++ ++#define AT91_ADC_LCDR 0x20 /* Last Converted Data Register */ ++#define AT91_ADC_LDATA (0x3ff) ++ ++#define AT91_ADC_IER 0x24 /* Interrupt Enable Register */ ++#define AT91_ADC_IDR 0x28 /* Interrupt Disable Register */ ++#define AT91_ADC_IMR 0x2C /* Interrupt Mask Register */ ++ ++#define AT91_ADC_CHR(n) (0x30 + ((n) * 4) /* Channel Data Register N */ ++#define AT91_ADC_DATA (0x3ff) + +#endif -diff -urN -x CVS linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91rm9200_mci.h linux-2.6.19/include/asm-arm/arch-at91rm9200/at91rm9200_mci.h ---- linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91rm9200_mci.h Mon Dec 4 16:29:13 2006 -+++ linux-2.6.19/include/asm-arm/arch-at91rm9200/at91rm9200_mci.h Thu Jan 1 02:00:00 1970 -@@ -1,104 +0,0 @@ --/* -- * include/asm-arm/arch-at91rm9200/at91rm9200_mci.h -- * -- * Copyright (C) 2005 Ivan Kokshaysky -- * Copyright (C) SAN People -- * -- * MultiMedia Card Interface (MCI) registers. -- * Based on AT91RM9200 datasheet revision E. -- * -- * This program is free software; you can redistribute it and/or modify -- * it under the terms of the GNU General Public License as published by -- * the Free Software Foundation; either version 2 of the License, or -- * (at your option) any later version. -- */ -- --#ifndef AT91RM9200_MCI_H --#define AT91RM9200_MCI_H -- --#define AT91_MCI_CR 0x00 /* Control Register */ --#define AT91_MCI_MCIEN (1 << 0) /* Multi-Media Interface Enable */ --#define AT91_MCI_MCIDIS (1 << 1) /* Multi-Media Interface Disable */ --#define AT91_MCI_PWSEN (1 << 2) /* Power Save Mode Enable */ --#define AT91_MCI_PWSDIS (1 << 3) /* Power Save Mode Disable */ --#define AT91_MCI_SWRST (1 << 7) /* Software Reset */ -- --#define AT91_MCI_MR 0x04 /* Mode Register */ --#define AT91_MCI_CLKDIV (0xff << 0) /* Clock Divider */ --#define AT91_MCI_PWSDIV (3 << 8) /* Power Saving Divider */ --#define AT91_MCI_PDCPADV (1 << 14) /* PDC Padding Value */ --#define AT91_MCI_PDCMODE (1 << 15) /* PDC-orientated Mode */ --#define AT91_MCI_BLKLEN (0xfff << 18) /* Data Block Length */ -- --#define AT91_MCI_DTOR 0x08 /* Data Timeout Register */ --#define AT91_MCI_DTOCYC (0xf << 0) /* Data Timeout Cycle Number */ --#define AT91_MCI_DTOMUL (7 << 4) /* Data Timeout Multiplier */ --#define AT91_MCI_DTOMUL_1 (0 << 4) --#define AT91_MCI_DTOMUL_16 (1 << 4) --#define AT91_MCI_DTOMUL_128 (2 << 4) --#define AT91_MCI_DTOMUL_256 (3 << 4) --#define AT91_MCI_DTOMUL_1K (4 << 4) --#define AT91_MCI_DTOMUL_4K (5 << 4) --#define AT91_MCI_DTOMUL_64K (6 << 4) --#define AT91_MCI_DTOMUL_1M (7 << 4) -- --#define AT91_MCI_SDCR 0x0c /* SD Card Register */ --#define AT91_MCI_SDCSEL (0xf << 0) /* SD Card Selector */ --#define AT91_MCI_SDCBUS (1 << 7) /* 1-bit or 4-bit bus */ -- --#define AT91_MCI_ARGR 0x10 /* Argument Register */ -- --#define AT91_MCI_CMDR 0x14 /* Command Register */ --#define AT91_MCI_CMDNB (0x3f << 0) /* Command Number */ --#define AT91_MCI_RSPTYP (3 << 6) /* Response Type */ --#define AT91_MCI_RSPTYP_NONE (0 << 6) --#define AT91_MCI_RSPTYP_48 (1 << 6) --#define AT91_MCI_RSPTYP_136 (2 << 6) --#define AT91_MCI_SPCMD (7 << 8) /* Special Command */ --#define AT91_MCI_SPCMD_NONE (0 << 8) --#define AT91_MCI_SPCMD_INIT (1 << 8) --#define AT91_MCI_SPCMD_SYNC (2 << 8) --#define AT91_MCI_SPCMD_ICMD (4 << 8) --#define AT91_MCI_SPCMD_IRESP (5 << 8) --#define AT91_MCI_OPDCMD (1 << 11) /* Open Drain Command */ --#define AT91_MCI_MAXLAT (1 << 12) /* Max Latency for Command to Response */ --#define AT91_MCI_TRCMD (3 << 16) /* Transfer Command */ --#define AT91_MCI_TRCMD_NONE (0 << 16) --#define AT91_MCI_TRCMD_START (1 << 16) --#define AT91_MCI_TRCMD_STOP (2 << 16) --#define AT91_MCI_TRDIR (1 << 18) /* Transfer Direction */ --#define AT91_MCI_TRTYP (3 << 19) /* Transfer Type */ --#define AT91_MCI_TRTYP_BLOCK (0 << 19) --#define AT91_MCI_TRTYP_MULTIPLE (1 << 19) --#define AT91_MCI_TRTYP_STREAM (2 << 19) -- --#define AT91_MCI_RSPR(n) (0x20 + ((n) * 4)) /* Response Registers 0-3 */ --#define AT91_MCR_RDR 0x30 /* Receive Data Register */ --#define AT91_MCR_TDR 0x34 /* Transmit Data Register */ -- --#define AT91_MCI_SR 0x40 /* Status Register */ --#define AT91_MCI_CMDRDY (1 << 0) /* Command Ready */ --#define AT91_MCI_RXRDY (1 << 1) /* Receiver Ready */ --#define AT91_MCI_TXRDY (1 << 2) /* Transmit Ready */ --#define AT91_MCI_BLKE (1 << 3) /* Data Block Ended */ --#define AT91_MCI_DTIP (1 << 4) /* Data Transfer in Progress */ --#define AT91_MCI_NOTBUSY (1 << 5) /* Data Not Busy */ --#define AT91_MCI_ENDRX (1 << 6) /* End of RX Buffer */ --#define AT91_MCI_ENDTX (1 << 7) /* End fo TX Buffer */ --#define AT91_MCI_RXBUFF (1 << 14) /* RX Buffer Full */ --#define AT91_MCI_TXBUFE (1 << 15) /* TX Buffer Empty */ --#define AT91_MCI_RINDE (1 << 16) /* Response Index Error */ --#define AT91_MCI_RDIRE (1 << 17) /* Response Direction Error */ --#define AT91_MCI_RCRCE (1 << 18) /* Response CRC Error */ --#define AT91_MCI_RENDE (1 << 19) /* Response End Bit Error */ --#define AT91_MCI_RTOE (1 << 20) /* Reponse Time-out Error */ --#define AT91_MCI_DCRCE (1 << 21) /* Data CRC Error */ --#define AT91_MCI_DTOE (1 << 22) /* Data Time-out Error */ --#define AT91_MCI_OVRE (1 << 30) /* Overrun */ --#define AT91_MCI_UNRE (1 << 31) /* Underrun */ -- --#define AT91_MCI_IER 0x44 /* Interrupt Enable Register */ --#define AT91_MCI_IDR 0x48 /* Interrupt Disable Register */ --#define AT91_MCI_IMR 0x4c /* Interrupt Mask Register */ -- --#endif -diff -urN -x CVS linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91rm9200_pdc.h linux-2.6.19/include/asm-arm/arch-at91rm9200/at91rm9200_pdc.h ---- linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91rm9200_pdc.h Tue May 30 11:42:13 2006 -+++ linux-2.6.19/include/asm-arm/arch-at91rm9200/at91rm9200_pdc.h Thu Jan 1 02:00:00 1970 -@@ -1,36 +0,0 @@ +diff -urN -x CVS linux-2.6.21/include/asm-arm/arch-at91/at91_mci.h linux-2.6-stable/include/asm-arm/arch-at91/at91_mci.h +--- linux-2.6.21/include/asm-arm/arch-at91/at91_mci.h Thu Apr 26 05:08:32 2007 ++++ linux-2.6-stable/include/asm-arm/arch-at91/at91_mci.h Tue May 8 12:13:31 2007 +@@ -26,6 +26,9 @@ + #define AT91_MCI_MR 0x04 /* Mode Register */ + #define AT91_MCI_CLKDIV (0xff << 0) /* Clock Divider */ + #define AT91_MCI_PWSDIV (7 << 8) /* Power Saving Divider */ ++#define AT91_MCI_RDPROOF (1 << 11) /* Read Proof Enable [SAM926[03] only] */ ++#define AT91_MCI_WRPROOF (1 << 12) /* Write Proof Enable [SAM926[03] only] */ ++#define AT91_MCI_PDCFBYTE (1 << 13) /* PDC Force Byte Transfer [SAM926[03] only] */ + #define AT91_MCI_PDCPADV (1 << 14) /* PDC Padding Value */ + #define AT91_MCI_PDCMODE (1 << 15) /* PDC-orientated Mode */ + #define AT91_MCI_BLKLEN (0xfff << 18) /* Data Block Length */ +diff -urN -x CVS linux-2.6.21/include/asm-arm/arch-at91/at91_pmc.h linux-2.6-stable/include/asm-arm/arch-at91/at91_pmc.h +--- linux-2.6.21/include/asm-arm/arch-at91/at91_pmc.h Thu Apr 26 05:08:32 2007 ++++ linux-2.6-stable/include/asm-arm/arch-at91/at91_pmc.h Fri May 11 16:45:00 2007 +@@ -37,7 +37,9 @@ + #define AT91_PMC_PCDR (AT91_PMC + 0x14) /* Peripheral Clock Disable Register */ + #define AT91_PMC_PCSR (AT91_PMC + 0x18) /* Peripheral Clock Status Register */ + +-#define AT91_CKGR_MOR (AT91_PMC + 0x20) /* Main Oscillator Register */ ++#define AT91_CKGR_UCKR (AT91_PMC + 0x1C) /* UTMI Clock Register [SAM9RL only] */ ++ ++#define AT91_CKGR_MOR (AT91_PMC + 0x20) /* Main Oscillator Register [not on SAM9RL] */ + #define AT91_PMC_MOSCEN (1 << 0) /* Main Oscillator Enable */ + #define AT91_PMC_OSCBYPASS (1 << 1) /* Oscillator Bypass [AT91SAM926x only] */ + #define AT91_PMC_OSCOUNT (0xff << 8) /* Main Oscillator Start-up Time */ +diff -urN -x CVS linux-2.6.21/include/asm-arm/arch-at91/at91rm9200.h linux-2.6-stable/include/asm-arm/arch-at91/at91rm9200.h +--- linux-2.6.21/include/asm-arm/arch-at91/at91rm9200.h Thu Apr 26 05:08:32 2007 ++++ linux-2.6-stable/include/asm-arm/arch-at91/at91rm9200.h Tue May 8 12:56:33 2007 +@@ -107,185 +107,4 @@ + #define AT91RM9200_UHP_BASE 0x00300000 /* USB Host controller */ + + +-#if 0 -/* -- * include/asm-arm/arch-at91rm9200/at91rm9200_pdc.h -- * -- * Copyright (C) 2005 Ivan Kokshaysky -- * Copyright (C) SAN People -- * -- * Peripheral Data Controller (PDC) registers. -- * Based on AT91RM9200 datasheet revision E. -- * -- * This program is free software; you can redistribute it and/or modify -- * it under the terms of the GNU General Public License as published by -- * the Free Software Foundation; either version 2 of the License, or -- * (at your option) any later version. +- * PIO pin definitions (peripheral A/B multiplexing). - */ -- --#ifndef AT91RM9200_PDC_H --#define AT91RM9200_PDC_H -- --#define AT91_PDC_RPR 0x100 /* Receive Pointer Register */ --#define AT91_PDC_RCR 0x104 /* Receive Counter Register */ --#define AT91_PDC_TPR 0x108 /* Transmit Pointer Register */ --#define AT91_PDC_TCR 0x10c /* Transmit Counter Register */ --#define AT91_PDC_RNPR 0x110 /* Receive Next Pointer Register */ --#define AT91_PDC_RNCR 0x114 /* Receive Next Counter Register */ --#define AT91_PDC_TNPR 0x118 /* Transmit Next Pointer Register */ --#define AT91_PDC_TNCR 0x11c /* Transmit Next Counter Register */ -- --#define AT91_PDC_PTCR 0x120 /* Transfer Control Register */ --#define AT91_PDC_RXTEN (1 << 0) /* Receiver Transfer Enable */ --#define AT91_PDC_RXTDIS (1 << 1) /* Receiver Transfer Disable */ --#define AT91_PDC_TXTEN (1 << 8) /* Transmitter Transfer Enable */ --#define AT91_PDC_TXTDIS (1 << 9) /* Transmitter Transfer Disable */ -- --#define AT91_PDC_PTSR 0x124 /* Transfer Status Register */ -- +-#define AT91_PA0_MISO (1 << 0) /* A: SPI Master-In Slave-Out */ +-#define AT91_PA0_PCK3 (1 << 0) /* B: PMC Programmable Clock Output 3 */ +-#define AT91_PA1_MOSI (1 << 1) /* A: SPI Master-Out Slave-In */ +-#define AT91_PA1_PCK0 (1 << 1) /* B: PMC Programmable Clock Output 0 */ +-#define AT91_PA2_SPCK (1 << 2) /* A: SPI Serial Clock */ +-#define AT91_PA2_IRQ4 (1 << 2) /* B: External Interrupt 4 */ +-#define AT91_PA3_NPCS0 (1 << 3) /* A: SPI Peripheral Chip Select 0 */ +-#define AT91_PA3_IRQ5 (1 << 3) /* B: External Interrupt 5 */ +-#define AT91_PA4_NPCS1 (1 << 4) /* A: SPI Peripheral Chip Select 1 */ +-#define AT91_PA4_PCK1 (1 << 4) /* B: PMC Programmable Clock Output 1 */ +-#define AT91_PA5_NPCS2 (1 << 5) /* A: SPI Peripheral Chip Select 2 */ +-#define AT91_PA5_TXD3 (1 << 5) /* B: USART Transmit Data 3 */ +-#define AT91_PA6_NPCS3 (1 << 6) /* A: SPI Peripheral Chip Select 3 */ +-#define AT91_PA6_RXD3 (1 << 6) /* B: USART Receive Data 3 */ +-#define AT91_PA7_ETXCK_EREFCK (1 << 7) /* A: Ethernet Reference Clock / Transmit Clock */ +-#define AT91_PA7_PCK2 (1 << 7) /* B: PMC Programmable Clock Output 2 */ +-#define AT91_PA8_ETXEN (1 << 8) /* A: Ethernet Transmit Enable */ +-#define AT91_PA8_MCCDB (1 << 8) /* B: MMC Multimedia Card B Command */ +-#define AT91_PA9_ETX0 (1 << 9) /* A: Ethernet Transmit Data 0 */ +-#define AT91_PA9_MCDB0 (1 << 9) /* B: MMC Multimedia Card B Data 0 */ +-#define AT91_PA10_ETX1 (1 << 10) /* A: Ethernet Transmit Data 1 */ +-#define AT91_PA10_MCDB1 (1 << 10) /* B: MMC Multimedia Card B Data 1 */ +-#define AT91_PA11_ECRS_ECRSDV (1 << 11) /* A: Ethernet Carrier Sense / Data Valid */ +-#define AT91_PA11_MCDB2 (1 << 11) /* B: MMC Multimedia Card B Data 2 */ +-#define AT91_PA12_ERX0 (1 << 12) /* A: Ethernet Receive Data 0 */ +-#define AT91_PA12_MCDB3 (1 << 12) /* B: MMC Multimedia Card B Data 3 */ +-#define AT91_PA13_ERX1 (1 << 13) /* A: Ethernet Receive Data 1 */ +-#define AT91_PA13_TCLK0 (1 << 13) /* B: TC External Clock Input 0 */ +-#define AT91_PA14_ERXER (1 << 14) /* A: Ethernet Receive Error */ +-#define AT91_PA14_TCLK1 (1 << 14) /* B: TC External Clock Input 1 */ +-#define AT91_PA15_EMDC (1 << 15) /* A: Ethernet Management Data Clock */ +-#define AT91_PA15_TCLK2 (1 << 15) /* B: TC External Clock Input 2 */ +-#define AT91_PA16_EMDIO (1 << 16) /* A: Ethernet Management Data I/O */ +-#define AT91_PA16_IRQ6 (1 << 16) /* B: External Interrupt 6 */ +-#define AT91_PA17_TXD0 (1 << 17) /* A: USART Transmit Data 0 */ +-#define AT91_PA17_TIOA0 (1 << 17) /* B: TC I/O Line A 0 */ +-#define AT91_PA18_RXD0 (1 << 18) /* A: USART Receive Data 0 */ +-#define AT91_PA18_TIOB0 (1 << 18) /* B: TC I/O Line B 0 */ +-#define AT91_PA19_SCK0 (1 << 19) /* A: USART Serial Clock 0 */ +-#define AT91_PA19_TIOA1 (1 << 19) /* B: TC I/O Line A 1 */ +-#define AT91_PA20_CTS0 (1 << 20) /* A: USART Clear To Send 0 */ +-#define AT91_PA20_TIOB1 (1 << 20) /* B: TC I/O Line B 1 */ +-#define AT91_PA21_RTS0 (1 << 21) /* A: USART Ready To Send 0 */ +-#define AT91_PA21_TIOA2 (1 << 21) /* B: TC I/O Line A 2 */ +-#define AT91_PA22_RXD2 (1 << 22) /* A: USART Receive Data 2 */ +-#define AT91_PA22_TIOB2 (1 << 22) /* B: TC I/O Line B 2 */ +-#define AT91_PA23_TXD2 (1 << 23) /* A: USART Transmit Data 2 */ +-#define AT91_PA23_IRQ3 (1 << 23) /* B: External Interrupt 3 */ +-#define AT91_PA24_SCK2 (1 << 24) /* A: USART Serial Clock 2 */ +-#define AT91_PA24_PCK1 (1 << 24) /* B: PMC Programmable Clock Output 1 */ +-#define AT91_PA25_TWD (1 << 25) /* A: TWI Two-wire Serial Data */ +-#define AT91_PA25_IRQ2 (1 << 25) /* B: External Interrupt 2 */ +-#define AT91_PA26_TWCK (1 << 26) /* A: TWI Two-wire Serial Clock */ +-#define AT91_PA26_IRQ1 (1 << 26) /* B: External Interrupt 1 */ +-#define AT91_PA27_MCCK (1 << 27) /* A: MMC Multimedia Card Clock */ +-#define AT91_PA27_TCLK3 (1 << 27) /* B: TC External Clock Input 3 */ +-#define AT91_PA28_MCCDA (1 << 28) /* A: MMC Multimedia Card A Command */ +-#define AT91_PA28_TCLK4 (1 << 28) /* B: TC External Clock Input 4 */ +-#define AT91_PA29_MCDA0 (1 << 29) /* A: MMC Multimedia Card A Data 0 */ +-#define AT91_PA29_TCLK5 (1 << 29) /* B: TC External Clock Input 5 */ +-#define AT91_PA30_DRXD (1 << 30) /* A: DBGU Receive Data */ +-#define AT91_PA30_CTS2 (1 << 30) /* B: USART Clear To Send 2 */ +-#define AT91_PA31_DTXD (1 << 31) /* A: DBGU Transmit Data */ +-#define AT91_PA31_RTS2 (1 << 31) /* B: USART Ready To Send 2 */ +- +-#define AT91_PB0_TF0 (1 << 0) /* A: SSC Transmit Frame Sync 0 */ +-#define AT91_PB0_RTS3 (1 << 0) /* B: USART Ready To Send 3 */ +-#define AT91_PB1_TK0 (1 << 1) /* A: SSC Transmit Clock 0 */ +-#define AT91_PB1_CTS3 (1 << 1) /* B: USART Clear To Send 3 */ +-#define AT91_PB2_TD0 (1 << 2) /* A: SSC Transmit Data 0 */ +-#define AT91_PB2_SCK3 (1 << 2) /* B: USART Serial Clock 3 */ +-#define AT91_PB3_RD0 (1 << 3) /* A: SSC Receive Data 0 */ +-#define AT91_PB3_MCDA1 (1 << 3) /* B: MMC Multimedia Card A Data 1 */ +-#define AT91_PB4_RK0 (1 << 4) /* A: SSC Receive Clock 0 */ +-#define AT91_PB4_MCDA2 (1 << 4) /* B: MMC Multimedia Card A Data 2 */ +-#define AT91_PB5_RF0 (1 << 5) /* A: SSC Receive Frame Sync 0 */ +-#define AT91_PB5_MCDA3 (1 << 5) /* B: MMC Multimedia Card A Data 3 */ +-#define AT91_PB6_TF1 (1 << 6) /* A: SSC Transmit Frame Sync 1 */ +-#define AT91_PB6_TIOA3 (1 << 6) /* B: TC I/O Line A 3 */ +-#define AT91_PB7_TK1 (1 << 7) /* A: SSC Transmit Clock 1 */ +-#define AT91_PB7_TIOB3 (1 << 7) /* B: TC I/O Line B 3 */ +-#define AT91_PB8_TD1 (1 << 8) /* A: SSC Transmit Data 1 */ +-#define AT91_PB8_TIOA4 (1 << 8) /* B: TC I/O Line A 4 */ +-#define AT91_PB9_RD1 (1 << 9) /* A: SSC Receive Data 1 */ +-#define AT91_PB9_TIOB4 (1 << 9) /* B: TC I/O Line B 4 */ +-#define AT91_PB10_RK1 (1 << 10) /* A: SSC Receive Clock 1 */ +-#define AT91_PB10_TIOA5 (1 << 10) /* B: TC I/O Line A 5 */ +-#define AT91_PB11_RF1 (1 << 11) /* A: SSC Receive Frame Sync 1 */ +-#define AT91_PB11_TIOB5 (1 << 11) /* B: TC I/O Line B 5 */ +-#define AT91_PB12_TF2 (1 << 12) /* A: SSC Transmit Frame Sync 2 */ +-#define AT91_PB12_ETX2 (1 << 12) /* B: Ethernet Transmit Data 2 */ +-#define AT91_PB13_TK2 (1 << 13) /* A: SSC Transmit Clock 3 */ +-#define AT91_PB13_ETX3 (1 << 13) /* B: Ethernet Transmit Data 3 */ +-#define AT91_PB14_TD2 (1 << 14) /* A: SSC Transmit Data 2 */ +-#define AT91_PB14_ETXER (1 << 14) /* B: Ethernet Transmit Coding Error */ +-#define AT91_PB15_RD2 (1 << 15) /* A: SSC Receive Data 2 */ +-#define AT91_PB15_ERX2 (1 << 15) /* B: Ethernet Receive Data 2 */ +-#define AT91_PB16_RK2 (1 << 16) /* A: SSC Receive Clock 2 */ +-#define AT91_PB16_ERX3 (1 << 16) /* B: Ethernet Receive Data 3 */ +-#define AT91_PB17_RF2 (1 << 17) /* A: SSC Receive Frame Sync 2 */ +-#define AT91_PB17_ERXDV (1 << 17) /* B: Ethernet Receive Data Valid */ +-#define AT91_PB18_RI1 (1 << 18) /* A: USART Ring Indicator 1 */ +-#define AT91_PB18_ECOL (1 << 18) /* B: Ethernet Collision Detected */ +-#define AT91_PB19_DTR1 (1 << 19) /* A: USART Data Terminal Ready 1 */ +-#define AT91_PB19_ERXCK (1 << 19) /* B: Ethernet Receive Clock */ +-#define AT91_PB20_TXD1 (1 << 20) /* A: USART Transmit Data 1 */ +-#define AT91_PB21_RXD1 (1 << 21) /* A: USART Receive Data 1 */ +-#define AT91_PB22_SCK1 (1 << 22) /* A: USART Serial Clock 1 */ +-#define AT91_PB23_DCD1 (1 << 23) /* A: USART Data Carrier Detect 1 */ +-#define AT91_PB24_CTS1 (1 << 24) /* A: USART Clear To Send 1 */ +-#define AT91_PB25_DSR1 (1 << 25) /* A: USART Data Set Ready 1 */ +-#define AT91_PB25_EF100 (1 << 25) /* B: Ethernet Force 100 Mbit */ +-#define AT91_PB26_RTS1 (1 << 26) /* A: USART Ready To Send 1 */ +-#define AT91_PB27_PCK0 (1 << 27) /* B: PMC Programmable Clock Output 0 */ +-#define AT91_PB28_FIQ (1 << 28) /* A: Fast Interrupt */ +-#define AT91_PB29_IRQ0 (1 << 29) /* A: External Interrupt 0 */ +- +-#define AT91_PC0_BFCK (1 << 0) /* A: Burst Flash Clock */ +-#define AT91_PC1_BFRDY_SMOE (1 << 1) /* A: Burst Flash Ready / SmartMedia Output Enable */ +-#define AT91_PC2_BFAVD (1 << 2) /* A: Burst Flash Address Valid */ +-#define AT91_PC3_BFBAA_SMWE (1 << 3) /* A: Burst Flash Address Advance / SmartMedia Write Enable */ +-#define AT91_PC4_BFOE (1 << 4) /* A: Burst Flash Output Enable */ +-#define AT91_PC5_BFWE (1 << 5) /* A: Burst Flash Write Enable */ +-#define AT91_PC6_NWAIT (1 << 6) /* A: SMC Wait Signal */ +-#define AT91_PC7_A23 (1 << 7) /* A: Address Bus 23 */ +-#define AT91_PC8_A24 (1 << 8) /* A: Address Bus 24 */ +-#define AT91_PC9_A25_CFRNW (1 << 9) /* A: Address Bus 25 / Compact Flash Read Not Write */ +-#define AT91_PC10_NCS4_CFCS (1 << 10) /* A: SMC Chip Select 4 / Compact Flash Chip Select */ +-#define AT91_PC11_NCS5_CFCE1 (1 << 11) /* A: SMC Chip Select 5 / Compact Flash Chip Enable 1 */ +-#define AT91_PC12_NCS6_CFCE2 (1 << 12) /* A: SMC Chip Select 6 / Compact Flash Chip Enable 2 */ +-#define AT91_PC13_NCS7 (1 << 13) /* A: Chip Select 7 */ +- +-#define AT91_PD0_ETX0 (1 << 0) /* A: Ethernet Transmit Data 0 */ +-#define AT91_PD1_ETX1 (1 << 1) /* A: Ethernet Transmit Data 1 */ +-#define AT91_PD2_ETX2 (1 << 2) /* A: Ethernet Transmit Data 2 */ +-#define AT91_PD3_ETX3 (1 << 3) /* A: Ethernet Transmit Data 3 */ +-#define AT91_PD4_ETXEN (1 << 4) /* A: Ethernet Transmit Enable */ +-#define AT91_PD5_ETXER (1 << 5) /* A: Ethernet Transmit Coding Error */ +-#define AT91_PD6_DTXD (1 << 6) /* A: DBGU Transmit Data */ +-#define AT91_PD7_PCK0 (1 << 7) /* A: PMC Programmable Clock Output 0 */ +-#define AT91_PD7_TSYNC (1 << 7) /* B: ETM Trace Synchronization Signal */ +-#define AT91_PD8_PCK1 (1 << 8) /* A: PMC Programmable Clock Output 1 */ +-#define AT91_PD8_TCLK (1 << 8) /* B: ETM Trace Clock */ +-#define AT91_PD9_PCK2 (1 << 9) /* A: PMC Programmable Clock Output 2 */ +-#define AT91_PD9_TPS0 (1 << 9) /* B: ETM Trace ARM Pipeline Status 0 */ +-#define AT91_PD10_PCK3 (1 << 10) /* A: PMC Programmable Clock Output 3 */ +-#define AT91_PD10_TPS1 (1 << 10) /* B: ETM Trace ARM Pipeline Status 1 */ +-#define AT91_PD11_TPS2 (1 << 11) /* B: ETM Trace ARM Pipeline Status 2 */ +-#define AT91_PD12_TPK0 (1 << 12) /* B: ETM Trace Packet Port 0 */ +-#define AT91_PD13_TPK1 (1 << 13) /* B: ETM Trace Packet Port 1 */ +-#define AT91_PD14_TPK2 (1 << 14) /* B: ETM Trace Packet Port 2 */ +-#define AT91_PD15_TD0 (1 << 15) /* A: SSC Transmit Data 0 */ +-#define AT91_PD15_TPK3 (1 << 15) /* B: ETM Trace Packet Port 3 */ +-#define AT91_PD16_TD1 (1 << 16) /* A: SSC Transmit Data 1 */ +-#define AT91_PD16_TPK4 (1 << 16) /* B: ETM Trace Packet Port 4 */ +-#define AT91_PD17_TD2 (1 << 17) /* A: SSC Transmit Data 2 */ +-#define AT91_PD17_TPK5 (1 << 17) /* B: ETM Trace Packet Port 5 */ +-#define AT91_PD18_NPCS1 (1 << 18) /* A: SPI Peripheral Chip Select 1 */ +-#define AT91_PD18_TPK6 (1 << 18) /* B: ETM Trace Packet Port 6 */ +-#define AT91_PD19_NPCS2 (1 << 19) /* A: SPI Peripheral Chip Select 2 */ +-#define AT91_PD19_TPK7 (1 << 19) /* B: ETM Trace Packet Port 7 */ +-#define AT91_PD20_NPCS3 (1 << 20) /* A: SPI Peripheral Chip Select 3 */ +-#define AT91_PD20_TPK8 (1 << 20) /* B: ETM Trace Packet Port 8 */ +-#define AT91_PD21_RTS0 (1 << 21) /* A: USART Ready To Send 0 */ +-#define AT91_PD21_TPK9 (1 << 21) /* B: ETM Trace Packet Port 9 */ +-#define AT91_PD22_RTS1 (1 << 22) /* A: USART Ready To Send 1 */ +-#define AT91_PD22_TPK10 (1 << 22) /* B: ETM Trace Packet Port 10 */ +-#define AT91_PD23_RTS2 (1 << 23) /* A: USART Ready To Send 2 */ +-#define AT91_PD23_TPK11 (1 << 23) /* B: ETM Trace Packet Port 11 */ +-#define AT91_PD24_RTS3 (1 << 24) /* A: USART Ready To Send 3 */ +-#define AT91_PD24_TPK12 (1 << 24) /* B: ETM Trace Packet Port 12 */ +-#define AT91_PD25_DTR1 (1 << 25) /* A: USART Data Terminal Ready 1 */ +-#define AT91_PD25_TPK13 (1 << 25) /* B: ETM Trace Packet Port 13 */ +-#define AT91_PD26_TPK14 (1 << 26) /* B: ETM Trace Packet Port 14 */ +-#define AT91_PD27_TPK15 (1 << 27) /* B: ETM Trace Packet Port 15 */ -#endif -diff -urN -x CVS linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91rm9200_spi.h linux-2.6.19/include/asm-arm/arch-at91rm9200/at91rm9200_spi.h ---- linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91rm9200_spi.h Mon Dec 4 16:34:19 2006 -+++ linux-2.6.19/include/asm-arm/arch-at91rm9200/at91rm9200_spi.h Thu Jan 1 02:00:00 1970 -@@ -1,81 +0,0 @@ --/* -- * include/asm-arm/arch-at91rm9200/at91rm9200_spi.h -- * -- * Copyright (C) 2005 Ivan Kokshaysky -- * Copyright (C) SAN People -- * -- * Serial Peripheral Interface (SPI) registers. -- * Based on AT91RM9200 datasheet revision E. -- * -- * This program is free software; you can redistribute it and/or modify -- * it under the terms of the GNU General Public License as published by -- * the Free Software Foundation; either version 2 of the License, or -- * (at your option) any later version. -- */ -- --#ifndef AT91RM9200_SPI_H --#define AT91RM9200_SPI_H -- --#define AT91_SPI_CR 0x00 /* Control Register */ --#define AT91_SPI_SPIEN (1 << 0) /* SPI Enable */ --#define AT91_SPI_SPIDIS (1 << 1) /* SPI Disable */ --#define AT91_SPI_SWRST (1 << 7) /* SPI Software Reset */ --#define AT91_SPI_LASTXFER (1 << 24) /* Last Transfer [SAM9261 only] */ -- --#define AT91_SPI_MR 0x04 /* Mode Register */ --#define AT91_SPI_MSTR (1 << 0) /* Master/Slave Mode */ --#define AT91_SPI_PS (1 << 1) /* Peripheral Select */ --#define AT91_SPI_PS_FIXED (0 << 1) --#define AT91_SPI_PS_VARIABLE (1 << 1) --#define AT91_SPI_PCSDEC (1 << 2) /* Chip Select Decode */ --#define AT91_SPI_DIV32 (1 << 3) /* Clock Selection */ --#define AT91_SPI_MODFDIS (1 << 4) /* Mode Fault Detection */ --#define AT91_SPI_LLB (1 << 7) /* Local Loopback Enable */ --#define AT91_SPI_PCS (0xf << 16) /* Peripheral Chip Select */ --#define AT91_SPI_DLYBCS (0xff << 24) /* Delay Between Chip Selects */ - --#define AT91_SPI_RDR 0x08 /* Receive Data Register */ --#define AT91_SPI_RD (0xffff << 0) /* Receive Data */ --#define AT91_SPI_PCS (0xf << 16) /* Peripheral Chip Select */ -- --#define AT91_SPI_TDR 0x0c /* Transmit Data Register */ --#define AT91_SPI_TD (0xffff << 0) /* Transmit Data */ --#define AT91_SPI_PCS (0xf << 16) /* Peripheral Chip Select */ --#define AT91_SPI_LASTXFER (1 << 24) /* Last Transfer [SAM9261 only] */ -- --#define AT91_SPI_SR 0x10 /* Status Register */ --#define AT91_SPI_RDRF (1 << 0) /* Receive Data Register Full */ --#define AT91_SPI_TDRE (1 << 1) /* Transmit Data Register Full */ --#define AT91_SPI_MODF (1 << 2) /* Mode Fault Error */ --#define AT91_SPI_OVRES (1 << 3) /* Overrun Error Status */ --#define AT91_SPI_ENDRX (1 << 4) /* End of RX buffer */ --#define AT91_SPI_ENDTX (1 << 5) /* End of TX buffer */ --#define AT91_SPI_RXBUFF (1 << 6) /* RX Buffer Full */ --#define AT91_SPI_TXBUFE (1 << 7) /* TX Buffer Empty */ --#define AT91_SPI_NSSR (1 << 8) /* NSS Rising [SAM9261 only] */ --#define AT91_SPI_TXEMPTY (1 << 9) /* Transmission Register Empty [SAM9261 only] */ --#define AT91_SPI_SPIENS (1 << 16) /* SPI Enable Status */ -- --#define AT91_SPI_IER 0x14 /* Interrupt Enable Register */ --#define AT91_SPI_IDR 0x18 /* Interrupt Disable Register */ --#define AT91_SPI_IMR 0x1c /* Interrupt Mask Register */ -- --#define AT91_SPI_CSR(n) (0x30 + ((n) * 4)) /* Chip Select Registers 0-3 */ --#define AT91_SPI_CPOL (1 << 0) /* Clock Polarity */ --#define AT91_SPI_NCPHA (1 << 1) /* Clock Phase */ --#define AT91_SPI_CSAAT (1 << 3) /* Chip Select Active After Transfer [SAM9261 only] */ --#define AT91_SPI_BITS (0xf << 4) /* Bits Per Transfer */ --#define AT91_SPI_BITS_8 (0 << 4) --#define AT91_SPI_BITS_9 (1 << 4) --#define AT91_SPI_BITS_10 (2 << 4) --#define AT91_SPI_BITS_11 (3 << 4) --#define AT91_SPI_BITS_12 (4 << 4) --#define AT91_SPI_BITS_13 (5 << 4) --#define AT91_SPI_BITS_14 (6 << 4) --#define AT91_SPI_BITS_15 (7 << 4) --#define AT91_SPI_BITS_16 (8 << 4) --#define AT91_SPI_SCBR (0xff << 8) /* Serial Clock Baud Rate */ --#define AT91_SPI_DLYBS (0xff << 16) /* Delay before SPCK */ --#define AT91_SPI_DLYBCT (0xff << 24) /* Delay between Consecutive Transfers */ -- --#endif -diff -urN -x CVS linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91rm9200_ssc.h linux-2.6.19/include/asm-arm/arch-at91rm9200/at91rm9200_ssc.h ---- linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91rm9200_ssc.h Mon Dec 4 16:34:19 2006 -+++ linux-2.6.19/include/asm-arm/arch-at91rm9200/at91rm9200_ssc.h Thu Jan 1 02:00:00 1970 -@@ -1,96 +0,0 @@ + #endif +diff -urN -x CVS linux-2.6.21/include/asm-arm/arch-at91/at91sam9260.h linux-2.6-stable/include/asm-arm/arch-at91/at91sam9260.h +--- linux-2.6.21/include/asm-arm/arch-at91/at91sam9260.h Thu Apr 26 05:08:32 2007 ++++ linux-2.6-stable/include/asm-arm/arch-at91/at91sam9260.h Tue May 8 12:56:33 2007 +@@ -117,13 +117,4 @@ + #define AT91SAM9XE_SRAM_BASE 0x00300000 /* Internal SRAM base address */ + + +-#if 0 -/* -- * include/asm-arm/arch-at91rm9200/at91rm9200_ssc.h -- * -- * Copyright (C) SAN People -- * -- * Serial Synchronous Controller (SSC) registers. -- * Based on AT91RM9200 datasheet revision E. -- * -- * This program is free software; you can redistribute it and/or modify -- * it under the terms of the GNU General Public License as published by -- * the Free Software Foundation; either version 2 of the License, or -- * (at your option) any later version. +- * PIO pin definitions (peripheral A/B multiplexing). - */ - --#ifndef AT91RM9200_SSC_H --#define AT91RM9200_SSC_H -- --#define AT91_SSC_CR 0x00 /* Control Register */ --#define AT91_SSC_RXEN (1 << 0) /* Receive Enable */ --#define AT91_SSC_RXDIS (1 << 1) /* Receive Disable */ --#define AT91_SSC_TXEN (1 << 8) /* Transmit Enable */ --#define AT91_SSC_TXDIS (1 << 9) /* Transmit Disable */ --#define AT91_SSC_SWRST (1 << 15) /* Software Reset */ -- --#define AT91_SSC_CMR 0x04 /* Clock Mode Register */ --#define AT91_SSC_CMR_DIV (0xfff << 0) /* Clock Divider */ -- --#define AT91_SSC_RCMR 0x10 /* Receive Clock Mode Register */ --#define AT91_SSC_CKS (3 << 0) /* Clock Selection */ --#define AT91_SSC_CKS_DIV (0 << 0) --#define AT91_SSC_CKS_CLOCK (1 << 0) --#define AT91_SSC_CKS_PIN (2 << 0) --#define AT91_SSC_CKO (7 << 2) /* Clock Output Mode Selection */ --#define AT91_SSC_CKO_NONE (0 << 2) --#define AT91_SSC_CKO_CONTINUOUS (1 << 2) --#define AT91_SSC_CKI (1 << 5) /* Clock Inversion */ --#define AT91_SSC_CKI_FALLING (0 << 5) --#define AT91_SSC_CK_RISING (1 << 5) --#define AT91_SSC_START (0xf << 8) /* Start Selection */ --#define AT91_SSC_START_CONTINUOUS (0 << 8) --#define AT91_SSC_START_TX_RX (1 << 8) --#define AT91_SSC_START_LOW_RF (2 << 8) --#define AT91_SSC_START_HIGH_RF (3 << 8) --#define AT91_SSC_START_FALLING_RF (4 << 8) --#define AT91_SSC_START_RISING_RF (5 << 8) --#define AT91_SSC_START_LEVEL_RF (6 << 8) --#define AT91_SSC_START_EDGE_RF (7 << 8) --#define AT91_SSC_STTDLY (0xff << 16) /* Start Delay */ --#define AT91_SSC_PERIOD (0xff << 24) /* Period Divider Selection */ -- --#define AT91_SSC_RFMR 0x14 /* Receive Frame Mode Register */ --#define AT91_SSC_DATALEN (0x1f << 0) /* Data Length */ --#define AT91_SSC_LOOP (1 << 5) /* Loop Mode */ --#define AT91_SSC_MSBF (1 << 7) /* Most Significant Bit First */ --#define AT91_SSC_DATNB (0xf << 8) /* Data Number per Frame */ --#define AT91_SSC_FSLEN (0xf << 16) /* Frame Sync Length */ --#define AT91_SSC_FSOS (7 << 20) /* Frame Sync Output Selection */ --#define AT91_SSC_FSOS_NONE (0 << 20) --#define AT91_SSC_FSOS_NEGATIVE (1 << 20) --#define AT91_SSC_FSOS_POSITIVE (2 << 20) --#define AT91_SSC_FSOS_LOW (3 << 20) --#define AT91_SSC_FSOS_HIGH (4 << 20) --#define AT91_SSC_FSOS_TOGGLE (5 << 20) --#define AT91_SSC_FSEDGE (1 << 24) /* Frame Sync Edge Detection */ --#define AT91_SSC_FSEDGE_POSITIVE (0 << 24) --#define AT91_SSC_FSEDGE_NEGATIVE (1 << 24) -- --#define AT91_SSC_TCMR 0x18 /* Transmit Clock Mode Register */ --#define AT91_SSC_TFMR 0x1c /* Transmit Fram Mode Register */ --#define AT91_SSC_DATDEF (1 << 5) /* Data Default Value */ --#define AT91_SSC_FSDEN (1 << 23) /* Frame Sync Data Enable */ -- --#define AT91_SSC_RHR 0x20 /* Receive Holding Register */ --#define AT91_SSC_THR 0x24 /* Transmit Holding Register */ --#define AT91_SSC_RSHR 0x30 /* Receive Sync Holding Register */ --#define AT91_SSC_TSHR 0x34 /* Transmit Sync Holding Register */ -- --#define AT91_SSC_SR 0x40 /* Status Register */ --#define AT91_SSC_TXRDY (1 << 0) /* Transmit Ready */ --#define AT91_SSC_TXEMPTY (1 << 1) /* Transmit Empty */ --#define AT91_SSC_ENDTX (1 << 2) /* End of Transmission */ --#define AT91_SSC_TXBUFE (1 << 3) /* Transmit Buffer Empty */ --#define AT91_SSC_RXRDY (1 << 4) /* Receive Ready */ --#define AT91_SSC_OVRUN (1 << 5) /* Receive Overrun */ --#define AT91_SSC_ENDRX (1 << 6) /* End of Reception */ --#define AT91_SSC_RXBUFF (1 << 7) /* Receive Buffer Full */ --#define AT91_SSC_TXSYN (1 << 10) /* Transmit Sync */ --#define AT91_SSC_RXSYN (1 << 11) /* Receive Sync */ --#define AT91_SSC_TXENA (1 << 16) /* Transmit Enable */ --#define AT91_SSC_RXENA (1 << 17) /* Receive Enable */ -- --#define AT91_SSC_IER 0x44 /* Interrupt Enable Register */ --#define AT91_SSC_IDR 0x48 /* Interrupt Disable Register */ --#define AT91_SSC_IMR 0x4c /* Interrupt Mask Register */ +-// TODO: Add - -#endif -diff -urN -x CVS linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91rm9200_sys.h linux-2.6.19/include/asm-arm/arch-at91rm9200/at91rm9200_sys.h ---- linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91rm9200_sys.h Mon Dec 4 16:41:04 2006 -+++ linux-2.6.19/include/asm-arm/arch-at91rm9200/at91rm9200_sys.h Thu Jan 1 02:00:00 1970 -@@ -1,438 +0,0 @@ --/* -- * include/asm-arm/arch-at91rm9200/at91rm9200_sys.h -- * -- * Copyright (C) 2005 Ivan Kokshaysky -- * Copyright (C) SAN People -- * -- * System peripherals registers. -- * Based on AT91RM9200 datasheet revision E. -- * -- * This program is free software; you can redistribute it and/or modify -- * it under the terms of the GNU General Public License as published by -- * the Free Software Foundation; either version 2 of the License, or -- * (at your option) any later version. -- */ -- --#ifndef AT91RM9200_SYS_H --#define AT91RM9200_SYS_H -- --/* -- * Advanced Interrupt Controller. -- */ --#define AT91_AIC 0x000 -- --#define AT91_AIC_SMR(n) (AT91_AIC + ((n) * 4)) /* Source Mode Registers 0-31 */ --#define AT91_AIC_PRIOR (7 << 0) /* Priority Level */ --#define AT91_AIC_SRCTYPE (3 << 5) /* Interrupt Source Type */ --#define AT91_AIC_SRCTYPE_LOW (0 << 5) --#define AT91_AIC_SRCTYPE_FALLING (1 << 5) --#define AT91_AIC_SRCTYPE_HIGH (2 << 5) --#define AT91_AIC_SRCTYPE_RISING (3 << 5) -- --#define AT91_AIC_SVR(n) (AT91_AIC + 0x80 + ((n) * 4)) /* Source Vector Registers 0-31 */ --#define AT91_AIC_IVR (AT91_AIC + 0x100) /* Interrupt Vector Register */ --#define AT91_AIC_FVR (AT91_AIC + 0x104) /* Fast Interrupt Vector Register */ --#define AT91_AIC_ISR (AT91_AIC + 0x108) /* Interrupt Status Register */ --#define AT91_AIC_IRQID (0x1f << 0) /* Current Interrupt Identifier */ -- --#define AT91_AIC_IPR (AT91_AIC + 0x10c) /* Interrupt Pending Register */ --#define AT91_AIC_IMR (AT91_AIC + 0x110) /* Interrupt Mask Register */ --#define AT91_AIC_CISR (AT91_AIC + 0x114) /* Core Interrupt Status Register */ --#define AT91_AIC_NFIQ (1 << 0) /* nFIQ Status */ --#define AT91_AIC_NIRQ (1 << 1) /* nIRQ Status */ -- --#define AT91_AIC_IECR (AT91_AIC + 0x120) /* Interrupt Enable Command Register */ --#define AT91_AIC_IDCR (AT91_AIC + 0x124) /* Interrupt Disable Command Register */ --#define AT91_AIC_ICCR (AT91_AIC + 0x128) /* Interrupt Clear Command Register */ --#define AT91_AIC_ISCR (AT91_AIC + 0x12c) /* Interrupt Set Command Register */ --#define AT91_AIC_EOICR (AT91_AIC + 0x130) /* End of Interrupt Command Register */ --#define AT91_AIC_SPU (AT91_AIC + 0x134) /* Spurious Interrupt Vector Register */ --#define AT91_AIC_DCR (AT91_AIC + 0x138) /* Debug Control Register */ --#define AT91_AIC_DCR_PROT (1 << 0) /* Protection Mode */ --#define AT91_AIC_DCR_GMSK (1 << 1) /* General Mask */ -- -- --/* -- * Debug Unit. -- */ --#define AT91_DBGU 0x200 -- --#define AT91_DBGU_CR (AT91_DBGU + 0x00) /* Control Register */ --#define AT91_DBGU_MR (AT91_DBGU + 0x04) /* Mode Register */ --#define AT91_DBGU_IER (AT91_DBGU + 0x08) /* Interrupt Enable Register */ --#define AT91_DBGU_TXRDY (1 << 1) /* Transmitter Ready */ --#define AT91_DBGU_TXEMPTY (1 << 9) /* Transmitter Empty */ --#define AT91_DBGU_IDR (AT91_DBGU + 0x0c) /* Interrupt Disable Register */ --#define AT91_DBGU_IMR (AT91_DBGU + 0x10) /* Interrupt Mask Register */ --#define AT91_DBGU_SR (AT91_DBGU + 0x14) /* Status Register */ --#define AT91_DBGU_RHR (AT91_DBGU + 0x18) /* Receiver Holding Register */ --#define AT91_DBGU_THR (AT91_DBGU + 0x1c) /* Transmitter Holding Register */ --#define AT91_DBGU_BRGR (AT91_DBGU + 0x20) /* Baud Rate Generator Register */ -- --#define AT91_DBGU_CIDR (AT91_DBGU + 0x40) /* Chip ID Register */ --#define AT91_DBGU_EXID (AT91_DBGU + 0x44) /* Chip ID Extension Register */ --#define AT91_CIDR_VERSION (0x1f << 0) /* Version of the Device */ --#define AT91_CIDR_EPROC (7 << 5) /* Embedded Processor */ --#define AT91_CIDR_NVPSIZ (0xf << 8) /* Nonvolatile Program Memory Size */ --#define AT91_CIDR_NVPSIZ2 (0xf << 12) /* Second Nonvolatile Program Memory Size */ --#define AT91_CIDR_SRAMSIZ (0xf << 16) /* Internal SRAM Size */ --#define AT91_CIDR_ARCH (0xff << 20) /* Architecture Identifier */ --#define AT91_CIDR_NVPTYP (7 << 28) /* Nonvolatile Program Memory Type */ --#define AT91_CIDR_EXT (1 << 31) /* Extension Flag */ -- --#define AT91_AIC_FFER (AT91_AIC + 0x140) /* Fast Forcing Enable Register [SAM9 only] */ --#define AT91_AIC_FFDR (AT91_AIC + 0x144) /* Fast Forcing Disable Register [SAM9 only] */ --#define AT91_AIC_FFSR (AT91_AIC + 0x148) /* Fast Forcing Status Register [SAM9 only] */ - + #endif +diff -urN -x CVS linux-2.6.21/include/asm-arm/arch-at91/at91sam9260_matrix.h linux-2.6-stable/include/asm-arm/arch-at91/at91sam9260_matrix.h +--- linux-2.6.21/include/asm-arm/arch-at91/at91sam9260_matrix.h Thu Apr 26 05:08:32 2007 ++++ linux-2.6-stable/include/asm-arm/arch-at91/at91sam9260_matrix.h Fri May 11 16:20:33 2007 +@@ -67,7 +67,7 @@ + #define AT91_MATRIX_CS4A (1 << 4) /* Chip Select 4 Assignment */ + #define AT91_MATRIX_CS4A_SMC (0 << 4) + #define AT91_MATRIX_CS4A_SMC_CF1 (1 << 4) +-#define AT91_MATRIX_CS5A (1 << 5 ) /* Chip Select 5 Assignment */ ++#define AT91_MATRIX_CS5A (1 << 5) /* Chip Select 5 Assignment */ + #define AT91_MATRIX_CS5A_SMC (0 << 5) + #define AT91_MATRIX_CS5A_SMC_CF2 (1 << 5) + #define AT91_MATRIX_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */ +diff -urN -x CVS linux-2.6.21/include/asm-arm/arch-at91/at91sam9261.h linux-2.6-stable/include/asm-arm/arch-at91/at91sam9261.h +--- linux-2.6.21/include/asm-arm/arch-at91/at91sam9261.h Thu Apr 26 05:08:32 2007 ++++ linux-2.6-stable/include/asm-arm/arch-at91/at91sam9261.h Tue May 8 12:56:33 2007 +@@ -98,195 +98,4 @@ + #define AT91SAM9261_LCDC_BASE 0x00600000 /* LDC controller */ + + +-#if 0 -/* -- * PIO Controllers. -- */ --#define AT91_PIOA 0x400 --#define AT91_PIOB 0x600 --#define AT91_PIOC 0x800 --#define AT91_PIOD 0xa00 -- --#define PIO_PER 0x00 /* Enable Register */ --#define PIO_PDR 0x04 /* Disable Register */ --#define PIO_PSR 0x08 /* Status Register */ --#define PIO_OER 0x10 /* Output Enable Register */ --#define PIO_ODR 0x14 /* Output Disable Register */ --#define PIO_OSR 0x18 /* Output Status Register */ --#define PIO_IFER 0x20 /* Glitch Input Filter Enable */ --#define PIO_IFDR 0x24 /* Glitch Input Filter Disable */ --#define PIO_IFSR 0x28 /* Glitch Input Filter Status */ --#define PIO_SODR 0x30 /* Set Output Data Register */ --#define PIO_CODR 0x34 /* Clear Output Data Register */ --#define PIO_ODSR 0x38 /* Output Data Status Register */ --#define PIO_PDSR 0x3c /* Pin Data Status Register */ --#define PIO_IER 0x40 /* Interrupt Enable Register */ --#define PIO_IDR 0x44 /* Interrupt Disable Register */ --#define PIO_IMR 0x48 /* Interrupt Mask Register */ --#define PIO_ISR 0x4c /* Interrupt Status Register */ --#define PIO_MDER 0x50 /* Multi-driver Enable Register */ --#define PIO_MDDR 0x54 /* Multi-driver Disable Register */ --#define PIO_MDSR 0x58 /* Multi-driver Status Register */ --#define PIO_PUDR 0x60 /* Pull-up Disable Register */ --#define PIO_PUER 0x64 /* Pull-up Enable Register */ --#define PIO_PUSR 0x68 /* Pull-up Status Register */ --#define PIO_ASR 0x70 /* Peripheral A Select Register */ --#define PIO_BSR 0x74 /* Peripheral B Select Register */ --#define PIO_ABSR 0x78 /* AB Status Register */ --#define PIO_OWER 0xa0 /* Output Write Enable Register */ --#define PIO_OWDR 0xa4 /* Output Write Disable Register */ --#define PIO_OWSR 0xa8 /* Output Write Status Register */ -- --#define AT91_PIO_P(n) (1 << (n)) -- -- --/* -- * Power Management Controller. -- */ --#define AT91_PMC 0xc00 -- --#define AT91_PMC_SCER (AT91_PMC + 0x00) /* System Clock Enable Register */ --#define AT91_PMC_SCDR (AT91_PMC + 0x04) /* System Clock Disable Register */ -- --#define AT91_PMC_SCSR (AT91_PMC + 0x08) /* System Clock Status Register */ --#define AT91_PMC_PCK (1 << 0) /* Processor Clock */ --#define AT91_PMC_UDP (1 << 1) /* USB Devcice Port Clock */ --#define AT91_PMC_MCKUDP (1 << 2) /* USB Device Port Master Clock Automatic Disable on Suspend */ --#define AT91_PMC_UHP (1 << 4) /* USB Host Port Clock */ --#define AT91_PMC_PCK0 (1 << 8) /* Programmable Clock 0 */ --#define AT91_PMC_PCK1 (1 << 9) /* Programmable Clock 1 */ --#define AT91_PMC_PCK2 (1 << 10) /* Programmable Clock 2 */ --#define AT91_PMC_PCK3 (1 << 11) /* Programmable Clock 3 */ -- --#define AT91_PMC_PCER (AT91_PMC + 0x10) /* Peripheral Clock Enable Register */ --#define AT91_PMC_PCDR (AT91_PMC + 0x14) /* Peripheral Clock Disable Register */ --#define AT91_PMC_PCSR (AT91_PMC + 0x18) /* Peripheral Clock Status Register */ -- --#define AT91_CKGR_MOR (AT91_PMC + 0x20) /* Main Oscillator Register */ --#define AT91_PMC_MOSCEN (1 << 0) /* Main Oscillator Enable */ --#define AT91_PMC_OSCOUNT (0xff << 8) /* Main Oscillator Start-up Time */ -- --#define AT91_CKGR_MCFR (AT91_PMC + 0x24) /* Main Clock Frequency Register */ --#define AT91_PMC_MAINF (0xffff << 0) /* Main Clock Frequency */ --#define AT91_PMC_MAINRDY (1 << 16) /* Main Clock Ready */ -- --#define AT91_CKGR_PLLAR (AT91_PMC + 0x28) /* PLL A Register */ --#define AT91_CKGR_PLLBR (AT91_PMC + 0x2c) /* PLL B Register */ --#define AT91_PMC_DIV (0xff << 0) /* Divider */ --#define AT91_PMC_PLLCOUNT (0x3f << 8) /* PLL Counter */ --#define AT91_PMC_OUT (3 << 14) /* PLL Clock Frequency Range */ --#define AT91_PMC_MUL (0x7ff << 16) /* PLL Multiplier */ --#define AT91_PMC_USB96M (1 << 28) /* Divider by 2 Enable (PLLB only) */ -- --#define AT91_PMC_MCKR (AT91_PMC + 0x30) /* Master Clock Register */ --#define AT91_PMC_CSS (3 << 0) /* Master Clock Selection */ --#define AT91_PMC_CSS_SLOW (0 << 0) --#define AT91_PMC_CSS_MAIN (1 << 0) --#define AT91_PMC_CSS_PLLA (2 << 0) --#define AT91_PMC_CSS_PLLB (3 << 0) --#define AT91_PMC_PRES (7 << 2) /* Master Clock Prescaler */ --#define AT91_PMC_PRES_1 (0 << 2) --#define AT91_PMC_PRES_2 (1 << 2) --#define AT91_PMC_PRES_4 (2 << 2) --#define AT91_PMC_PRES_8 (3 << 2) --#define AT91_PMC_PRES_16 (4 << 2) --#define AT91_PMC_PRES_32 (5 << 2) --#define AT91_PMC_PRES_64 (6 << 2) --#define AT91_PMC_MDIV (3 << 8) /* Master Clock Division */ --#define AT91_PMC_MDIV_1 (0 << 8) --#define AT91_PMC_MDIV_2 (1 << 8) --#define AT91_PMC_MDIV_3 (2 << 8) --#define AT91_PMC_MDIV_4 (3 << 8) -- --#define AT91_PMC_PCKR(n) (AT91_PMC + 0x40 + ((n) * 4)) /* Programmable Clock 0-3 Registers */ -- --#define AT91_PMC_IER (AT91_PMC + 0x60) /* Interrupt Enable Register */ --#define AT91_PMC_IDR (AT91_PMC + 0x64) /* Interrupt Disable Register */ --#define AT91_PMC_SR (AT91_PMC + 0x68) /* Status Register */ --#define AT91_PMC_MOSCS (1 << 0) /* MOSCS Flag */ --#define AT91_PMC_LOCKA (1 << 1) /* PLLA Lock */ --#define AT91_PMC_LOCKB (1 << 2) /* PLLB Lock */ --#define AT91_PMC_MCKRDY (1 << 3) /* Master Clock */ --#define AT91_PMC_PCK0RDY (1 << 8) /* Programmable Clock 0 */ --#define AT91_PMC_PCK1RDY (1 << 9) /* Programmable Clock 1 */ --#define AT91_PMC_PCK2RDY (1 << 10) /* Programmable Clock 2 */ --#define AT91_PMC_PCK3RDY (1 << 11) /* Programmable Clock 3 */ --#define AT91_PMC_IMR (AT91_PMC + 0x6c) /* Interrupt Mask Register */ -- -- --/* -- * System Timer. -- */ --#define AT91_ST 0xd00 -- --#define AT91_ST_CR (AT91_ST + 0x00) /* Control Register */ --#define AT91_ST_WDRST (1 << 0) /* Watchdog Timer Restart */ --#define AT91_ST_PIMR (AT91_ST + 0x04) /* Period Interval Mode Register */ --#define AT91_ST_PIV (0xffff << 0) /* Period Interval Value */ --#define AT91_ST_WDMR (AT91_ST + 0x08) /* Watchdog Mode Register */ --#define AT91_ST_WDV (0xffff << 0) /* Watchdog Counter Value */ --#define AT91_ST_RSTEN (1 << 16) /* Reset Enable */ --#define AT91_ST_EXTEN (1 << 17) /* External Signal Assertion Enable */ --#define AT91_ST_RTMR (AT91_ST + 0x0c) /* Real-time Mode Register */ --#define AT91_ST_RTPRES (0xffff << 0) /* Real-time Prescalar Value */ --#define AT91_ST_SR (AT91_ST + 0x10) /* Status Register */ --#define AT91_ST_PITS (1 << 0) /* Period Interval Timer Status */ --#define AT91_ST_WDOVF (1 << 1) /* Watchdog Overflow */ --#define AT91_ST_RTTINC (1 << 2) /* Real-time Timer Increment */ --#define AT91_ST_ALMS (1 << 3) /* Alarm Status */ --#define AT91_ST_IER (AT91_ST + 0x14) /* Interrupt Enable Register */ --#define AT91_ST_IDR (AT91_ST + 0x18) /* Interrupt Disable Register */ --#define AT91_ST_IMR (AT91_ST + 0x1c) /* Interrupt Mask Register */ --#define AT91_ST_RTAR (AT91_ST + 0x20) /* Real-time Alarm Register */ --#define AT91_ST_ALMV (0xfffff << 0) /* Alarm Value */ --#define AT91_ST_CRTR (AT91_ST + 0x24) /* Current Real-time Register */ --#define AT91_ST_CRTV (0xfffff << 0) /* Current Real-Time Value */ -- -- --/* -- * Real-time Clock. -- */ --#define AT91_RTC 0xe00 -- --#define AT91_RTC_CR (AT91_RTC + 0x00) /* Control Register */ --#define AT91_RTC_UPDTIM (1 << 0) /* Update Request Time Register */ --#define AT91_RTC_UPDCAL (1 << 1) /* Update Request Calendar Register */ --#define AT91_RTC_TIMEVSEL (3 << 8) /* Time Event Selection */ --#define AT91_RTC_TIMEVSEL_MINUTE (0 << 8) --#define AT91_RTC_TIMEVSEL_HOUR (1 << 8) --#define AT91_RTC_TIMEVSEL_DAY24 (2 << 8) --#define AT91_RTC_TIMEVSEL_DAY12 (3 << 8) --#define AT91_RTC_CALEVSEL (3 << 16) /* Calendar Event Selection */ --#define AT91_RTC_CALEVSEL_WEEK (0 << 16) --#define AT91_RTC_CALEVSEL_MONTH (1 << 16) --#define AT91_RTC_CALEVSEL_YEAR (2 << 16) -- --#define AT91_RTC_MR (AT91_RTC + 0x04) /* Mode Register */ --#define AT91_RTC_HRMOD (1 << 0) /* 12/24 Hour Mode */ -- --#define AT91_RTC_TIMR (AT91_RTC + 0x08) /* Time Register */ --#define AT91_RTC_SEC (0x7f << 0) /* Current Second */ --#define AT91_RTC_MIN (0x7f << 8) /* Current Minute */ --#define AT91_RTC_HOUR (0x3f << 16) /* Current Hour */ --#define AT91_RTC_AMPM (1 << 22) /* Ante Meridiem Post Meridiem Indicator */ -- --#define AT91_RTC_CALR (AT91_RTC + 0x0c) /* Calendar Register */ --#define AT91_RTC_CENT (0x7f << 0) /* Current Century */ --#define AT91_RTC_YEAR (0xff << 8) /* Current Year */ --#define AT91_RTC_MONTH (0x1f << 16) /* Current Month */ --#define AT91_RTC_DAY (7 << 21) /* Current Day */ --#define AT91_RTC_DATE (0x3f << 24) /* Current Date */ -- --#define AT91_RTC_TIMALR (AT91_RTC + 0x10) /* Time Alarm Register */ --#define AT91_RTC_SECEN (1 << 7) /* Second Alarm Enable */ --#define AT91_RTC_MINEN (1 << 15) /* Minute Alarm Enable */ --#define AT91_RTC_HOUREN (1 << 23) /* Hour Alarm Enable */ -- --#define AT91_RTC_CALALR (AT91_RTC + 0x14) /* Calendar Alarm Register */ --#define AT91_RTC_MTHEN (1 << 23) /* Month Alarm Enable */ --#define AT91_RTC_DATEEN (1 << 31) /* Date Alarm Enable */ -- --#define AT91_RTC_SR (AT91_RTC + 0x18) /* Status Register */ --#define AT91_RTC_ACKUPD (1 << 0) /* Acknowledge for Update */ --#define AT91_RTC_ALARM (1 << 1) /* Alarm Flag */ --#define AT91_RTC_SECEV (1 << 2) /* Second Event */ --#define AT91_RTC_TIMEV (1 << 3) /* Time Event */ --#define AT91_RTC_CALEV (1 << 4) /* Calendar Event */ -- --#define AT91_RTC_SCCR (AT91_RTC + 0x1c) /* Status Clear Command Register */ --#define AT91_RTC_IER (AT91_RTC + 0x20) /* Interrupt Enable Register */ --#define AT91_RTC_IDR (AT91_RTC + 0x24) /* Interrupt Disable Register */ --#define AT91_RTC_IMR (AT91_RTC + 0x28) /* Interrupt Mask Register */ -- --#define AT91_RTC_VER (AT91_RTC + 0x2c) /* Valid Entry Register */ --#define AT91_RTC_NVTIM (1 << 0) /* Non valid Time */ --#define AT91_RTC_NVCAL (1 << 1) /* Non valid Calendar */ --#define AT91_RTC_NVTIMALR (1 << 2) /* Non valid Time Alarm */ --#define AT91_RTC_NVCALALR (1 << 3) /* Non valid Calendar Alarm */ -- -- --/* -- * Memory Controller. -- */ --#define AT91_MC 0xf00 -- --#define AT91_MC_RCR (AT91_MC + 0x00) /* MC Remap Control Register */ --#define AT91_MC_RCB (1 << 0) /* Remap Command Bit */ -- --#define AT91_MC_ASR (AT91_MC + 0x04) /* MC Abort Status Register */ --#define AT91_MC_UNADD (1 << 0) /* Undefined Address Abort Status */ --#define AT91_MC_MISADD (1 << 1) /* Misaligned Address Abort Status */ --#define AT91_MC_ABTSZ (3 << 8) /* Abort Size Status */ --#define AT91_MC_ABTSZ_BYTE (0 << 8) --#define AT91_MC_ABTSZ_HALFWORD (1 << 8) --#define AT91_MC_ABTSZ_WORD (2 << 8) --#define AT91_MC_ABTTYP (3 << 10) /* Abort Type Status */ --#define AT91_MC_ABTTYP_DATAREAD (0 << 10) --#define AT91_MC_ABTTYP_DATAWRITE (1 << 10) --#define AT91_MC_ABTTYP_FETCH (2 << 10) --#define AT91_MC_MST0 (1 << 16) /* ARM920T Abort Source */ --#define AT91_MC_MST1 (1 << 17) /* PDC Abort Source */ --#define AT91_MC_MST2 (1 << 18) /* UHP Abort Source */ --#define AT91_MC_MST3 (1 << 19) /* EMAC Abort Source */ --#define AT91_MC_SVMST0 (1 << 24) /* Saved ARM920T Abort Source */ --#define AT91_MC_SVMST1 (1 << 25) /* Saved PDC Abort Source */ --#define AT91_MC_SVMST2 (1 << 26) /* Saved UHP Abort Source */ --#define AT91_MC_SVMST3 (1 << 27) /* Saved EMAC Abort Source */ -- --#define AT91_MC_AASR (AT91_MC + 0x08) /* MC Abort Address Status Register */ -- --#define AT91_MC_MPR (AT91_MC + 0x0c) /* MC Master Priority Register */ --#define AT91_MPR_MSTP0 (7 << 0) /* ARM920T Priority */ --#define AT91_MPR_MSTP1 (7 << 4) /* PDC Priority */ --#define AT91_MPR_MSTP2 (7 << 8) /* UHP Priority */ --#define AT91_MPR_MSTP3 (7 << 12) /* EMAC Priority */ -- --/* External Bus Interface (EBI) registers */ --#define AT91_EBI_CSA (AT91_MC + 0x60) /* Chip Select Assignment Register */ --#define AT91_EBI_CS0A (1 << 0) /* Chip Select 0 Assignment */ --#define AT91_EBI_CS0A_SMC (0 << 0) --#define AT91_EBI_CS0A_BFC (1 << 0) --#define AT91_EBI_CS1A (1 << 1) /* Chip Select 1 Assignment */ --#define AT91_EBI_CS1A_SMC (0 << 1) --#define AT91_EBI_CS1A_SDRAMC (1 << 1) --#define AT91_EBI_CS3A (1 << 3) /* Chip Select 2 Assignment */ --#define AT91_EBI_CS3A_SMC (0 << 3) --#define AT91_EBI_CS3A_SMC_SMARTMEDIA (1 << 3) --#define AT91_EBI_CS4A (1 << 4) /* Chip Select 3 Assignment */ --#define AT91_EBI_CS4A_SMC (0 << 4) --#define AT91_EBI_CS4A_SMC_COMPACTFLASH (1 << 4) --#define AT91_EBI_CFGR (AT91_MC + 0x64) /* Configuration Register */ --#define AT91_EBI_DBPUC (1 << 0) /* Data Bus Pull-Up Configuration */ -- --/* Static Memory Controller (SMC) registers */ --#define AT91_SMC_CSR(n) (AT91_MC + 0x70 + ((n) * 4))/* SMC Chip Select Register */ --#define AT91_SMC_NWS (0x7f << 0) /* Number of Wait States */ --#define AT91_SMC_NWS_(x) ((x) << 0) --#define AT91_SMC_WSEN (1 << 7) /* Wait State Enable */ --#define AT91_SMC_TDF (0xf << 8) /* Data Float Time */ --#define AT91_SMC_TDF_(x) ((x) << 8) --#define AT91_SMC_BAT (1 << 12) /* Byte Access Type */ --#define AT91_SMC_DBW (3 << 13) /* Data Bus Width */ --#define AT91_SMC_DBW_16 (1 << 13) --#define AT91_SMC_DBW_8 (2 << 13) --#define AT91_SMC_DPR (1 << 15) /* Data Read Protocol */ --#define AT91_SMC_ACSS (3 << 16) /* Address to Chip Select Setup */ --#define AT91_SMC_ACSS_STD (0 << 16) --#define AT91_SMC_ACSS_1 (1 << 16) --#define AT91_SMC_ACSS_2 (2 << 16) --#define AT91_SMC_ACSS_3 (3 << 16) --#define AT91_SMC_RWSETUP (7 << 24) /* Read & Write Signal Time Setup */ --#define AT91_SMC_RWSETUP_(x) ((x) << 24) --#define AT91_SMC_RWHOLD (7 << 28) /* Read & Write Signal Hold Time */ --#define AT91_SMC_RWHOLD_(x) ((x) << 28) -- --/* SDRAM Controller registers */ --#define AT91_SDRAMC_MR (AT91_MC + 0x90) /* Mode Register */ --#define AT91_SDRAMC_MODE (0xf << 0) /* Command Mode */ --#define AT91_SDRAMC_MODE_NORMAL (0 << 0) --#define AT91_SDRAMC_MODE_NOP (1 << 0) --#define AT91_SDRAMC_MODE_PRECHARGE (2 << 0) --#define AT91_SDRAMC_MODE_LMR (3 << 0) --#define AT91_SDRAMC_MODE_REFRESH (4 << 0) --#define AT91_SDRAMC_DBW (1 << 4) /* Data Bus Width */ --#define AT91_SDRAMC_DBW_32 (0 << 4) --#define AT91_SDRAMC_DBW_16 (1 << 4) -- --#define AT91_SDRAMC_TR (AT91_MC + 0x94) /* Refresh Timer Register */ --#define AT91_SDRAMC_COUNT (0xfff << 0) /* Refresh Timer Count */ -- --#define AT91_SDRAMC_CR (AT91_MC + 0x98) /* Configuration Register */ --#define AT91_SDRAMC_NC (3 << 0) /* Number of Column Bits */ --#define AT91_SDRAMC_NC_8 (0 << 0) --#define AT91_SDRAMC_NC_9 (1 << 0) --#define AT91_SDRAMC_NC_10 (2 << 0) --#define AT91_SDRAMC_NC_11 (3 << 0) --#define AT91_SDRAMC_NR (3 << 2) /* Number of Row Bits */ --#define AT91_SDRAMC_NR_11 (0 << 2) --#define AT91_SDRAMC_NR_12 (1 << 2) --#define AT91_SDRAMC_NR_13 (2 << 2) --#define AT91_SDRAMC_NB (1 << 4) /* Number of Banks */ --#define AT91_SDRAMC_NB_2 (0 << 4) --#define AT91_SDRAMC_NB_4 (1 << 4) --#define AT91_SDRAMC_CAS (3 << 5) /* CAS Latency */ --#define AT91_SDRAMC_CAS_2 (2 << 5) --#define AT91_SDRAMC_TWR (0xf << 7) /* Write Recovery Delay */ --#define AT91_SDRAMC_TRC (0xf << 11) /* Row Cycle Delay */ --#define AT91_SDRAMC_TRP (0xf << 15) /* Row Precharge Delay */ --#define AT91_SDRAMC_TRCD (0xf << 19) /* Row to Column Delay */ --#define AT91_SDRAMC_TRAS (0xf << 23) /* Active to Precharge Delay */ --#define AT91_SDRAMC_TXSR (0xf << 27) /* Exit Self Refresh to Active Delay */ -- --#define AT91_SDRAMC_SRR (AT91_MC + 0x9c) /* Self Refresh Register */ --#define AT91_SDRAMC_LPR (AT91_MC + 0xa0) /* Low Power Register */ --#define AT91_SDRAMC_IER (AT91_MC + 0xa4) /* Interrupt Enable Register */ --#define AT91_SDRAMC_IDR (AT91_MC + 0xa8) /* Interrupt Disable Register */ --#define AT91_SDRAMC_IMR (AT91_MC + 0xac) /* Interrupt Mask Register */ --#define AT91_SDRAMC_ISR (AT91_MC + 0xb0) /* Interrupt Status Register */ -- --/* Burst Flash Controller register */ --#define AT91_BFC_MR (AT91_MC + 0xc0) /* Mode Register */ --#define AT91_BFC_BFCOM (3 << 0) /* Burst Flash Controller Operating Mode */ --#define AT91_BFC_BFCOM_DISABLED (0 << 0) --#define AT91_BFC_BFCOM_ASYNC (1 << 0) --#define AT91_BFC_BFCOM_BURST (2 << 0) --#define AT91_BFC_BFCC (3 << 2) /* Burst Flash Controller Clock */ --#define AT91_BFC_BFCC_MCK (1 << 2) --#define AT91_BFC_BFCC_DIV2 (2 << 2) --#define AT91_BFC_BFCC_DIV4 (3 << 2) --#define AT91_BFC_AVL (0xf << 4) /* Address Valid Latency */ --#define AT91_BFC_PAGES (7 << 8) /* Page Size */ --#define AT91_BFC_PAGES_NO_PAGE (0 << 8) --#define AT91_BFC_PAGES_16 (1 << 8) --#define AT91_BFC_PAGES_32 (2 << 8) --#define AT91_BFC_PAGES_64 (3 << 8) --#define AT91_BFC_PAGES_128 (4 << 8) --#define AT91_BFC_PAGES_256 (5 << 8) --#define AT91_BFC_PAGES_512 (6 << 8) --#define AT91_BFC_PAGES_1024 (7 << 8) --#define AT91_BFC_OEL (3 << 12) /* Output Enable Latency */ --#define AT91_BFC_BAAEN (1 << 16) /* Burst Address Advance Enable */ --#define AT91_BFC_BFOEH (1 << 17) /* Burst Flash Output Enable Handling */ --#define AT91_BFC_MUXEN (1 << 18) /* Multiplexed Bus Enable */ --#define AT91_BFC_RDYEN (1 << 19) /* Ready Enable Mode */ -- --#endif -diff -urN -x CVS linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91rm9200_tc.h linux-2.6.19/include/asm-arm/arch-at91rm9200/at91rm9200_tc.h ---- linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91rm9200_tc.h Mon Dec 4 16:34:19 2006 -+++ linux-2.6.19/include/asm-arm/arch-at91rm9200/at91rm9200_tc.h Thu Jan 1 02:00:00 1970 -@@ -1,146 +0,0 @@ --/* -- * include/asm-arm/arch-at91rm9200/at91rm9200_tc.h -- * -- * Copyright (C) SAN People -- * -- * Timer/Counter Unit (TC) registers. -- * Based on AT91RM9200 datasheet revision E. -- * -- * This program is free software; you can redistribute it and/or modify -- * it under the terms of the GNU General Public License as published by -- * the Free Software Foundation; either version 2 of the License, or -- * (at your option) any later version. +- * PIO pin definitions (peripheral A/B multiplexing). - */ -- --#ifndef AT91RM9200_TC_H --#define AT91RM9200_TC_H -- --#define AT91_TC_BCR 0xc0 /* TC Block Control Register */ --#define AT91_TC_SYNC (1 << 0) /* Synchro Command */ -- --#define AT91_TC_BMR 0xc4 /* TC Block Mode Register */ --#define AT91_TC_TC0XC0S (3 << 0) /* External Clock Signal 0 Selection */ --#define AT91_TC_TC0XC0S_TCLK0 (0 << 0) --#define AT91_TC_TC0XC0S_NONE (1 << 0) --#define AT91_TC_TC0XC0S_TIOA1 (2 << 0) --#define AT91_TC_TC0XC0S_TIOA2 (3 << 0) --#define AT91_TC_TC1XC1S (3 << 2) /* External Clock Signal 1 Selection */ --#define AT91_TC_TC1XC1S_TCLK1 (0 << 2) --#define AT91_TC_TC1XC1S_NONE (1 << 2) --#define AT91_TC_TC1XC1S_TIOA0 (2 << 2) --#define AT91_TC_TC1XC1S_TIOA2 (3 << 2) --#define AT91_TC_TC2XC2S (3 << 4) /* External Clock Signal 2 Selection */ --#define AT91_TC_TC2XC2S_TCLK2 (0 << 4) --#define AT91_TC_TC2XC2S_NONE (1 << 4) --#define AT91_TC_TC2XC2S_TIOA0 (2 << 4) --#define AT91_TC_TC2XC2S_TIOA1 (3 << 4) -- -- --#define AT91_TC_CCR 0x00 /* Channel Control Register */ --#define AT91_TC_CLKEN (1 << 0) /* Counter Clock Enable Command */ --#define AT91_TC_CLKDIS (1 << 1) /* Counter CLock Disable Command */ --#define AT91_TC_SWTRG (1 << 2) /* Software Trigger Command */ -- --#define AT91_TC_CMR 0x04 /* Channel Mode Register */ --#define AT91_TC_TCCLKS (7 << 0) /* Capture/Waveform Mode: Clock Selection */ --#define AT91_TC_TIMER_CLOCK1 (0 << 0) --#define AT91_TC_TIMER_CLOCK2 (1 << 0) --#define AT91_TC_TIMER_CLOCK3 (2 << 0) --#define AT91_TC_TIMER_CLOCK4 (3 << 0) --#define AT91_TC_TIMER_CLOCK5 (4 << 0) --#define AT91_TC_XC0 (5 << 0) --#define AT91_TC_XC1 (6 << 0) --#define AT91_TC_XC2 (7 << 0) --#define AT91_TC_CLKI (1 << 3) /* Capture/Waveform Mode: Clock Invert */ --#define AT91_TC_BURST (3 << 4) /* Capture/Waveform Mode: Burst Signal Selection */ --#define AT91_TC_LDBSTOP (1 << 6) /* Capture Mode: Counter Clock Stopped with TB Loading */ --#define AT91_TC_LDBDIS (1 << 7) /* Capture Mode: Counter Clock Disable with RB Loading */ --#define AT91_TC_ETRGEDG (3 << 8) /* Capture Mode: External Trigger Edge Selection */ --#define AT91_TC_ABETRG (1 << 10) /* Capture Mode: TIOA or TIOB External Trigger Selection */ --#define AT91_TC_CPCTRG (1 << 14) /* Capture Mode: RC Compare Trigger Enable */ --#define AT91_TC_WAVE (1 << 15) /* Capture/Waveform mode */ --#define AT91_TC_LDRA (3 << 16) /* Capture Mode: RA Loading Selection */ --#define AT91_TC_LDRB (3 << 18) /* Capture Mode: RB Loading Selection */ -- --#define AT91_TC_CPCSTOP (1 << 6) /* Waveform Mode: Counter Clock Stopped with RC Compare */ --#define AT91_TC_CPCDIS (1 << 7) /* Waveform Mode: Counter Clock Disable with RC Compare */ --#define AT91_TC_EEVTEDG (3 << 8) /* Waveform Mode: External Event Edge Selection */ --#define AT91_TC_EEVTEDG_NONE (0 << 8) --#define AT91_TC_EEVTEDG_RISING (1 << 8) --#define AT91_TC_EEVTEDG_FALLING (2 << 8) --#define AT91_TC_EEVTEDG_BOTH (3 << 8) --#define AT91_TC_EEVT (3 << 10) /* Waveform Mode: External Event Selection */ --#define AT91_TC_EEVT_TIOB (0 << 10) --#define AT91_TC_EEVT_XC0 (1 << 10) --#define AT91_TC_EEVT_XC1 (2 << 10) --#define AT91_TC_EEVT_XC2 (3 << 10) --#define AT91_TC_ENETRG (1 << 12) /* Waveform Mode: External Event Trigger Enable */ --#define AT91_TC_WAVESEL (3 << 13) /* Waveform Mode: Waveform Selection */ --#define AT91_TC_WAVESEL_UP (0 << 13) --#define AT91_TC_WAVESEL_UP_AUTO (2 << 13) --#define AT91_TC_WAVESEL_UPDOWN (1 << 13) --#define AT91_TC_WAVESEL_UPDOWN_AUTO (3 << 13) --#define AT91_TC_ACPA (3 << 16) /* Waveform Mode: RA Compare Effect on TIOA */ --#define AT91_TC_ACPA_NONE (0 << 16) --#define AT91_TC_ACPA_SET (1 << 16) --#define AT91_TC_ACPA_CLEAR (2 << 16) --#define AT91_TC_ACPA_TOGGLE (3 << 16) --#define AT91_TC_ACPC (3 << 18) /* Waveform Mode: RC Compre Effect on TIOA */ --#define AT91_TC_ACPC_NONE (0 << 18) --#define AT91_TC_ACPC_SET (1 << 18) --#define AT91_TC_ACPC_CLEAR (2 << 18) --#define AT91_TC_ACPC_TOGGLE (3 << 18) --#define AT91_TC_AEEVT (3 << 20) /* Waveform Mode: External Event Effect on TIOA */ --#define AT91_TC_AEEVT_NONE (0 << 20) --#define AT91_TC_AEEVT_SET (1 << 20) --#define AT91_TC_AEEVT_CLEAR (2 << 20) --#define AT91_TC_AEEVT_TOGGLE (3 << 20) --#define AT91_TC_ASWTRG (3 << 22) /* Waveform Mode: Software Trigger Effect on TIOA */ --#define AT91_TC_ASWTRG_NONE (0 << 22) --#define AT91_TC_ASWTRG_SET (1 << 22) --#define AT91_TC_ASWTRG_CLEAR (2 << 22) --#define AT91_TC_ASWTRG_TOGGLE (3 << 22) --#define AT91_TC_BCPB (3 << 24) /* Waveform Mode: RB Compare Effect on TIOB */ --#define AT91_TC_BCPB_NONE (0 << 24) --#define AT91_TC_BCPB_SET (1 << 24) --#define AT91_TC_BCPB_CLEAR (2 << 24) --#define AT91_TC_BCPB_TOGGLE (3 << 24) --#define AT91_TC_BCPC (3 << 26) /* Waveform Mode: RC Compare Effect on TIOB */ --#define AT91_TC_BCPC_NONE (0 << 26) --#define AT91_TC_BCPC_SET (1 << 26) --#define AT91_TC_BCPC_CLEAR (2 << 26) --#define AT91_TC_BCPC_TOGGLE (3 << 26) --#define AT91_TC_BEEVT (3 << 28) /* Waveform Mode: External Event Effect on TIOB */ --#define AT91_TC_BEEVT_NONE (0 << 28) --#define AT91_TC_BEEVT_SET (1 << 28) --#define AT91_TC_BEEVT_CLEAR (2 << 28) --#define AT91_TC_BEEVT_TOGGLE (3 << 28) --#define AT91_TC_BSWTRG (3 << 30) /* Waveform Mode: Software Trigger Effect on TIOB */ --#define AT91_TC_BSWTRG_NONE (0 << 30) --#define AT91_TC_BSWTRG_SET (1 << 30) --#define AT91_TC_BSWTRG_CLEAR (2 << 30) --#define AT91_TC_BSWTRG_TOGGLE (3 << 30) -- --#define AT91_TC_CV 0x10 /* Counter Value */ --#define AT91_TC_RA 0x14 /* Register A */ --#define AT91_TC_RB 0x18 /* Register B */ --#define AT91_TC_RC 0x1c /* Register C */ -- --#define AT91_TC_SR 0x20 /* Status Register */ --#define AT91_TC_COVFS (1 << 0) /* Counter Overflow Status */ --#define AT91_TC_LOVRS (1 << 1) /* Load Overrun Status */ --#define AT91_TC_CPAS (1 << 2) /* RA Compare Status */ --#define AT91_TC_CPBS (1 << 3) /* RB Compare Status */ --#define AT91_TC_CPCS (1 << 4) /* RC Compare Status */ --#define AT91_TC_LDRAS (1 << 5) /* RA Loading Status */ --#define AT91_TC_LDRBS (1 << 6) /* RB Loading Status */ --#define AT91_TC_ETRGS (1 << 7) /* External Trigger Status */ --#define AT91_TC_CLKSTA (1 << 16) /* Clock Enabling Status */ --#define AT91_TC_MTIOA (1 << 17) /* TIOA Mirror */ --#define AT91_TC_MTIOB (1 << 18) /* TIOB Mirror */ -- --#define AT91_TC_IER 0x24 /* Interrupt Enable Register */ --#define AT91_TC_IDR 0x28 /* Interrupt Disable Register */ --#define AT91_TC_IMR 0x2c /* Interrupt Mask Register */ -- +-#define AT91_PA0_SPI0_MISO (1 << 0) /* A: SPI0 Master In Slave */ +-#define AT91_PA0_MCDA0 (1 << 0) /* B: Multimedia Card A Data 0 */ +-#define AT91_PA1_SPI0_MOSI (1 << 1) /* A: SPI0 Master Out Slave */ +-#define AT91_PA1_MCCDA (1 << 1) /* B: Multimedia Card A Command */ +-#define AT91_PA2_SPI0_SPCK (1 << 2) /* A: SPI0 Serial Clock */ +-#define AT91_PA2_MCCK (1 << 2) /* B: Multimedia Card Clock */ +-#define AT91_PA3_SPI0_NPCS0 (1 << 3) /* A: SPI0 Peripheral Chip Select 0 */ +-#define AT91_PA4_SPI0_NPCS1 (1 << 4) /* A: SPI0 Peripheral Chip Select 1 */ +-#define AT91_PA4_MCDA1 (1 << 4) /* B: Multimedia Card A Data 1 */ +-#define AT91_PA5_SPI0_NPCS2 (1 << 5) /* A: SPI0 Peripheral Chip Select 2 */ +-#define AT91_PA5_MCDA2 (1 << 5) /* B: Multimedia Card A Data 2 */ +-#define AT91_PA6_SPI0_NPCS3 (1 << 6) /* A: SPI0 Peripheral Chip Select 3 */ +-#define AT91_PA6_MCDA3 (1 << 6) /* B: Multimedia Card A Data 3 */ +-#define AT91_PA7_TWD (1 << 7) /* A: TWI Two-wire Serial Data */ +-#define AT91_PA7_PCK0 (1 << 7) /* B: PMC Programmable clock Output 0 */ +-#define AT91_PA8_TWCK (1 << 8) /* A: TWI Two-wire Serial Clock */ +-#define AT91_PA8_PCK1 (1 << 8) /* B: PMC Programmable clock Output 1 */ +-#define AT91_PA9_DRXD (1 << 9) /* A: DBGU Debug Receive Data */ +-#define AT91_PA9_PCK2 (1 << 9) /* B: PMC Programmable clock Output 2 */ +-#define AT91_PA10_DTXD (1 << 10) /* A: DBGU Debug Transmit Data */ +-#define AT91_PA10_PCK3 (1 << 10) /* B: PMC Programmable clock Output 3 */ +-#define AT91_PA11_TSYNC (1 << 11) /* A: Trace Synchronization Signal */ +-#define AT91_PA11_SCK1 (1 << 11) /* B: USART1 Serial Clock */ +-#define AT91_PA12_TCLK (1 << 12) /* A: Trace Clock */ +-#define AT91_PA12_RTS1 (1 << 12) /* B: USART1 Ready To Send */ +-#define AT91_PA13_TPS0 (1 << 13) /* A: Trace ARM Pipeline Status 0 */ +-#define AT91_PA13_CTS1 (1 << 13) /* B: USART1 Clear To Send */ +-#define AT91_PA14_TPS1 (1 << 14) /* A: Trace ARM Pipeline Status 1 */ +-#define AT91_PA14_SCK2 (1 << 14) /* B: USART2 Serial Clock */ +-#define AT91_PA15_TPS2 (1 << 15) /* A: Trace ARM Pipeline Status 2 */ +-#define AT91_PA15_RTS2 (1 << 15) /* B: USART2 Ready To Send */ +-#define AT91_PA16_TPK0 (1 << 16) /* A: Trace Packet Port 0 */ +-#define AT91_PA16_CTS2 (1 << 16) /* B: USART2 Clear To Send */ +-#define AT91_PA17_TPK1 (1 << 17) /* A: Trace Packet Port 1 */ +-#define AT91_PA17_TF1 (1 << 17) /* B: SSC1 Transmit Frame Sync */ +-#define AT91_PA18_TPK2 (1 << 18) /* A: Trace Packet Port 2 */ +-#define AT91_PA18_TK1 (1 << 18) /* B: SSC1 Transmit Clock */ +-#define AT91_PA19_TPK3 (1 << 19) /* A: Trace Packet Port 3 */ +-#define AT91_PA19_TD1 (1 << 19) /* B: SSC1 Transmit Data */ +-#define AT91_PA20_TPK4 (1 << 20) /* A: Trace Packet Port 4 */ +-#define AT91_PA20_RD1 (1 << 20) /* B: SSC1 Receive Data */ +-#define AT91_PA21_TPK5 (1 << 21) /* A: Trace Packet Port 5 */ +-#define AT91_PA21_RK1 (1 << 21) /* B: SSC1 Receive Clock */ +-#define AT91_PA22_TPK6 (1 << 22) /* A: Trace Packet Port 6 */ +-#define AT91_PA22_RF1 (1 << 22) /* B: SSC1 Receive Frame Sync */ +-#define AT91_PA23_TPK7 (1 << 23) /* A: Trace Packet Port 7 */ +-#define AT91_PA23_RTS0 (1 << 23) /* B: USART0 Ready To Send */ +-#define AT91_PA24_TPK8 (1 << 24) /* A: Trace Packet Port 8 */ +-#define AT91_PA24_SPI1_NPCS1 (1 << 24) /* B: SPI1 Peripheral Chip Select 1 */ +-#define AT91_PA25_TPK9 (1 << 25) /* A: Trace Packet Port 9 */ +-#define AT91_PA25_SPI1_NPCS2 (1 << 25) /* B: SPI1 Peripheral Chip Select 2 */ +-#define AT91_PA26_TPK10 (1 << 26) /* A: Trace Packet Port 10 */ +-#define AT91_PA26_SPI1_NPCS3 (1 << 26) /* B: SPI1 Peripheral Chip Select 3 */ +-#define AT91_PA27_TPK11 (1 << 27) /* A: Trace Packet Port 11 */ +-#define AT91_PA27_SPI0_NPCS1 (1 << 27) /* B: SPI0 Peripheral Chip Select 1 */ +-#define AT91_PA28_TPK12 (1 << 28) /* A: Trace Packet Port 12 */ +-#define AT91_PA28_SPI0_NPCS2 (1 << 28) /* B: SPI0 Peripheral Chip Select 2 */ +-#define AT91_PA29_TPK13 (1 << 29) /* A: Trace Packet Port 13 */ +-#define AT91_PA29_SPI0_NPCS3 (1 << 29) /* B: SPI0 Peripheral Chip Select 3 */ +-#define AT91_PA30_TPK14 (1 << 30) /* A: Trace Packet Port 14 */ +-#define AT91_PA30_A23 (1 << 30) /* B: Address Bus bit 23 */ +-#define AT91_PA31_TPK15 (1 << 31) /* A: Trace Packet Port 15 */ +-#define AT91_PA31_A24 (1 << 31) /* B: Address Bus bit 24 */ +- +-#define AT91_PB0_LCDVSYNC (1 << 0) /* A: LCD Vertical Synchronization */ +-#define AT91_PB1_LCDHSYNC (1 << 1) /* A: LCD Horizontal Synchronization */ +-#define AT91_PB2_LCDDOTCK (1 << 2) /* A: LCD Dot Clock */ +-#define AT91_PB2_PCK0 (1 << 2) /* B: PMC Programmable clock Output 0 */ +-#define AT91_PB3_LCDDEN (1 << 3) /* A: LCD Data Enable */ +-#define AT91_PB4_LCDCC (1 << 4) /* A: LCD Contrast Control */ +-#define AT91_PB4_LCDD2 (1 << 4) /* B: LCD Data Bus Bit 2 */ +-#define AT91_PB5_LCDD0 (1 << 5) /* A: LCD Data Bus Bit 0 */ +-#define AT91_PB5_LCDD3 (1 << 5) /* B: LCD Data Bus Bit 3 */ +-#define AT91_PB6_LCDD1 (1 << 6) /* A: LCD Data Bus Bit 1 */ +-#define AT91_PB6_LCDD4 (1 << 6) /* B: LCD Data Bus Bit 4 */ +-#define AT91_PB7_LCDD2 (1 << 7) /* A: LCD Data Bus Bit 2 */ +-#define AT91_PB7_LCDD5 (1 << 7) /* B: LCD Data Bus Bit 5 */ +-#define AT91_PB8_LCDD3 (1 << 8) /* A: LCD Data Bus Bit 3 */ +-#define AT91_PB8_LCDD6 (1 << 8) /* B: LCD Data Bus Bit 6 */ +-#define AT91_PB9_LCDD4 (1 << 9) /* A: LCD Data Bus Bit 4 */ +-#define AT91_PB9_LCDD7 (1 << 9) /* B: LCD Data Bus Bit 7 */ +-#define AT91_PB10_LCDD5 (1 << 10) /* A: LCD Data Bus Bit 5 */ +-#define AT91_PB10_LCDD10 (1 << 10) /* B: LCD Data Bus Bit 10 */ +-#define AT91_PB11_LCDD6 (1 << 11) /* A: LCD Data Bus Bit 6 */ +-#define AT91_PB11_LCDD11 (1 << 11) /* B: LCD Data Bus Bit 11 */ +-#define AT91_PB12_LCDD7 (1 << 12) /* A: LCD Data Bus Bit 7 */ +-#define AT91_PB12_LCDD12 (1 << 12) /* B: LCD Data Bus Bit 12 */ +-#define AT91_PB13_LCDD8 (1 << 13) /* A: LCD Data Bus Bit 8 */ +-#define AT91_PB13_LCDD13 (1 << 13) /* B: LCD Data Bus Bit 13 */ +-#define AT91_PB14_LCDD9 (1 << 14) /* A: LCD Data Bus Bit 9 */ +-#define AT91_PB14_LCDD14 (1 << 14) /* B: LCD Data Bus Bit 14 */ +-#define AT91_PB15_LCDD10 (1 << 15) /* A: LCD Data Bus Bit 10 */ +-#define AT91_PB15_LCDD15 (1 << 15) /* B: LCD Data Bus Bit 15 */ +-#define AT91_PB16_LCDD11 (1 << 16) /* A: LCD Data Bus Bit 11 */ +-#define AT91_PB16_LCDD19 (1 << 16) /* B: LCD Data Bus Bit 19 */ +-#define AT91_PB17_LCDD12 (1 << 17) /* A: LCD Data Bus Bit 12 */ +-#define AT91_PB17_LCDD20 (1 << 17) /* B: LCD Data Bus Bit 20 */ +-#define AT91_PB18_LCDD13 (1 << 18) /* A: LCD Data Bus Bit 13 */ +-#define AT91_PB18_LCDD21 (1 << 18) /* B: LCD Data Bus Bit 21 */ +-#define AT91_PB19_LCDD14 (1 << 19) /* A: LCD Data Bus Bit 14 */ +-#define AT91_PB19_LCDD22 (1 << 19) /* B: LCD Data Bus Bit 22 */ +-#define AT91_PB20_LCDD15 (1 << 20) /* A: LCD Data Bus Bit 15 */ +-#define AT91_PB20_LCDD23 (1 << 20) /* B: LCD Data Bus Bit 23 */ +-#define AT91_PB21_TF0 (1 << 21) /* A: SSC0 Transmit Frame Sync */ +-#define AT91_PB21_LCDD16 (1 << 21) /* B: LCD Data Bus Bit 16 */ +-#define AT91_PB22_TK0 (1 << 22) /* A: SSC0 Transmit Clock */ +-#define AT91_PB22_LCDD17 (1 << 22) /* B: LCD Data Bus Bit 17 */ +-#define AT91_PB23_TD0 (1 << 23) /* A: SSC0 Transmit Data */ +-#define AT91_PB23_LCDD18 (1 << 23) /* B: LCD Data Bus Bit 18 */ +-#define AT91_PB24_RD0 (1 << 24) /* A: SSC0 Receive Data */ +-#define AT91_PB24_LCDD19 (1 << 24) /* B: LCD Data Bus Bit 19 */ +-#define AT91_PB25_RK0 (1 << 25) /* A: SSC0 Receive Clock */ +-#define AT91_PB25_LCDD20 (1 << 25) /* B: LCD Data Bus Bit 20 */ +-#define AT91_PB26_RF0 (1 << 26) /* A: SSC0 Receive Frame Sync */ +-#define AT91_PB26_LCDD21 (1 << 26) /* B: LCD Data Bus Bit 21 */ +-#define AT91_PB27_SPI1_NPCS1 (1 << 27) /* A: SPI1 Peripheral Chip Select 1 */ +-#define AT91_PB27_LCDD22 (1 << 27) /* B: LCD Data Bus Bit 22 */ +-#define AT91_PB28_SPI1_NPCS0 (1 << 28) /* A: SPI1 Peripheral Chip Select 0 */ +-#define AT91_PB28_LCDD23 (1 << 28) /* B: LCD Data Bus Bit 23 */ +-#define AT91_PB29_SPI1_SPCK (1 << 29) /* A: SPI1 Serial Clock */ +-#define AT91_PB29_IRQ2 (1 << 29) /* B: Interrupt input 2 */ +-#define AT91_PB30_SPI1_MISO (1 << 30) /* A: SPI1 Master In Slave */ +-#define AT91_PB30_IRQ1 (1 << 30) /* B: Interrupt input 1 */ +-#define AT91_PB31_SPI1_MOSI (1 << 31) /* A: SPI1 Master Out Slave */ +-#define AT91_PB31_PCK2 (1 << 31) /* B: PMC Programmable clock Output 2 */ +- +-#define AT91_PC0_SMOE (1 << 0) /* A: SmartMedia Output Enable */ +-#define AT91_PC0_NCS6 (1 << 0) /* B: Chip Select 6 */ +-#define AT91_PC1_SMWE (1 << 1) /* A: SmartMedia Write Enable */ +-#define AT91_PC1_NCS7 (1 << 1) /* B: Chip Select 7 */ +-#define AT91_PC2_NWAIT (1 << 2) /* A: NWAIT */ +-#define AT91_PC2_IRQ0 (1 << 2) /* B: Interrupt input 0 */ +-#define AT91_PC3_A25_CFRNW (1 << 3) /* A: Address Bus[25] / Compact Flash Read Not Write */ +-#define AT91_PC4_NCS4_CFCS0 (1 << 4) /* A: Chip Select 4 / CompactFlash Chip Select 0 */ +-#define AT91_PC5_NCS5_CFCS1 (1 << 5) /* A: Chip Select 5 / CompactFlash Chip Select 1 */ +-#define AT91_PC6_CFCE1 (1 << 6) /* A: CompactFlash Chip Enable 1 */ +-#define AT91_PC7_CFCE2 (1 << 7) /* A: CompactFlash Chip Enable 2 */ +-#define AT91_PC8_TXD0 (1 << 8) /* A: USART0 Transmit Data */ +-#define AT91_PC8_PCK2 (1 << 8) /* B: PMC Programmable clock Output 2 */ +-#define AT91_PC9_RXD0 (1 << 9) /* A: USART0 Receive Data */ +-#define AT91_PC9_PCK3 (1 << 9) /* B: PMC Programmable clock Output 3 */ +-#define AT91_PC10_RTS0 (1 << 10) /* A: USART0 Ready To Send */ +-#define AT91_PC10_SCK0 (1 << 10) /* B: USART0 Serial Clock */ +-#define AT91_PC11_CTS0 (1 << 11) /* A: USART0 Clear To Send */ +-#define AT91_PC11_FIQ (1 << 11) /* B: AIC Fast Interrupt Input */ +-#define AT91_PC12_TXD1 (1 << 12) /* A: USART1 Transmit Data */ +-#define AT91_PC12_NCS6 (1 << 12) /* B: Chip Select 6 */ +-#define AT91_PC13_RXD1 (1 << 13) /* A: USART1 Receive Data */ +-#define AT91_PC13_NCS7 (1 << 13) /* B: Chip Select 7 */ +-#define AT91_PC14_TXD2 (1 << 14) /* A: USART2 Transmit Data */ +-#define AT91_PC14_SPI1_NPCS2 (1 << 14) /* B: SPI1 Peripheral Chip Select 2 */ +-#define AT91_PC15_RXD2 (1 << 15) /* A: USART2 Receive Data */ +-#define AT91_PC15_SPI1_NPCS3 (1 << 15) /* B: SPI1 Peripheral Chip Select 3 */ +-#define AT91_PC16_D16 (1 << 16) /* A: Data Bus [16] */ +-#define AT91_PC16_TCLK0 (1 << 16) /* B: Timer Counter 0 external clock input */ +-#define AT91_PC17_D17 (1 << 17) /* A: Data Bus [17] */ +-#define AT91_PC17_TCLK1 (1 << 17) /* B: Timer Counter 1 external clock input */ +-#define AT91_PC18_D18 (1 << 18) /* A: Data Bus [18] */ +-#define AT91_PC18_TCLK2 (1 << 18) /* B: Timer Counter 2 external clock input */ +-#define AT91_PC19_D19 (1 << 19) /* A: Data Bus [19] */ +-#define AT91_PC19_TIOA0 (1 << 19) /* B: Timer Counter 0 Multipurpose Timer I/O Pin A */ +-#define AT91_PC20_D20 (1 << 20) /* A: Data Bus [20] */ +-#define AT91_PC20_TIOB0 (1 << 20) /* B: Timer Counter 0 Multipurpose Timer I/O Pin B */ +-#define AT91_PC21_D21 (1 << 21) /* A: Data Bus [21] */ +-#define AT91_PC21_TIOA1 (1 << 21) /* B: Timer Counter 1 Multipurpose Timer I/O Pin A */ +-#define AT91_PC22_D22 (1 << 22) /* A: Data Bus [22] */ +-#define AT91_PC22_TIOB1 (1 << 22) /* B: Timer Counter 1 Multipurpose Timer I/O Pin B */ +-#define AT91_PC23_D23 (1 << 23) /* A: Data Bus [23] */ +-#define AT91_PC23_TIOA2 (1 << 23) /* B: Timer Counter 2 Multipurpose Timer I/O Pin A */ +-#define AT91_PC24_D24 (1 << 24) /* A: Data Bus [24] */ +-#define AT91_PC24_TIOB2 (1 << 24) /* B: Timer Counter 2 Multipurpose Timer I/O Pin B */ +-#define AT91_PC25_D25 (1 << 25) /* A: Data Bus [25] */ +-#define AT91_PC25_TF2 (1 << 25) /* B: SSC2 Transmit Frame Sync */ +-#define AT91_PC26_D26 (1 << 26) /* A: Data Bus [26] */ +-#define AT91_PC26_TK2 (1 << 26) /* B: SSC2 Transmit Clock */ +-#define AT91_PC27_D27 (1 << 27) /* A: Data Bus [27] */ +-#define AT91_PC27_TD2 (1 << 27) /* B: SSC2 Transmit Data */ +-#define AT91_PC28_D28 (1 << 28) /* A: Data Bus [28] */ +-#define AT91_PC28_RD2 (1 << 28) /* B: SSC2 Receive Data */ +-#define AT91_PC29_D29 (1 << 29) /* A: Data Bus [29] */ +-#define AT91_PC29_RK2 (1 << 29) /* B: SSC2 Receive Clock */ +-#define AT91_PC30_D30 (1 << 30) /* A: Data Bus [30] */ +-#define AT91_PC30_RF2 (1 << 30) /* B: SSC2 Receive Frame Sync */ +-#define AT91_PC31_D31 (1 << 31) /* A: Data Bus [31] */ +-#define AT91_PC31_PCK1 (1 << 31) /* B: PMC Programmable clock Output 1 */ -#endif -diff -urN -x CVS linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91rm9200_twi.h linux-2.6.19/include/asm-arm/arch-at91rm9200/at91rm9200_twi.h ---- linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91rm9200_twi.h Mon Dec 4 16:41:04 2006 -+++ linux-2.6.19/include/asm-arm/arch-at91rm9200/at91rm9200_twi.h Thu Jan 1 02:00:00 1970 -@@ -1,57 +0,0 @@ --/* -- * include/asm-arm/arch-at91rm9200/at91rm9200_twi.h -- * -- * Copyright (C) 2005 Ivan Kokshaysky -- * Copyright (C) SAN People -- * -- * Two-wire Interface (TWI) registers. -- * Based on AT91RM9200 datasheet revision E. -- * -- * This program is free software; you can redistribute it and/or modify -- * it under the terms of the GNU General Public License as published by -- * the Free Software Foundation; either version 2 of the License, or -- * (at your option) any later version. -- */ -- --#ifndef AT91RM9200_TWI_H --#define AT91RM9200_TWI_H -- --#define AT91_TWI_CR 0x00 /* Control Register */ --#define AT91_TWI_START (1 << 0) /* Send a Start Condition */ --#define AT91_TWI_STOP (1 << 1) /* Send a Stop Condition */ --#define AT91_TWI_MSEN (1 << 2) /* Master Transfer Enable */ --#define AT91_TWI_MSDIS (1 << 3) /* Master Transfer Disable */ --#define AT91_TWI_SWRST (1 << 7) /* Software Reset */ -- --#define AT91_TWI_MMR 0x04 /* Master Mode Register */ --#define AT91_TWI_IADRSZ (3 << 8) /* Internal Device Address Size */ --#define AT91_TWI_IADRSZ_NO (0 << 8) --#define AT91_TWI_IADRSZ_1 (1 << 8) --#define AT91_TWI_IADRSZ_2 (2 << 8) --#define AT91_TWI_IADRSZ_3 (3 << 8) --#define AT91_TWI_MREAD (1 << 12) /* Master Read Direction */ --#define AT91_TWI_DADR (0x7f << 16) /* Device Address */ - --#define AT91_TWI_IADR 0x0c /* Internal Address Register */ -- --#define AT91_TWI_CWGR 0x10 /* Clock Waveform Generator Register */ --#define AT91_TWI_CLDIV (0xff << 0) /* Clock Low Divisor */ --#define AT91_TWI_CHDIV (0xff << 8) /* Clock High Divisor */ --#define AT91_TWI_CKDIV (7 << 16) /* Clock Divider */ -- --#define AT91_TWI_SR 0x20 /* Status Register */ --#define AT91_TWI_TXCOMP (1 << 0) /* Transmission Complete */ --#define AT91_TWI_RXRDY (1 << 1) /* Receive Holding Register Ready */ --#define AT91_TWI_TXRDY (1 << 2) /* Transmit Holding Register Ready */ --#define AT91_TWI_OVRE (1 << 6) /* Overrun Error */ --#define AT91_TWI_UNRE (1 << 7) /* Underrun Error */ --#define AT91_TWI_NACK (1 << 8) /* Not Acknowledged */ -- --#define AT91_TWI_IER 0x24 /* Interrupt Enable Register */ --#define AT91_TWI_IDR 0x28 /* Interrupt Disable Register */ --#define AT91_TWI_IMR 0x2c /* Interrupt Mask Register */ --#define AT91_TWI_RHR 0x30 /* Receive Holding Register */ --#define AT91_TWI_THR 0x34 /* Transmit Holding Register */ -- --#endif -- -diff -urN -x CVS linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91rm9200_udp.h linux-2.6.19/include/asm-arm/arch-at91rm9200/at91rm9200_udp.h ---- linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91rm9200_udp.h Mon Dec 4 16:34:19 2006 -+++ linux-2.6.19/include/asm-arm/arch-at91rm9200/at91rm9200_udp.h Thu Jan 1 02:00:00 1970 -@@ -1,77 +0,0 @@ + #endif +diff -urN -x CVS linux-2.6.21/include/asm-arm/arch-at91/at91sam9263.h linux-2.6-stable/include/asm-arm/arch-at91/at91sam9263.h +--- linux-2.6.21/include/asm-arm/arch-at91/at91sam9263.h Thu Apr 26 05:08:32 2007 ++++ linux-2.6-stable/include/asm-arm/arch-at91/at91sam9263.h Tue May 8 12:56:33 2007 +@@ -119,13 +119,5 @@ + #define AT91SAM9263_DMAC_BASE 0x00800000 /* DMA Controller */ + #define AT91SAM9263_UHP_BASE 0x00a00000 /* USB Host controller */ + +-#if 0 -/* -- * include/asm-arm/arch-at91rm9200/at91rm9200_udp.h -- * -- * Copyright (C) 2005 Ivan Kokshaysky -- * Copyright (C) SAN People -- * -- * USB Device Port (UDP) registers. -- * Based on AT91RM9200 datasheet revision E. -- * -- * This program is free software; you can redistribute it and/or modify -- * it under the terms of the GNU General Public License as published by -- * the Free Software Foundation; either version 2 of the License, or -- * (at your option) any later version. +- * PIO pin definitions (peripheral A/B multiplexing). - */ - --#ifndef AT91RM9200_UDP_H --#define AT91RM9200_UDP_H -- --#define AT91_UDP_FRM_NUM 0x00 /* Frame Number Register */ --#define AT91_UDP_NUM (0x7ff << 0) /* Frame Number */ --#define AT91_UDP_FRM_ERR (1 << 16) /* Frame Error */ --#define AT91_UDP_FRM_OK (1 << 17) /* Frame OK */ -- --#define AT91_UDP_GLB_STAT 0x04 /* Global State Register */ --#define AT91_UDP_FADDEN (1 << 0) /* Function Address Enable */ --#define AT91_UDP_CONFG (1 << 1) /* Configured */ --#define AT91_UDP_ESR (1 << 2) /* Enable Send Resume */ --#define AT91_UDP_RSMINPR (1 << 3) /* Resume has been sent */ --#define AT91_UDP_RMWUPE (1 << 4) /* Remote Wake Up Enable */ -- --#define AT91_UDP_FADDR 0x08 /* Function Address Register */ --#define AT91_UDP_FADD (0x7f << 0) /* Function Address Value */ --#define AT91_UDP_FEN (1 << 8) /* Function Enable */ -- --#define AT91_UDP_IER 0x10 /* Interrupt Enable Register */ --#define AT91_UDP_IDR 0x14 /* Interrupt Disable Register */ --#define AT91_UDP_IMR 0x18 /* Interrupt Mask Register */ -- --#define AT91_UDP_ISR 0x1c /* Interrupt Status Register */ --#define AT91_UDP_EP(n) (1 << (n)) /* Endpoint Interrupt Status */ --#define AT91_UDP_RXSUSP (1 << 8) /* USB Suspend Interrupt Status */ --#define AT91_UDP_RXRSM (1 << 9) /* USB Resume Interrupt Status */ --#define AT91_UDP_EXTRSM (1 << 10) /* External Resume Interrupt Status */ --#define AT91_UDP_SOFINT (1 << 11) /* Start of Frame Interrupt Status */ --#define AT91_UDP_ENDBUSRES (1 << 12) /* End of Bus Reset Interrpt Status */ --#define AT91_UDP_WAKEUP (1 << 13) /* USB Wakeup Interrupt Status */ -- --#define AT91_UDP_ICR 0x20 /* Interrupt Clear Register */ --#define AT91_UDP_RST_EP 0x28 /* Reset Endpoint Register */ -- --#define AT91_UDP_CSR(n) (0x30 + ((n) * 4)) /* Endpoint Control/Status Registers 0-7 */ --#define AT91_UDP_TXCOMP (1 << 0) /* Generates IN packet with data previously written in DPR */ --#define AT91_UDP_RX_DATA_BK0 (1 << 1) /* Receive Data Bank 0 */ --#define AT91_UDP_RXSETUP (1 << 2) /* Send STALL to the host */ --#define AT91_UDP_STALLSENT (1 << 3) /* Stall Sent / Isochronous error (Isochronous endpoints) */ --#define AT91_UDP_TXPKTRDY (1 << 4) /* Transmit Packet Ready */ --#define AT91_UDP_FORCESTALL (1 << 5) /* Force Stall */ --#define AT91_UDP_RX_DATA_BK1 (1 << 6) /* Receive Data Bank 1 */ --#define AT91_UDP_DIR (1 << 7) /* Transfer Direction */ --#define AT91_UDP_EPTYPE (7 << 8) /* Endpoint Type */ --#define AT91_UDP_EPTYPE_CTRL (0 << 8) --#define AT91_UDP_EPTYPE_ISO_OUT (1 << 8) --#define AT91_UDP_EPTYPE_BULK_OUT (2 << 8) --#define AT91_UDP_EPTYPE_INT_OUT (3 << 8) --#define AT91_UDP_EPTYPE_ISO_IN (5 << 8) --#define AT91_UDP_EPTYPE_BULK_IN (6 << 8) --#define AT91_UDP_EPTYPE_INT_IN (7 << 8) --#define AT91_UDP_DTGLE (1 << 11) /* Data Toggle */ --#define AT91_UDP_EPEDS (1 << 15) /* Endpoint Enable/Disable */ --#define AT91_UDP_RXBYTECNT (0x7ff << 16) /* Number of bytes in FIFO */ -- --#define AT91_UDP_FDR(n) (0x50 + ((n) * 4)) /* Endpoint FIFO Data Registers 0-7 */ -- --#define AT91_UDP_TXVC 0x74 /* Transceiver Control Register */ --#define AT91_UDP_TXVC_TXVDIS (1 << 8) /* Transceiver Disable */ +-// TODO: Add - -#endif -diff -urN -x CVS linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91sam9260.h linux-2.6.19/include/asm-arm/arch-at91rm9200/at91sam9260.h ---- linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91sam9260.h Thu Jan 1 02:00:00 1970 -+++ linux-2.6.19/include/asm-arm/arch-at91rm9200/at91sam9260.h Wed Nov 15 08:54:30 2006 -@@ -0,0 +1,125 @@ + + #endif +diff -urN -x CVS linux-2.6.21/include/asm-arm/arch-at91/at91sam9rl.h linux-2.6-stable/include/asm-arm/arch-at91/at91sam9rl.h +--- linux-2.6.21/include/asm-arm/arch-at91/at91sam9rl.h Thu Jan 1 02:00:00 1970 ++++ linux-2.6-stable/include/asm-arm/arch-at91/at91sam9rl.h Fri May 11 14:53:48 2007 +@@ -0,0 +1,110 @@ +/* -+ * include/asm-arm/arch-at91rm9200/at91sam9260.h ++ * include/asm-arm/arch-at91/at91sam9260.h + * -+ * (C) 2006 Andrew Victor ++ * Copyright (C) 2007 Atmel Corporation + * + * Common definitions. -+ * Based on AT91SAM9260 datasheet revision A (Preliminary). ++ * Based on AT91SAM9RL datasheet revision A. (Preliminary) + * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file COPYING in the main directory of this archive for ++ * more details. + */ + -+#ifndef AT91SAM9260_H -+#define AT91SAM9260_H ++#ifndef AT91SAM9RL_H ++#define AT91SAM9RL_H + +/* + * Peripheral identifiers/interrupts. + */ +#define AT91_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */ -+#define AT91_ID_SYS 1 /* System Peripherals */ -+#define AT91SAM9260_ID_PIOA 2 /* Parallel IO Controller A */ -+#define AT91SAM9260_ID_PIOB 3 /* Parallel IO Controller B */ -+#define AT91SAM9260_ID_PIOC 4 /* Parallel IO Controller C */ -+#define AT91SAM9260_ID_ADC 5 /* Analog-to-Digital Converter */ -+#define AT91SAM9260_ID_US0 6 /* USART 0 */ -+#define AT91SAM9260_ID_US1 7 /* USART 1 */ -+#define AT91SAM9260_ID_US2 8 /* USART 2 */ -+#define AT91SAM9260_ID_MCI 9 /* Multimedia Card Interface */ -+#define AT91SAM9260_ID_UDP 10 /* USB Device Port */ -+#define AT91SAM9260_ID_TWI 11 /* Two-Wire Interface */ -+#define AT91SAM9260_ID_SPI0 12 /* Serial Peripheral Interface 0 */ -+#define AT91SAM9260_ID_SPI1 13 /* Serial Peripheral Interface 1 */ -+#define AT91SAM9260_ID_SSC 14 /* Serial Synchronous Controller */ -+#define AT91SAM9260_ID_TC0 17 /* Timer Counter 0 */ -+#define AT91SAM9260_ID_TC1 18 /* Timer Counter 1 */ -+#define AT91SAM9260_ID_TC2 19 /* Timer Counter 2 */ -+#define AT91SAM9260_ID_UHP 20 /* USB Host port */ -+#define AT91SAM9260_ID_EMAC 21 /* Ethernet */ -+#define AT91SAM9260_ID_ISI 22 /* Image Sensor Interface */ -+#define AT91SAM9260_ID_US3 23 /* USART 3 */ -+#define AT91SAM9260_ID_US4 24 /* USART 4 */ -+#define AT91SAM9260_ID_US5 25 /* USART 5 */ -+#define AT91SAM9260_ID_TC3 26 /* Timer Counter 3 */ -+#define AT91SAM9260_ID_TC4 27 /* Timer Counter 4 */ -+#define AT91SAM9260_ID_TC5 28 /* Timer Counter 5 */ -+#define AT91SAM9260_ID_IRQ0 29 /* Advanced Interrupt Controller (IRQ0) */ -+#define AT91SAM9260_ID_IRQ1 30 /* Advanced Interrupt Controller (IRQ1) */ -+#define AT91SAM9260_ID_IRQ2 31 /* Advanced Interrupt Controller (IRQ2) */ ++#define AT91_ID_SYS 1 /* System Controller */ ++#define AT91SAM9RL_ID_PIOA 2 /* Parallel IO Controller A */ ++#define AT91SAM9RL_ID_PIOB 3 /* Parallel IO Controller B */ ++#define AT91SAM9RL_ID_PIOC 4 /* Parallel IO Controller C */ ++#define AT91SAM9RL_ID_PIOD 5 /* Parallel IO Controller D */ ++#define AT91SAM9RL_ID_US0 6 /* USART 0 */ ++#define AT91SAM9RL_ID_US1 7 /* USART 1 */ ++#define AT91SAM9RL_ID_US2 8 /* USART 2 */ ++#define AT91SAM9RL_ID_US3 9 /* USART 3 */ ++#define AT91SAM9RL_ID_MCI 10 /* Multimedia Card Interface */ ++#define AT91SAM9RL_ID_TWI0 11 /* TWI 0 */ ++#define AT91SAM9RL_ID_TWI1 12 /* TWI 1 */ ++#define AT91SAM9RL_ID_SPI 13 /* Serial Peripheral Interface */ ++#define AT91SAM9RL_ID_SSC0 14 /* Serial Synchronous Controller 0 */ ++#define AT91SAM9RL_ID_SSC1 15 /* Serial Synchronous Controller 1 */ ++#define AT91SAM9RL_ID_TC0 16 /* Timer Counter 0 */ ++#define AT91SAM9RL_ID_TC1 17 /* Timer Counter 1 */ ++#define AT91SAM9RL_ID_TC2 18 /* Timer Counter 2 */ ++#define AT91SAM9RL_ID_PWMC 19 /* Pulse Width Modulation Controller */ ++#define AT91SAM9RL_ID_TSC 20 /* Touch Screen Controller */ ++#define AT91SAM9RL_ID_DMA 21 /* DMA Controller */ ++#define AT91SAM9RL_ID_UDPHS 22 /* USB Device HS */ ++#define AT91SAM9RL_ID_LCDC 23 /* LCD Controller */ ++#define AT91SAM9RL_ID_AC97C 24 /* AC97 Controller */ ++#define AT91SAM9RL_ID_IRQ0 31 /* Advanced Interrupt Controller (IRQ0) */ + + +/* + * User Peripheral physical base addresses. + */ -+#define AT91SAM9260_BASE_TCB0 0xfffa0000 -+#define AT91SAM9260_BASE_TC0 0xfffa0000 -+#define AT91SAM9260_BASE_TC1 0xfffa0040 -+#define AT91SAM9260_BASE_TC2 0xfffa0080 -+#define AT91SAM9260_BASE_UDP 0xfffa4000 -+#define AT91SAM9260_BASE_MCI 0xfffa8000 -+#define AT91SAM9260_BASE_TWI 0xfffac000 -+#define AT91SAM9260_BASE_US0 0xfffb0000 -+#define AT91SAM9260_BASE_US1 0xfffb4000 -+#define AT91SAM9260_BASE_US2 0xfffb8000 -+#define AT91SAM9260_BASE_SSC 0xfffbc000 -+#define AT91SAM9260_BASE_ISI 0xfffc0000 -+#define AT91SAM9260_BASE_EMAC 0xfffc4000 -+#define AT91SAM9260_BASE_SPI0 0xfffc8000 -+#define AT91SAM9260_BASE_SPI1 0xfffcc000 -+#define AT91SAM9260_BASE_US3 0xfffd0000 -+#define AT91SAM9260_BASE_US4 0xfffd4000 -+#define AT91SAM9260_BASE_US5 0xfffd8000 -+#define AT91SAM9260_BASE_TCB1 0xfffdc000 -+#define AT91SAM9260_BASE_TC3 0xfffdc000 -+#define AT91SAM9260_BASE_TC4 0xfffdc040 -+#define AT91SAM9260_BASE_TC5 0xfffdc080 -+#define AT91SAM9260_BASE_ADC 0xfffe0000 -+#define AT91_BASE_SYS 0xffffe800 ++#define AT91SAM9RL_BASE_TCB0 0xfffa0000 ++#define AT91SAM9RL_BASE_TC0 0xfffa0000 ++#define AT91SAM9RL_BASE_TC1 0xfffa0040 ++#define AT91SAM9RL_BASE_TC2 0xfffa0080 ++#define AT91SAM9RL_BASE_MCI 0xfffa4000 ++#define AT91SAM9RL_BASE_TWI0 0xfffa8000 ++#define AT91SAM9RL_BASE_TWI1 0xfffac000 ++#define AT91SAM9RL_BASE_US0 0xfffb0000 ++#define AT91SAM9RL_BASE_US1 0xfffb4000 ++#define AT91SAM9RL_BASE_US2 0xfffb8000 ++#define AT91SAM9RL_BASE_US3 0xfffbc000 ++#define AT91SAM9RL_BASE_SSC0 0xfffc0000 ++#define AT91SAM9RL_BASE_SSC1 0xfffc4000 ++#define AT91SAM9RL_BASE_PWMC 0xfffc8000 ++#define AT91SAM9RL_BASE_SPI 0xfffcc000 ++#define AT91SAM9RL_BASE_TSC 0xfffd0000 ++#define AT91SAM9RL_BASE_UDPHS 0xfffd4000 ++#define AT91SAM9RL_BASE_AC97C 0xfffd8000 ++#define AT91_BASE_SYS 0xffffc000 ++ + +/* + * System Peripherals (offset from AT91_BASE_SYS) + */ ++#define AT91_DMA (0xffffe600 - AT91_BASE_SYS) +#define AT91_ECC (0xffffe800 - AT91_BASE_SYS) +#define AT91_SDRAMC (0xffffea00 - AT91_BASE_SYS) +#define AT91_SMC (0xffffec00 - AT91_BASE_SYS) @@ -17840,64 +9503,58 @@ diff -urN -x CVS linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91sam9260. +#define AT91_PIOA (0xfffff400 - AT91_BASE_SYS) +#define AT91_PIOB (0xfffff600 - AT91_BASE_SYS) +#define AT91_PIOC (0xfffff800 - AT91_BASE_SYS) ++#define AT91_PIOD (0xfffffa00 - AT91_BASE_SYS) +#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) +#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) +#define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS) +#define AT91_RTT (0xfffffd20 - AT91_BASE_SYS) +#define AT91_PIT (0xfffffd30 - AT91_BASE_SYS) +#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) -+#define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS) ++#define AT91_SCKCR (0xfffffd50 - AT91_BASE_SYS) ++#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS) ++#define AT91_RTC (0xfffffe00 - AT91_BASE_SYS) + + +/* + * Internal Memory. + */ -+#define AT91SAM9260_ROM_BASE 0x00100000 /* Internal ROM base address */ -+#define AT91SAM9260_ROM_SIZE SZ_32K /* Internal ROM size (32Kb) */ -+ -+#define AT91SAM9260_SRAM0_BASE 0x00200000 /* Internal SRAM 0 base address */ -+#define AT91SAM9260_SRAM0_SIZE SZ_4K /* Internal SRAM 0 size (4Kb) */ -+#define AT91SAM9260_SRAM1_BASE 0x00300000 /* Internal SRAM 1 base address */ -+#define AT91SAM9260_SRAM1_SIZE SZ_4K /* Internal SRAM 1 size (4Kb) */ -+ -+#define AT91SAM9260_UHP_BASE 0x00500000 /* USB Host controller */ -+ -+#if 0 -+/* -+ * PIO pin definitions (peripheral A/B multiplexing). -+ */ ++#define AT91SAM9RL_SRAM_BASE 0x00300000 /* Internal SRAM base address */ ++#define AT91SAM9RL_SRAM_SIZE SZ_16K /* Internal SRAM size (16Kb) */ + -+// TODO: Add ++#define AT91SAM9RL_ROM_BASE 0x00400000 /* Internal ROM base address */ ++#define AT91SAM9RL_ROM_SIZE (2 * SZ_16K) /* Internal ROM size (32Kb) */ + -+#endif ++#define AT91SAM9RL_LCDC_BASE 0x00500000 /* LCD Controller */ ++#define AT91SAM9RL_UDPHS_BASE 0x00600000 /* USB Device HS controller */ + +#endif -diff -urN -x CVS linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91sam9260_matrix.h linux-2.6.19/include/asm-arm/arch-at91rm9200/at91sam9260_matrix.h ---- linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91sam9260_matrix.h Thu Jan 1 02:00:00 1970 -+++ linux-2.6.19/include/asm-arm/arch-at91rm9200/at91sam9260_matrix.h Thu Nov 23 17:05:07 2006 -@@ -0,0 +1,78 @@ +diff -urN -x CVS linux-2.6.21/include/asm-arm/arch-at91/at91sam9rl_matrix.h linux-2.6-stable/include/asm-arm/arch-at91/at91sam9rl_matrix.h +--- linux-2.6.21/include/asm-arm/arch-at91/at91sam9rl_matrix.h Thu Jan 1 02:00:00 1970 ++++ linux-2.6-stable/include/asm-arm/arch-at91/at91sam9rl_matrix.h Fri May 11 16:18:45 2007 +@@ -0,0 +1,96 @@ +/* -+ * include/asm-arm/arch-at91rm9200/at91sam9260_matrix.h ++ * include/asm-arm/arch-at91/at91sam9rl_matrix.h ++ * ++ * Copyright (C) 2007 Atmel Corporation + * + * Memory Controllers (MATRIX, EBI) - System peripherals registers. -+ * Based on AT91SAM9260 datasheet revision B. ++ * Based on AT91SAM9RL datasheet revision A. (Preliminary) + * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file COPYING in the main directory of this archive for ++ * more details. + */ + -+#ifndef AT91SAM9260_MATRIX_H -+#define AT91SAM9260_MATRIX_H ++#ifndef AT91SAM9RL_MATRIX_H ++#define AT91SAM9RL_MATRIX_H + +#define AT91_MATRIX_MCFG0 (AT91_MATRIX + 0x00) /* Master Configuration Register 0 */ +#define AT91_MATRIX_MCFG1 (AT91_MATRIX + 0x04) /* Master Configuration Register 1 */ +#define AT91_MATRIX_MCFG2 (AT91_MATRIX + 0x08) /* Master Configuration Register 2 */ +#define AT91_MATRIX_MCFG3 (AT91_MATRIX + 0x0C) /* Master Configuration Register 3 */ +#define AT91_MATRIX_MCFG4 (AT91_MATRIX + 0x10) /* Master Configuration Register 4 */ -+#define AT91_MATRIX_MCFG5 (AT91_MATRIX + 0x04) /* Master Configuration Register 5 */ -+#define AT91_MATRIX_ULBT (7 << 0) /* Undefined Length Burst Type */ ++#define AT91_MATRIX_MCFG5 (AT91_MATRIX + 0x14) /* Master Configuration Register 5 */ ++#define AT91_MATRIX_ULBT (7 << 0) /* Undefined Length Burst Type */ +#define AT91_MATRIX_ULBT_INFINITE (0 << 0) +#define AT91_MATRIX_ULBT_SINGLE (1 << 0) +#define AT91_MATRIX_ULBT_FOUR (2 << 0) @@ -17909,7 +9566,8 @@ diff -urN -x CVS linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91sam9260_ +#define AT91_MATRIX_SCFG2 (AT91_MATRIX + 0x48) /* Slave Configuration Register 2 */ +#define AT91_MATRIX_SCFG3 (AT91_MATRIX + 0x4C) /* Slave Configuration Register 3 */ +#define AT91_MATRIX_SCFG4 (AT91_MATRIX + 0x50) /* Slave Configuration Register 4 */ -+#define AT91_MATRIX_SLOT_CYCLE (0xff << 0) /* Maximum Number of Allowed Cycles for a Burst */ ++#define AT91_MATRIX_SCFG5 (AT91_MATRIX + 0x54) /* Slave Configuration Register 5 */ ++#define AT91_MATRIX_SLOT_CYCLE (0xff << 0) /* Maximum Number of Allowed Cycles for a Burst */ +#define AT91_MATRIX_DEFMSTR_TYPE (3 << 16) /* Default Master Type */ +#define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16) +#define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16) @@ -17924,6 +9582,7 @@ diff -urN -x CVS linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91sam9260_ +#define AT91_MATRIX_PRAS2 (AT91_MATRIX + 0x90) /* Priority Register A for Slave 2 */ +#define AT91_MATRIX_PRAS3 (AT91_MATRIX + 0x98) /* Priority Register A for Slave 3 */ +#define AT91_MATRIX_PRAS4 (AT91_MATRIX + 0xA0) /* Priority Register A for Slave 4 */ ++#define AT91_MATRIX_PRAS5 (AT91_MATRIX + 0xA8) /* Priority Register A for Slave 5 */ +#define AT91_MATRIX_M0PR (3 << 0) /* Master 0 Priority */ +#define AT91_MATRIX_M1PR (3 << 4) /* Master 1 Priority */ +#define AT91_MATRIX_M2PR (3 << 8) /* Master 2 Priority */ @@ -17934,373 +9593,25 @@ diff -urN -x CVS linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91sam9260_ +#define AT91_MATRIX_MRCR (AT91_MATRIX + 0x100) /* Master Remap Control Register */ +#define AT91_MATRIX_RCB0 (1 << 0) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */ +#define AT91_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */ ++#define AT91_MATRIX_RCB2 (1 << 2) ++#define AT91_MATRIX_RCB3 (1 << 3) ++#define AT91_MATRIX_RCB4 (1 << 4) ++#define AT91_MATRIX_RCB5 (1 << 5) + -+#define AT91_MATRIX_EBICSA (AT91_MATRIX + 0x11C) /* EBI Chip Select Assignment Register */ -+#define AT91_MATRIX_CS1A (1 << 1) /* Chip Select 1 Assignment */ -+#define AT91_MATRIX_CS1A_SMC (0 << 1) -+#define AT91_MATRIX_CS1A_SDRAMC (1 << 1) -+#define AT91_MATRIX_CS3A (1 << 3) /* Chip Select 3 Assignment */ -+#define AT91_MATRIX_CS3A_SMC (0 << 3) -+#define AT91_MATRIX_CS3A_SMC_SMARTMEDIA (1 << 3) -+#define AT91_MATRIX_CS4A (1 << 4) /* Chip Select 4 Assignment */ -+#define AT91_MATRIX_CS4A_SMC (0 << 4) -+#define AT91_MATRIX_CS4A_SMC_CF1 (1 << 4) -+#define AT91_MATRIX_CS5A (1 << 5 ) /* Chip Select 5 Assignment */ -+#define AT91_MATRIX_CS5A_SMC (0 << 5) -+#define AT91_MATRIX_CS5A_SMC_CF2 (1 << 5) -+#define AT91_MATRIX_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */ -+#define AT91_MATRIX_VDDIOMSEL (1 << 16) /* Memory voltage selection */ -+#define AT91_MATRIX_VDDIOMSEL_1_8V (0 << 16) -+#define AT91_MATRIX_VDDIOMSEL_3_3V (1 << 16) -+ -+#endif -diff -urN -x CVS linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91sam9261.h linux-2.6.19/include/asm-arm/arch-at91rm9200/at91sam9261.h ---- linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91sam9261.h Thu Jan 1 02:00:00 1970 -+++ linux-2.6.19/include/asm-arm/arch-at91rm9200/at91sam9261.h Fri Nov 10 10:08:55 2006 -@@ -0,0 +1,292 @@ -+/* -+ * include/asm-arm/arch-at91rm9200/at91sam9261.h -+ * -+ * Copyright (C) SAN People -+ * -+ * Common definitions. -+ * Based on AT91SAM9261 datasheet revision E. (Preliminary) -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ */ -+ -+#ifndef AT91SAM9261_H -+#define AT91SAM9261_H -+ -+/* -+ * Peripheral identifiers/interrupts. -+ */ -+#define AT91_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */ -+#define AT91_ID_SYS 1 /* System Peripherals */ -+#define AT91SAM9261_ID_PIOA 2 /* Parallel IO Controller A */ -+#define AT91SAM9261_ID_PIOB 3 /* Parallel IO Controller B */ -+#define AT91SAM9261_ID_PIOC 4 /* Parallel IO Controller C */ -+#define AT91SAM9261_ID_US0 6 /* USART 0 */ -+#define AT91SAM9261_ID_US1 7 /* USART 1 */ -+#define AT91SAM9261_ID_US2 8 /* USART 2 */ -+#define AT91SAM9261_ID_MCI 9 /* Multimedia Card Interface */ -+#define AT91SAM9261_ID_UDP 10 /* USB Device Port */ -+#define AT91SAM9261_ID_TWI 11 /* Two-Wire Interface */ -+#define AT91SAM9261_ID_SPI0 12 /* Serial Peripheral Interface 0 */ -+#define AT91SAM9261_ID_SPI1 13 /* Serial Peripheral Interface 1 */ -+#define AT91SAM9261_ID_SSC0 14 /* Serial Synchronous Controller 0 */ -+#define AT91SAM9261_ID_SSC1 15 /* Serial Synchronous Controller 1 */ -+#define AT91SAM9261_ID_SSC2 16 /* Serial Synchronous Controller 2 */ -+#define AT91SAM9261_ID_TC0 17 /* Timer Counter 0 */ -+#define AT91SAM9261_ID_TC1 18 /* Timer Counter 1 */ -+#define AT91SAM9261_ID_TC2 19 /* Timer Counter 2 */ -+#define AT91SAM9261_ID_UHP 20 /* USB Host port */ -+#define AT91SAM9261_ID_LCDC 21 /* LDC Controller */ -+#define AT91SAM9261_ID_IRQ0 29 /* Advanced Interrupt Controller (IRQ0) */ -+#define AT91SAM9261_ID_IRQ1 30 /* Advanced Interrupt Controller (IRQ1) */ -+#define AT91SAM9261_ID_IRQ2 31 /* Advanced Interrupt Controller (IRQ2) */ -+ -+ -+/* -+ * User Peripheral physical base addresses. -+ */ -+#define AT91SAM9261_BASE_TCB0 0xfffa0000 -+#define AT91SAM9261_BASE_TC0 0xfffa0000 -+#define AT91SAM9261_BASE_TC1 0xfffa0040 -+#define AT91SAM9261_BASE_TC2 0xfffa0080 -+#define AT91SAM9261_BASE_UDP 0xfffa4000 -+#define AT91SAM9261_BASE_MCI 0xfffa8000 -+#define AT91SAM9261_BASE_TWI 0xfffac000 -+#define AT91SAM9261_BASE_US0 0xfffb0000 -+#define AT91SAM9261_BASE_US1 0xfffb4000 -+#define AT91SAM9261_BASE_US2 0xfffb8000 -+#define AT91SAM9261_BASE_SSC0 0xfffbc000 -+#define AT91SAM9261_BASE_SSC1 0xfffc0000 -+#define AT91SAM9261_BASE_SSC2 0xfffc4000 -+#define AT91SAM9261_BASE_SPI0 0xfffc8000 -+#define AT91SAM9261_BASE_SPI1 0xfffcc000 -+#define AT91_BASE_SYS 0xffffea00 -+ -+ -+/* -+ * System Peripherals (offset from AT91_BASE_SYS) -+ */ -+#define AT91_SDRAMC (0xffffea00 - AT91_BASE_SYS) -+#define AT91_SMC (0xffffec00 - AT91_BASE_SYS) -+#define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS) -+#define AT91_AIC (0xfffff000 - AT91_BASE_SYS) -+#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS) -+#define AT91_PIOA (0xfffff400 - AT91_BASE_SYS) -+#define AT91_PIOB (0xfffff600 - AT91_BASE_SYS) -+#define AT91_PIOC (0xfffff800 - AT91_BASE_SYS) -+#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) -+#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) -+#define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS) -+#define AT91_RTT (0xfffffd20 - AT91_BASE_SYS) -+#define AT91_PIT (0xfffffd30 - AT91_BASE_SYS) -+#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) -+#define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS) -+ -+ -+/* -+ * Internal Memory. -+ */ -+#define AT91SAM9261_SRAM_BASE 0x00300000 /* Internal SRAM base address */ -+#define AT91SAM9261_SRAM_SIZE 0x00028000 /* Internal SRAM size (160Kb) */ -+ -+#define AT91SAM9261_ROM_BASE 0x00400000 /* Internal ROM base address */ -+#define AT91SAM9261_ROM_SIZE SZ_32K /* Internal ROM size (32Kb) */ -+ -+#define AT91SAM9261_UHP_BASE 0x00500000 /* USB Host controller */ -+#define AT91SAM9261_LCDC_BASE 0x00600000 /* LDC controller */ -+ -+ -+#if 0 -+/* -+ * PIO pin definitions (peripheral A/B multiplexing). -+ */ -+#define AT91_PA0_SPI0_MISO (1 << 0) /* A: SPI0 Master In Slave */ -+#define AT91_PA0_MCDA0 (1 << 0) /* B: Multimedia Card A Data 0 */ -+#define AT91_PA1_SPI0_MOSI (1 << 1) /* A: SPI0 Master Out Slave */ -+#define AT91_PA1_MCCDA (1 << 1) /* B: Multimedia Card A Command */ -+#define AT91_PA2_SPI0_SPCK (1 << 2) /* A: SPI0 Serial Clock */ -+#define AT91_PA2_MCCK (1 << 2) /* B: Multimedia Card Clock */ -+#define AT91_PA3_SPI0_NPCS0 (1 << 3) /* A: SPI0 Peripheral Chip Select 0 */ -+#define AT91_PA4_SPI0_NPCS1 (1 << 4) /* A: SPI0 Peripheral Chip Select 1 */ -+#define AT91_PA4_MCDA1 (1 << 4) /* B: Multimedia Card A Data 1 */ -+#define AT91_PA5_SPI0_NPCS2 (1 << 5) /* A: SPI0 Peripheral Chip Select 2 */ -+#define AT91_PA5_MCDA2 (1 << 5) /* B: Multimedia Card A Data 2 */ -+#define AT91_PA6_SPI0_NPCS3 (1 << 6) /* A: SPI0 Peripheral Chip Select 3 */ -+#define AT91_PA6_MCDA3 (1 << 6) /* B: Multimedia Card A Data 3 */ -+#define AT91_PA7_TWD (1 << 7) /* A: TWI Two-wire Serial Data */ -+#define AT91_PA7_PCK0 (1 << 7) /* B: PMC Programmable clock Output 0 */ -+#define AT91_PA8_TWCK (1 << 8) /* A: TWI Two-wire Serial Clock */ -+#define AT91_PA8_PCK1 (1 << 8) /* B: PMC Programmable clock Output 1 */ -+#define AT91_PA9_DRXD (1 << 9) /* A: DBGU Debug Receive Data */ -+#define AT91_PA9_PCK2 (1 << 9) /* B: PMC Programmable clock Output 2 */ -+#define AT91_PA10_DTXD (1 << 10) /* A: DBGU Debug Transmit Data */ -+#define AT91_PA10_PCK3 (1 << 10) /* B: PMC Programmable clock Output 3 */ -+#define AT91_PA11_TSYNC (1 << 11) /* A: Trace Synchronization Signal */ -+#define AT91_PA11_SCK1 (1 << 11) /* B: USART1 Serial Clock */ -+#define AT91_PA12_TCLK (1 << 12) /* A: Trace Clock */ -+#define AT91_PA12_RTS1 (1 << 12) /* B: USART1 Ready To Send */ -+#define AT91_PA13_TPS0 (1 << 13) /* A: Trace ARM Pipeline Status 0 */ -+#define AT91_PA13_CTS1 (1 << 13) /* B: USART1 Clear To Send */ -+#define AT91_PA14_TPS1 (1 << 14) /* A: Trace ARM Pipeline Status 1 */ -+#define AT91_PA14_SCK2 (1 << 14) /* B: USART2 Serial Clock */ -+#define AT91_PA15_TPS2 (1 << 15) /* A: Trace ARM Pipeline Status 2 */ -+#define AT91_PA15_RTS2 (1 << 15) /* B: USART2 Ready To Send */ -+#define AT91_PA16_TPK0 (1 << 16) /* A: Trace Packet Port 0 */ -+#define AT91_PA16_CTS2 (1 << 16) /* B: USART2 Clear To Send */ -+#define AT91_PA17_TPK1 (1 << 17) /* A: Trace Packet Port 1 */ -+#define AT91_PA17_TF1 (1 << 17) /* B: SSC1 Transmit Frame Sync */ -+#define AT91_PA18_TPK2 (1 << 18) /* A: Trace Packet Port 2 */ -+#define AT91_PA18_TK1 (1 << 18) /* B: SSC1 Transmit Clock */ -+#define AT91_PA19_TPK3 (1 << 19) /* A: Trace Packet Port 3 */ -+#define AT91_PA19_TD1 (1 << 19) /* B: SSC1 Transmit Data */ -+#define AT91_PA20_TPK4 (1 << 20) /* A: Trace Packet Port 4 */ -+#define AT91_PA20_RD1 (1 << 20) /* B: SSC1 Receive Data */ -+#define AT91_PA21_TPK5 (1 << 21) /* A: Trace Packet Port 5 */ -+#define AT91_PA21_RK1 (1 << 21) /* B: SSC1 Receive Clock */ -+#define AT91_PA22_TPK6 (1 << 22) /* A: Trace Packet Port 6 */ -+#define AT91_PA22_RF1 (1 << 22) /* B: SSC1 Receive Frame Sync */ -+#define AT91_PA23_TPK7 (1 << 23) /* A: Trace Packet Port 7 */ -+#define AT91_PA23_RTS0 (1 << 23) /* B: USART0 Ready To Send */ -+#define AT91_PA24_TPK8 (1 << 24) /* A: Trace Packet Port 8 */ -+#define AT91_PA24_SPI1_NPCS1 (1 << 24) /* B: SPI1 Peripheral Chip Select 1 */ -+#define AT91_PA25_TPK9 (1 << 25) /* A: Trace Packet Port 9 */ -+#define AT91_PA25_SPI1_NPCS2 (1 << 25) /* B: SPI1 Peripheral Chip Select 2 */ -+#define AT91_PA26_TPK10 (1 << 26) /* A: Trace Packet Port 10 */ -+#define AT91_PA26_SPI1_NPCS3 (1 << 26) /* B: SPI1 Peripheral Chip Select 3 */ -+#define AT91_PA27_TPK11 (1 << 27) /* A: Trace Packet Port 11 */ -+#define AT91_PA27_SPI0_NPCS1 (1 << 27) /* B: SPI0 Peripheral Chip Select 1 */ -+#define AT91_PA28_TPK12 (1 << 28) /* A: Trace Packet Port 12 */ -+#define AT91_PA28_SPI0_NPCS2 (1 << 28) /* B: SPI0 Peripheral Chip Select 2 */ -+#define AT91_PA29_TPK13 (1 << 29) /* A: Trace Packet Port 13 */ -+#define AT91_PA29_SPI0_NPCS3 (1 << 29) /* B: SPI0 Peripheral Chip Select 3 */ -+#define AT91_PA30_TPK14 (1 << 30) /* A: Trace Packet Port 14 */ -+#define AT91_PA30_A23 (1 << 30) /* B: Address Bus bit 23 */ -+#define AT91_PA31_TPK15 (1 << 31) /* A: Trace Packet Port 15 */ -+#define AT91_PA31_A24 (1 << 31) /* B: Address Bus bit 24 */ -+ -+#define AT91_PB0_LCDVSYNC (1 << 0) /* A: LCD Vertical Synchronization */ -+#define AT91_PB1_LCDHSYNC (1 << 1) /* A: LCD Horizontal Synchronization */ -+#define AT91_PB2_LCDDOTCK (1 << 2) /* A: LCD Dot Clock */ -+#define AT91_PB2_PCK0 (1 << 2) /* B: PMC Programmable clock Output 0 */ -+#define AT91_PB3_LCDDEN (1 << 3) /* A: LCD Data Enable */ -+#define AT91_PB4_LCDCC (1 << 4) /* A: LCD Contrast Control */ -+#define AT91_PB4_LCDD2 (1 << 4) /* B: LCD Data Bus Bit 2 */ -+#define AT91_PB5_LCDD0 (1 << 5) /* A: LCD Data Bus Bit 0 */ -+#define AT91_PB5_LCDD3 (1 << 5) /* B: LCD Data Bus Bit 3 */ -+#define AT91_PB6_LCDD1 (1 << 6) /* A: LCD Data Bus Bit 1 */ -+#define AT91_PB6_LCDD4 (1 << 6) /* B: LCD Data Bus Bit 4 */ -+#define AT91_PB7_LCDD2 (1 << 7) /* A: LCD Data Bus Bit 2 */ -+#define AT91_PB7_LCDD5 (1 << 7) /* B: LCD Data Bus Bit 5 */ -+#define AT91_PB8_LCDD3 (1 << 8) /* A: LCD Data Bus Bit 3 */ -+#define AT91_PB8_LCDD6 (1 << 8) /* B: LCD Data Bus Bit 6 */ -+#define AT91_PB9_LCDD4 (1 << 9) /* A: LCD Data Bus Bit 4 */ -+#define AT91_PB9_LCDD7 (1 << 9) /* B: LCD Data Bus Bit 7 */ -+#define AT91_PB10_LCDD5 (1 << 10) /* A: LCD Data Bus Bit 5 */ -+#define AT91_PB10_LCDD10 (1 << 10) /* B: LCD Data Bus Bit 10 */ -+#define AT91_PB11_LCDD6 (1 << 11) /* A: LCD Data Bus Bit 6 */ -+#define AT91_PB11_LCDD11 (1 << 11) /* B: LCD Data Bus Bit 11 */ -+#define AT91_PB12_LCDD7 (1 << 12) /* A: LCD Data Bus Bit 7 */ -+#define AT91_PB12_LCDD12 (1 << 12) /* B: LCD Data Bus Bit 12 */ -+#define AT91_PB13_LCDD8 (1 << 13) /* A: LCD Data Bus Bit 8 */ -+#define AT91_PB13_LCDD13 (1 << 13) /* B: LCD Data Bus Bit 13 */ -+#define AT91_PB14_LCDD9 (1 << 14) /* A: LCD Data Bus Bit 9 */ -+#define AT91_PB14_LCDD14 (1 << 14) /* B: LCD Data Bus Bit 14 */ -+#define AT91_PB15_LCDD10 (1 << 15) /* A: LCD Data Bus Bit 10 */ -+#define AT91_PB15_LCDD15 (1 << 15) /* B: LCD Data Bus Bit 15 */ -+#define AT91_PB16_LCDD11 (1 << 16) /* A: LCD Data Bus Bit 11 */ -+#define AT91_PB16_LCDD19 (1 << 16) /* B: LCD Data Bus Bit 19 */ -+#define AT91_PB17_LCDD12 (1 << 17) /* A: LCD Data Bus Bit 12 */ -+#define AT91_PB17_LCDD20 (1 << 17) /* B: LCD Data Bus Bit 20 */ -+#define AT91_PB18_LCDD13 (1 << 18) /* A: LCD Data Bus Bit 13 */ -+#define AT91_PB18_LCDD21 (1 << 18) /* B: LCD Data Bus Bit 21 */ -+#define AT91_PB19_LCDD14 (1 << 19) /* A: LCD Data Bus Bit 14 */ -+#define AT91_PB19_LCDD22 (1 << 19) /* B: LCD Data Bus Bit 22 */ -+#define AT91_PB20_LCDD15 (1 << 20) /* A: LCD Data Bus Bit 15 */ -+#define AT91_PB20_LCDD23 (1 << 20) /* B: LCD Data Bus Bit 23 */ -+#define AT91_PB21_TF0 (1 << 21) /* A: SSC0 Transmit Frame Sync */ -+#define AT91_PB21_LCDD16 (1 << 21) /* B: LCD Data Bus Bit 16 */ -+#define AT91_PB22_TK0 (1 << 22) /* A: SSC0 Transmit Clock */ -+#define AT91_PB22_LCDD17 (1 << 22) /* B: LCD Data Bus Bit 17 */ -+#define AT91_PB23_TD0 (1 << 23) /* A: SSC0 Transmit Data */ -+#define AT91_PB23_LCDD18 (1 << 23) /* B: LCD Data Bus Bit 18 */ -+#define AT91_PB24_RD0 (1 << 24) /* A: SSC0 Receive Data */ -+#define AT91_PB24_LCDD19 (1 << 24) /* B: LCD Data Bus Bit 19 */ -+#define AT91_PB25_RK0 (1 << 25) /* A: SSC0 Receive Clock */ -+#define AT91_PB25_LCDD20 (1 << 25) /* B: LCD Data Bus Bit 20 */ -+#define AT91_PB26_RF0 (1 << 26) /* A: SSC0 Receive Frame Sync */ -+#define AT91_PB26_LCDD21 (1 << 26) /* B: LCD Data Bus Bit 21 */ -+#define AT91_PB27_SPI1_NPCS1 (1 << 27) /* A: SPI1 Peripheral Chip Select 1 */ -+#define AT91_PB27_LCDD22 (1 << 27) /* B: LCD Data Bus Bit 22 */ -+#define AT91_PB28_SPI1_NPCS0 (1 << 28) /* A: SPI1 Peripheral Chip Select 0 */ -+#define AT91_PB28_LCDD23 (1 << 28) /* B: LCD Data Bus Bit 23 */ -+#define AT91_PB29_SPI1_SPCK (1 << 29) /* A: SPI1 Serial Clock */ -+#define AT91_PB29_IRQ2 (1 << 29) /* B: Interrupt input 2 */ -+#define AT91_PB30_SPI1_MISO (1 << 30) /* A: SPI1 Master In Slave */ -+#define AT91_PB30_IRQ1 (1 << 30) /* B: Interrupt input 1 */ -+#define AT91_PB31_SPI1_MOSI (1 << 31) /* A: SPI1 Master Out Slave */ -+#define AT91_PB31_PCK2 (1 << 31) /* B: PMC Programmable clock Output 2 */ -+ -+#define AT91_PC0_SMOE (1 << 0) /* A: SmartMedia Output Enable */ -+#define AT91_PC0_NCS6 (1 << 0) /* B: Chip Select 6 */ -+#define AT91_PC1_SMWE (1 << 1) /* A: SmartMedia Write Enable */ -+#define AT91_PC1_NCS7 (1 << 1) /* B: Chip Select 7 */ -+#define AT91_PC2_NWAIT (1 << 2) /* A: NWAIT */ -+#define AT91_PC2_IRQ0 (1 << 2) /* B: Interrupt input 0 */ -+#define AT91_PC3_A25_CFRNW (1 << 3) /* A: Address Bus[25] / Compact Flash Read Not Write */ -+#define AT91_PC4_NCS4_CFCS0 (1 << 4) /* A: Chip Select 4 / CompactFlash Chip Select 0 */ -+#define AT91_PC5_NCS5_CFCS1 (1 << 5) /* A: Chip Select 5 / CompactFlash Chip Select 1 */ -+#define AT91_PC6_CFCE1 (1 << 6) /* A: CompactFlash Chip Enable 1 */ -+#define AT91_PC7_CFCE2 (1 << 7) /* A: CompactFlash Chip Enable 2 */ -+#define AT91_PC8_TXD0 (1 << 8) /* A: USART0 Transmit Data */ -+#define AT91_PC8_PCK2 (1 << 8) /* B: PMC Programmable clock Output 2 */ -+#define AT91_PC9_RXD0 (1 << 9) /* A: USART0 Receive Data */ -+#define AT91_PC9_PCK3 (1 << 9) /* B: PMC Programmable clock Output 3 */ -+#define AT91_PC10_RTS0 (1 << 10) /* A: USART0 Ready To Send */ -+#define AT91_PC10_SCK0 (1 << 10) /* B: USART0 Serial Clock */ -+#define AT91_PC11_CTS0 (1 << 11) /* A: USART0 Clear To Send */ -+#define AT91_PC11_FIQ (1 << 11) /* B: AIC Fast Interrupt Input */ -+#define AT91_PC12_TXD1 (1 << 12) /* A: USART1 Transmit Data */ -+#define AT91_PC12_NCS6 (1 << 12) /* B: Chip Select 6 */ -+#define AT91_PC13_RXD1 (1 << 13) /* A: USART1 Receive Data */ -+#define AT91_PC13_NCS7 (1 << 13) /* B: Chip Select 7 */ -+#define AT91_PC14_TXD2 (1 << 14) /* A: USART2 Transmit Data */ -+#define AT91_PC14_SPI1_NPCS2 (1 << 14) /* B: SPI1 Peripheral Chip Select 2 */ -+#define AT91_PC15_RXD2 (1 << 15) /* A: USART2 Receive Data */ -+#define AT91_PC15_SPI1_NPCS3 (1 << 15) /* B: SPI1 Peripheral Chip Select 3 */ -+#define AT91_PC16_D16 (1 << 16) /* A: Data Bus [16] */ -+#define AT91_PC16_TCLK0 (1 << 16) /* B: Timer Counter 0 external clock input */ -+#define AT91_PC17_D17 (1 << 17) /* A: Data Bus [17] */ -+#define AT91_PC17_TCLK1 (1 << 17) /* B: Timer Counter 1 external clock input */ -+#define AT91_PC18_D18 (1 << 18) /* A: Data Bus [18] */ -+#define AT91_PC18_TCLK2 (1 << 18) /* B: Timer Counter 2 external clock input */ -+#define AT91_PC19_D19 (1 << 19) /* A: Data Bus [19] */ -+#define AT91_PC19_TIOA0 (1 << 19) /* B: Timer Counter 0 Multipurpose Timer I/O Pin A */ -+#define AT91_PC20_D20 (1 << 20) /* A: Data Bus [20] */ -+#define AT91_PC20_TIOB0 (1 << 20) /* B: Timer Counter 0 Multipurpose Timer I/O Pin B */ -+#define AT91_PC21_D21 (1 << 21) /* A: Data Bus [21] */ -+#define AT91_PC21_TIOA1 (1 << 21) /* B: Timer Counter 1 Multipurpose Timer I/O Pin A */ -+#define AT91_PC22_D22 (1 << 22) /* A: Data Bus [22] */ -+#define AT91_PC22_TIOB1 (1 << 22) /* B: Timer Counter 1 Multipurpose Timer I/O Pin B */ -+#define AT91_PC23_D23 (1 << 23) /* A: Data Bus [23] */ -+#define AT91_PC23_TIOA2 (1 << 23) /* B: Timer Counter 2 Multipurpose Timer I/O Pin A */ -+#define AT91_PC24_D24 (1 << 24) /* A: Data Bus [24] */ -+#define AT91_PC24_TIOB2 (1 << 24) /* B: Timer Counter 2 Multipurpose Timer I/O Pin B */ -+#define AT91_PC25_D25 (1 << 25) /* A: Data Bus [25] */ -+#define AT91_PC25_TF2 (1 << 25) /* B: SSC2 Transmit Frame Sync */ -+#define AT91_PC26_D26 (1 << 26) /* A: Data Bus [26] */ -+#define AT91_PC26_TK2 (1 << 26) /* B: SSC2 Transmit Clock */ -+#define AT91_PC27_D27 (1 << 27) /* A: Data Bus [27] */ -+#define AT91_PC27_TD2 (1 << 27) /* B: SSC2 Transmit Data */ -+#define AT91_PC28_D28 (1 << 28) /* A: Data Bus [28] */ -+#define AT91_PC28_RD2 (1 << 28) /* B: SSC2 Receive Data */ -+#define AT91_PC29_D29 (1 << 29) /* A: Data Bus [29] */ -+#define AT91_PC29_RK2 (1 << 29) /* B: SSC2 Receive Clock */ -+#define AT91_PC30_D30 (1 << 30) /* A: Data Bus [30] */ -+#define AT91_PC30_RF2 (1 << 30) /* B: SSC2 Receive Frame Sync */ -+#define AT91_PC31_D31 (1 << 31) /* A: Data Bus [31] */ -+#define AT91_PC31_PCK1 (1 << 31) /* B: PMC Programmable clock Output 1 */ -+#endif -+ -+#endif -diff -urN -x CVS linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91sam9261_matrix.h linux-2.6.19/include/asm-arm/arch-at91rm9200/at91sam9261_matrix.h ---- linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91sam9261_matrix.h Thu Jan 1 02:00:00 1970 -+++ linux-2.6.19/include/asm-arm/arch-at91rm9200/at91sam9261_matrix.h Thu Nov 23 17:08:24 2006 -@@ -0,0 +1,62 @@ -+/* -+ * include/asm-arm/arch-at91rm9200/at91sam9261_matrix.h -+ * -+ * Memory Controllers (MATRIX, EBI) - System peripherals registers. -+ * Based on AT91SAM9261 datasheet revision D. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ */ -+ -+#ifndef AT91SAM9261_MATRIX_H -+#define AT91SAM9261_MATRIX_H -+ -+#define AT91_MATRIX_MCFG (AT91_MATRIX + 0x00) /* Master Configuration Register */ -+#define AT91_MATRIX_RCB0 (1 << 0) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */ -+#define AT01_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */ -+ -+#define AT91_MATRIX_SCFG0 (AT91_MATRIX + 0x04) /* Slave Configuration Register 0 */ -+#define AT91_MATRIX_SCFG1 (AT91_MATRIX + 0x08) /* Slave Configuration Register 1 */ -+#define AT91_MATRIX_SCFG2 (AT91_MATRIX + 0x0C) /* Slave Configuration Register 2 */ -+#define AT91_MATRIX_SCFG3 (AT91_MATRIX + 0x10) /* Slave Configuration Register 3 */ -+#define AT91_MATRIX_SCFG4 (AT91_MATRIX + 0x14) /* Slave Configuration Register 4 */ -+#define AT91_MATRIX_SLOT_CYCLE (0xff << 0) /* Maximum Number of Allowed Cycles for a Burst */ -+#define AT91_MATRIX_DEFMSTR_TYPE (3 << 16) /* Default Master Type */ -+#define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16) -+#define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16) -+#define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16) -+#define AT91_MATRIX_FIXED_DEFMSTR (7 << 18) /* Fixed Index of Default Master */ -+ -+#define AT91_MATRIX_TCR (AT91_MATRIX + 0x24) /* TCM Configuration Register */ ++#define AT91_MATRIX_TCMR (AT91_MATRIX + 0x114) /* TCM Configuration Register */ +#define AT91_MATRIX_ITCM_SIZE (0xf << 0) /* Size of ITCM enabled memory block */ +#define AT91_MATRIX_ITCM_0 (0 << 0) +#define AT91_MATRIX_ITCM_16 (5 << 0) +#define AT91_MATRIX_ITCM_32 (6 << 0) -+#define AT91_MATRIX_ITCM_64 (7 << 0) +#define AT91_MATRIX_DTCM_SIZE (0xf << 4) /* Size of DTCM enabled memory block */ +#define AT91_MATRIX_DTCM_0 (0 << 4) +#define AT91_MATRIX_DTCM_16 (5 << 4) +#define AT91_MATRIX_DTCM_32 (6 << 4) -+#define AT91_MATRIX_DTCM_64 (7 << 4) + -+#define AT91_MATRIX_EBICSA (AT91_MATRIX + 0x30) /* EBI Chip Select Assignment Register */ ++#define AT91_MATRIX_EBICSA (AT91_MATRIX + 0x120) /* EBI0 Chip Select Assignment Register */ +#define AT91_MATRIX_CS1A (1 << 1) /* Chip Select 1 Assignment */ -+#define AT91_MATRIX_CS1A_SMC (0 << 1) -+#define AT91_MATRIX_CS1A_SDRAMC (1 << 1) ++#define AT91_MATRIX_CS1A_SMC (0 << 1) ++#define AT91_MATRIX_CS1A_SDRAMC (1 << 1) +#define AT91_MATRIX_CS3A (1 << 3) /* Chip Select 3 Assignment */ +#define AT91_MATRIX_CS3A_SMC (0 << 3) +#define AT91_MATRIX_CS3A_SMC_SMARTMEDIA (1 << 3) @@ -18311,194 +9622,43 @@ diff -urN -x CVS linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91sam9261_ +#define AT91_MATRIX_CS5A_SMC (0 << 5) +#define AT91_MATRIX_CS5A_SMC_CF2 (1 << 5) +#define AT91_MATRIX_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */ ++#define AT91_MATRIX_VDDIOMSEL (1 << 16) /* Memory voltage selection */ ++#define AT91_MATRIX_VDDIOMSEL_1_8V (0 << 16) ++#define AT91_MATRIX_VDDIOMSEL_3_3V (1 << 16) + -+#define AT91_MATRIX_USBPUCR (AT91_MATRIX + 0x34) /* USB Pad Pull-Up Control Register */ -+#define AT91_MATRIX_USBPUCR_PUON (1 << 30) /* USB Device PAD Pull-up Enable */ -+ -+#endif -diff -urN -x CVS linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91sam926x_mc.h linux-2.6.19/include/asm-arm/arch-at91rm9200/at91sam926x_mc.h ---- linux-2.6.19-final/include/asm-arm/arch-at91rm9200/at91sam926x_mc.h Thu Jan 1 02:00:00 1970 -+++ linux-2.6.19/include/asm-arm/arch-at91rm9200/at91sam926x_mc.h Mon Nov 13 12:27:30 2006 -@@ -0,0 +1,134 @@ -+/* -+ * include/asm-arm/arch-at91rm9200/at91sam926x_mc.h -+ * -+ * Memory Controllers (SMC, SDRAMC) - System peripherals registers. -+ * Based on AT91SAM9261 datasheet revision D. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ */ -+ -+#ifndef AT91SAM926x_MC_H -+#define AT91SAM926x_MC_H -+ -+/* SDRAM Controller (SDRAMC) registers */ -+#define AT91_SDRAMC_MR (AT91_SDRAMC + 0x00) /* SDRAM Controller Mode Register */ -+#define AT91_SDRAMC_MODE (0xf << 0) /* Command Mode */ -+#define AT91_SDRAMC_MODE_NORMAL 0 -+#define AT91_SDRAMC_MODE_NOP 1 -+#define AT91_SDRAMC_MODE_PRECHARGE 2 -+#define AT91_SDRAMC_MODE_LMR 3 -+#define AT91_SDRAMC_MODE_REFRESH 4 -+#define AT91_SDRAMC_MODE_EXT_LMR 5 -+#define AT91_SDRAMC_MODE_DEEP 6 -+ -+#define AT91_SDRAMC_TR (AT91_SDRAMC + 0x04) /* SDRAM Controller Refresh Timer Register */ -+#define AT91_SDRAMC_COUNT (0xfff << 0) /* Refresh Timer Counter */ -+ -+#define AT91_SDRAMC_CR (AT91_SDRAMC + 0x08) /* SDRAM Controller Configuration Register */ -+#define AT91_SDRAMC_NC (3 << 0) /* Number of Column Bits */ -+#define AT91_SDRAMC_NC_8 (0 << 0) -+#define AT91_SDRAMC_NC_9 (1 << 0) -+#define AT91_SDRAMC_NC_10 (2 << 0) -+#define AT91_SDRAMC_NC_11 (3 << 0) -+#define AT91_SDRAMC_NR (3 << 2) /* Number of Row Bits */ -+#define AT91_SDRAMC_NR_11 (0 << 2) -+#define AT91_SDRAMC_NR_12 (1 << 2) -+#define AT91_SDRAMC_NR_13 (2 << 2) -+#define AT91_SDRAMC_NB (1 << 4) /* Number of Banks */ -+#define AT91_SDRAMC_NB_2 (0 << 4) -+#define AT91_SDRAMC_NB_4 (1 << 4) -+#define AT91_SDRAMC_CAS (3 << 5) /* CAS Latency */ -+#define AT91_SDRAMC_CAS_1 (1 << 5) -+#define AT91_SDRAMC_CAS_2 (2 << 5) -+#define AT91_SDRAMC_CAS_3 (3 << 5) -+#define AT91_SDRAMC_DBW (1 << 7) /* Data Bus Width */ -+#define AT91_SDRAMC_DBW_32 (0 << 7) -+#define AT91_SDRAMC_DBW_16 (1 << 7) -+#define AT91_SDRAMC_TWR (0xf << 8) /* Write Recovery Delay */ -+#define AT91_SDRAMC_TRC (0xf << 12) /* Row Cycle Delay */ -+#define AT91_SDRAMC_TRP (0xf << 16) /* Row Precharge Delay */ -+#define AT91_SDRAMC_TRCD (0xf << 20) /* Row to Column Delay */ -+#define AT91_SDRAMC_TRAS (0xf << 24) /* Active to Precharge Delay */ -+#define AT91_SDRAMC_TXSR (0xf << 28) /* Exit Self Refresh to Active Delay */ -+ -+#define AT91_SDRAMC_LPR (AT91_SDRAMC + 0x10) /* SDRAM Controller Low Power Register */ -+#define AT91_SDRAMC_LPCB (3 << 0) /* Low-power Configurations */ -+#define AT91_SDRAMC_LPCB_DISABLE 0 -+#define AT91_SDRAMC_LPCB_SELF_REFRESH 1 -+#define AT91_SDRAMC_LPCB_POWER_DOWN 2 -+#define AT91_SDRAMC_LPCB_DEEP_POWER_DOWN 3 -+#define AT91_SDRAMC_PASR (7 << 4) /* Partial Array Self Refresh */ -+#define AT91_SDRAMC_TCSR (3 << 8) /* Temperature Compensated Self Refresh */ -+#define AT91_SDRAMC_DS (3 << 10) /* Drive Strenght */ -+#define AT91_SDRAMC_TIMEOUT (3 << 12) /* Time to define when Low Power Mode is enabled */ -+#define AT91_SDRAMC_TIMEOUT_0_CLK_CYCLES (0 << 12) -+#define AT91_SDRAMC_TIMEOUT_64_CLK_CYCLES (1 << 12) -+#define AT91_SDRAMC_TIMEOUT_128_CLK_CYCLES (2 << 12) -+ -+#define AT91_SDRAMC_IER (AT91_SDRAMC + 0x14) /* SDRAM Controller Interrupt Enable Register */ -+#define AT91_SDRAMC_IDR (AT91_SDRAMC + 0x18) /* SDRAM Controller Interrupt Disable Register */ -+#define AT91_SDRAMC_IMR (AT91_SDRAMC + 0x1C) /* SDRAM Controller Interrupt Mask Register */ -+#define AT91_SDRAMC_ISR (AT91_SDRAMC + 0x20) /* SDRAM Controller Interrupt Status Register */ -+#define AT91_SDRAMC_RES (1 << 0) /* Refresh Error Status */ -+ -+#define AT91_SDRAMC_MDR (AT91_SDRAMC + 0x24) /* SDRAM Memory Device Register */ -+#define AT91_SDRAMC_MD (3 << 0) /* Memory Device Type */ -+#define AT91_SDRAMC_MD_SDRAM 0 -+#define AT91_SDRAMC_MD_LOW_POWER_SDRAM 1 -+ -+ -+/* Static Memory Controller (SMC) registers */ -+#define AT91_SMC_SETUP(n) (AT91_SMC + 0x00 + ((n)*0x10)) /* Setup Register for CS n */ -+#define AT91_SMC_NWESETUP (0x3f << 0) /* NWE Setup Length */ -+#define AT91_SMC_NWESETUP_(x) ((x) << 0) -+#define AT91_SMC_NCS_WRSETUP (0x3f << 8) /* NCS Setup Length in Write Access */ -+#define AT91_SMC_NCS_WRSETUP_(x) ((x) << 8) -+#define AT91_SMC_NRDSETUP (0x3f << 16) /* NRD Setup Length */ -+#define AT91_SMC_NRDSETUP_(x) ((x) << 16) -+#define AT91_SMC_NCS_RDSETUP (0x3f << 24) /* NCS Setup Length in Read Access */ -+#define AT91_SMC_NCS_RDSETUP_(x) ((x) << 24) -+ -+#define AT91_SMC_PULSE(n) (AT91_SMC + 0x04 + ((n)*0x10)) /* Pulse Register for CS n */ -+#define AT91_SMC_NWEPULSE (0x7f << 0) /* NWE Pulse Length */ -+#define AT91_SMC_NWEPULSE_(x) ((x) << 0) -+#define AT91_SMC_NCS_WRPULSE (0x7f << 8) /* NCS Pulse Length in Write Access */ -+#define AT91_SMC_NCS_WRPULSE_(x)((x) << 8) -+#define AT91_SMC_NRDPULSE (0x7f << 16) /* NRD Pulse Length */ -+#define AT91_SMC_NRDPULSE_(x) ((x) << 16) -+#define AT91_SMC_NCS_RDPULSE (0x7f << 24) /* NCS Pulse Length in Read Access */ -+#define AT91_SMC_NCS_RDPULSE_(x)((x) << 24) -+ -+#define AT91_SMC_CYCLE(n) (AT91_SMC + 0x08 + ((n)*0x10)) /* Cycle Register for CS n */ -+#define AT91_SMC_NWECYCLE (0x1ff << 0 ) /* Total Write Cycle Length */ -+#define AT91_SMC_NWECYCLE_(x) ((x) << 0) -+#define AT91_SMC_NRDCYCLE (0x1ff << 16) /* Total Read Cycle Length */ -+#define AT91_SMC_NRDCYCLE_(x) ((x) << 16) -+ -+#define AT91_SMC_MODE(n) (AT91_SMC + 0x0c + ((n)*0x10)) /* Mode Register for CS n */ -+#define AT91_SMC_READMODE (1 << 0) /* Read Mode */ -+#define AT91_SMC_WRITEMODE (1 << 1) /* Write Mode */ -+#define AT91_SMC_EXNWMODE (3 << 5) /* NWAIT Mode */ -+#define AT91_SMC_EXNWMODE_DISABLE (0 << 5) -+#define AT91_SMC_EXNWMODE_FROZEN (2 << 5) -+#define AT91_SMC_EXNWMODE_READY (3 << 5) -+#define AT91_SMC_BAT (1 << 8) /* Byte Access Type */ -+#define AT91_SMC_BAT_SELECT (0 << 8) -+#define AT91_SMC_BAT_WRITE (1 << 8) -+#define AT91_SMC_DBW (3 << 12) /* Data Bus Width */ -+#define AT91_SMC_DBW_8 (0 << 12) -+#define AT91_SMC_DBW_16 (1 << 12) -+#define AT91_SMC_DBW_32 (2 << 12) -+#define AT91_SMC_TDF (0xf << 16) /* Data Float Time. */ -+#define AT91_SMC_TDF_(x) ((x) << 16) -+#define AT91_SMC_TDFMODE (1 << 20) /* TDF Optimization - Enabled */ -+#define AT91_SMC_PMEN (1 << 24) /* Page Mode Enabled */ -+#define AT91_SMC_PS (3 << 28) /* Page Size */ -+#define AT91_SMC_PS_4 (0 << 28) -+#define AT91_SMC_PS_8 (1 << 28) -+#define AT91_SMC_PS_16 (2 << 28) -+#define AT91_SMC_PS_32 (3 << 28) + +#endif -diff -urN -x CVS linux-2.6.19-final/include/asm-arm/arch-at91rm9200/board.h linux-2.6.19/include/asm-arm/arch-at91rm9200/board.h ---- linux-2.6.19-final/include/asm-arm/arch-at91rm9200/board.h Mon Dec 4 16:41:04 2006 -+++ linux-2.6.19/include/asm-arm/arch-at91rm9200/board.h Sat Nov 25 11:06:32 2006 -@@ -48,25 +48,26 @@ - u8 det_pin; /* Card detect */ - u8 vcc_pin; /* power switching */ - u8 rst_pin; /* card reset */ -+ u8 chipselect; /* EBI Chip Select number */ - }; - extern void __init at91_add_device_cf(struct at91_cf_data *data); - - /* MMC / SD */ - struct at91_mmc_data { - u8 det_pin; /* card detect IRQ */ -- unsigned is_b:1; /* uses B side (vs A) */ -+ unsigned slot_b:1; /* uses Slot B */ - unsigned wire4:1; /* (SD) supports DAT0..DAT3 */ - u8 wp_pin; /* (SD) writeprotect detect */ - u8 vcc_pin; /* power switching (high == on) */ +diff -urN -x CVS linux-2.6.21/include/asm-arm/arch-at91/board.h linux-2.6-stable/include/asm-arm/arch-at91/board.h +--- linux-2.6.21/include/asm-arm/arch-at91/board.h Thu Apr 26 05:08:32 2007 ++++ linux-2.6-stable/include/asm-arm/arch-at91/board.h Thu May 10 12:21:10 2007 +@@ -62,7 +62,7 @@ }; - extern void __init at91_add_device_mmc(struct at91_mmc_data *data); + extern void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data); - /* Ethernet */ --struct at91_eth_data { -+/* Ethernet (EMAC & MACB) */ -+struct eth_platform_data { ++ /* Ethernet (EMAC & MACB) */ + struct at91_eth_data { u8 phy_irq_pin; /* PHY IRQ */ u8 is_rmii; /* using RMII interface? */ +@@ -114,9 +114,31 @@ }; --extern void __init at91_add_device_eth(struct at91_eth_data *data); -+extern void __init at91_add_device_eth(struct eth_platform_data *data); + extern void __init at91_add_device_serial(void); - /* USB Host */ - struct at91_usbh_data { -@@ -81,7 +82,8 @@ - u8 rdy_pin; /* ready/busy */ - u8 ale; /* address line number connected to ALE */ - u8 cle; /* address line number connected to CLE */ -- struct mtd_partition* (*partition_info)(int, int*); -+ u8 bus_width_16; /* buswidth is 16 bit */ -+ struct mtd_partition* (*partition_info)(int, int*); - }; - extern void __init at91_add_device_nand(struct at91_nand_data *data); - -@@ -112,4 +114,13 @@ ++ /* LCD Controller */ ++struct atmel_lcdfb_info; ++extern void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data); ++ ++ /* AC97 */ ++struct atmel_ac97_data { ++ u8 reset_pin; /* reset */ ++}; ++extern void __init at91_add_device_ac97(struct atmel_ac97_data *data); ++ ++ /* ISI */ ++extern void __init at91_add_device_isi(void); ++ + /* LEDs */ + extern u8 at91_leds_cpu; extern u8 at91_leds_timer; extern void __init at91_init_leds(u8 cpu_led, u8 timer_led); @@ -18512,149 +9672,68 @@ diff -urN -x CVS linux-2.6.19-final/include/asm-arm/arch-at91rm9200/board.h linu +extern void __init at91_gpio_leds(struct at91_gpio_led *leds, int nr); + #endif -diff -urN -x CVS linux-2.6.19-final/include/asm-arm/arch-at91rm9200/cpu.h linux-2.6.19/include/asm-arm/arch-at91rm9200/cpu.h ---- linux-2.6.19-final/include/asm-arm/arch-at91rm9200/cpu.h Thu Jan 1 02:00:00 1970 -+++ linux-2.6.19/include/asm-arm/arch-at91rm9200/cpu.h Wed Nov 15 11:59:16 2006 -@@ -0,0 +1,49 @@ -+/* -+ * include/asm-arm/arch-at91rm9200/cpu.h -+ * -+ * Copyright (C) 2006 SAN People -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ */ -+ -+#ifndef __ASM_ARCH_CPU_H -+#define __ASM_ARCH_CPU_H -+ -+#include <asm/hardware.h> -+#include <asm/arch/at91_dbgu.h> -+ -+ -+#define ARCH_ID_AT91RM9200 0x09290780 -+#define ARCH_ID_AT91SAM9260 0x019803a0 -+#define ARCH_ID_AT91SAM9261 0x019703a0 -+ -+ -+static inline unsigned long at91_cpu_identify(void) -+{ -+ return (at91_sys_read(AT91_DBGU_CIDR) & ~AT91_CIDR_VERSION); -+} -+ -+ -+#ifdef CONFIG_ARCH_AT91RM9200 -+#define cpu_is_at91rm9200() (at91_cpu_identify() == ARCH_ID_AT91RM9200) -+#else -+#define cpu_is_at91rm9200() (0) -+#endif -+ -+#ifdef CONFIG_ARCH_AT91SAM9260 -+#define cpu_is_at91sam9260() (at91_cpu_identify() == ARCH_ID_AT91SAM9260) -+#else -+#define cpu_is_at91sam9260() (0) -+#endif -+ -+#ifdef CONFIG_ARCH_AT91SAM9261 -+#define cpu_is_at91sam9261() (at91_cpu_identify() == ARCH_ID_AT91SAM9261) -+#else -+#define cpu_is_at91sam9261() (0) -+#endif -+ -+#endif -diff -urN -x CVS linux-2.6.19-final/include/asm-arm/arch-at91rm9200/debug-macro.S linux-2.6.19/include/asm-arm/arch-at91rm9200/debug-macro.S ---- linux-2.6.19-final/include/asm-arm/arch-at91rm9200/debug-macro.S Tue May 30 11:42:13 2006 -+++ linux-2.6.19/include/asm-arm/arch-at91rm9200/debug-macro.S Tue Oct 24 16:04:30 2006 -@@ -12,6 +12,7 @@ - */ - - #include <asm/hardware.h> -+#include <asm/arch/at91_dbgu.h> - - .macro addruart,rx - mrc p15, 0, \rx, c1, c0 -diff -urN -x CVS linux-2.6.19-final/include/asm-arm/arch-at91rm9200/entry-macro.S linux-2.6.19/include/asm-arm/arch-at91rm9200/entry-macro.S ---- linux-2.6.19-final/include/asm-arm/arch-at91rm9200/entry-macro.S Tue May 30 11:42:13 2006 -+++ linux-2.6.19/include/asm-arm/arch-at91rm9200/entry-macro.S Tue Oct 24 16:15:21 2006 -@@ -11,6 +11,7 @@ - */ +diff -urN -x CVS linux-2.6.21/include/asm-arm/arch-at91/cpu.h linux-2.6-stable/include/asm-arm/arch-at91/cpu.h +--- linux-2.6.21/include/asm-arm/arch-at91/cpu.h Thu Apr 26 05:08:32 2007 ++++ linux-2.6-stable/include/asm-arm/arch-at91/cpu.h Wed May 9 10:20:54 2007 +@@ -26,6 +26,8 @@ + #define ARCH_ID_AT91SAM9XE256 0x329a93a0 + #define ARCH_ID_AT91SAM9XE512 0x329aa3a0 - #include <asm/hardware.h> -+#include <asm/arch/at91_aic.h> - - .macro disable_fiq - .endm -diff -urN -x CVS linux-2.6.19-final/include/asm-arm/arch-at91rm9200/hardware.h linux-2.6.19/include/asm-arm/arch-at91rm9200/hardware.h ---- linux-2.6.19-final/include/asm-arm/arch-at91rm9200/hardware.h Mon Dec 4 16:41:04 2006 -+++ linux-2.6.19/include/asm-arm/arch-at91rm9200/hardware.h Wed Nov 15 09:21:41 2006 -@@ -16,8 +16,16 @@ - - #include <asm/sizes.h> ++#define ARCH_ID_AT91SAM9RL64 0x019b03a0 ++ + static inline unsigned long at91_cpu_identify(void) + { + return (at91_sys_read(AT91_DBGU_CIDR) & ~AT91_CIDR_VERSION); +@@ -68,4 +70,10 @@ + #define cpu_is_at91sam9263() (0) + #endif -+#if defined(CONFIG_ARCH_AT91RM9200) - #include <asm/arch/at91rm9200.h> --#include <asm/arch/at91rm9200_sys.h> -+#elif defined(CONFIG_ARCH_AT91SAM9260) -+#include <asm/arch/at91sam9260.h> -+#elif defined(CONFIG_ARCH_AT91SAM9261) -+#include <asm/arch/at91sam9261.h> ++#ifdef CONFIG_ARCH_AT91SAM9RL ++#define cpu_is_at91sam9rl() (at91_cpu_identify() == ARCH_ID_AT91SAM9RL64) +#else -+#error "Unsupported AT91 processor" ++#define cpu_is_at91sam9rl() (0) +#endif + + #endif +diff -urN -x CVS linux-2.6.21/include/asm-arm/arch-at91/hardware.h linux-2.6-stable/include/asm-arm/arch-at91/hardware.h +--- linux-2.6.21/include/asm-arm/arch-at91/hardware.h Thu Apr 26 05:08:32 2007 ++++ linux-2.6-stable/include/asm-arm/arch-at91/hardware.h Fri May 11 14:45:12 2007 +@@ -24,6 +24,8 @@ + #include <asm/arch/at91sam9261.h> + #elif defined(CONFIG_ARCH_AT91SAM9263) + #include <asm/arch/at91sam9263.h> ++#elif defined(CONFIG_ARCH_AT91SAM9RL) ++#include <asm/arch/at91sam9rl.h> + #else + #error "Unsupported AT91 processor" + #endif +@@ -69,22 +71,5 @@ + /* Clocks */ + #define AT91_SLOW_CLOCK 32768 /* slow clock */ - /* - * Remap the peripherals from address 0xFFFA0000 .. 0xFFFFFFFF -@@ -34,29 +42,27 @@ - * Virtual to Physical Address mapping for IO devices. - */ - #define AT91_VA_BASE_SYS AT91_IO_P2V(AT91_BASE_SYS) --#define AT91_VA_BASE_SPI AT91_IO_P2V(AT91RM9200_BASE_SPI) - #define AT91_VA_BASE_EMAC AT91_IO_P2V(AT91RM9200_BASE_EMAC) --#define AT91_VA_BASE_TWI AT91_IO_P2V(AT91RM9200_BASE_TWI) --#define AT91_VA_BASE_MCI AT91_IO_P2V(AT91RM9200_BASE_MCI) --#define AT91_VA_BASE_UDP AT91_IO_P2V(AT91RM9200_BASE_UDP) - - /* Internal SRAM is mapped below the IO devices */ --#define AT91_SRAM_VIRT_BASE (AT91_IO_VIRT_BASE - AT91RM9200_SRAM_SIZE) -+#define AT91_SRAM_MAX SZ_1M -+#define AT91_VIRT_BASE (AT91_IO_VIRT_BASE - AT91_SRAM_MAX) - - /* Serial ports */ --#define ATMEL_MAX_UART 5 /* 4 USART3's and one DBGU port */ -+#define ATMEL_MAX_UART 7 /* 6 USART3's and one DBGU port (SAM9260) */ - --/* FLASH */ --#define AT91_FLASH_BASE 0x10000000 /* NCS0: Flash physical base address */ -+/* External Memory Map */ -+#define AT91_CHIPSELECT_0 0x10000000 -+#define AT91_CHIPSELECT_1 0x20000000 -+#define AT91_CHIPSELECT_2 0x30000000 -+#define AT91_CHIPSELECT_3 0x40000000 -+#define AT91_CHIPSELECT_4 0x50000000 -+#define AT91_CHIPSELECT_5 0x60000000 -+#define AT91_CHIPSELECT_6 0x70000000 -+#define AT91_CHIPSELECT_7 0x80000000 - - /* SDRAM */ --#define AT91_SDRAM_BASE 0x20000000 /* NCS1: SDRAM physical base address */ +-#ifndef __ASSEMBLY__ +-#include <asm/io.h> +- +-static inline unsigned int at91_sys_read(unsigned int reg_offset) +-{ +- void __iomem *addr = (void __iomem *)AT91_VA_BASE_SYS; +- +- return __raw_readl(addr + reg_offset); +-} - --/* SmartMedia */ --#define AT91_SMARTMEDIA_BASE 0x40000000 /* NCS3: Smartmedia physical base address */ +-static inline void at91_sys_write(unsigned int reg_offset, unsigned long value) +-{ +- void __iomem *addr = (void __iomem *)AT91_VA_BASE_SYS; - --/* Compact Flash */ --#define AT91_CF_BASE 0x50000000 /* NCS4-NCS6: Compact Flash physical base address */ -+#define AT91_SDRAM_BASE AT91_CHIPSELECT_1 +- __raw_writel(value, addr + reg_offset); +-} +-#endif - /* Clocks */ - #define AT91_SLOW_CLOCK 32768 /* slow clock */ -diff -urN -x CVS linux-2.6.19-final/include/asm-arm/arch-at91rm9200/ics1523.h linux-2.6.19/include/asm-arm/arch-at91rm9200/ics1523.h ---- linux-2.6.19-final/include/asm-arm/arch-at91rm9200/ics1523.h Thu Jan 1 02:00:00 1970 -+++ linux-2.6.19/include/asm-arm/arch-at91rm9200/ics1523.h Tue Oct 17 08:29:21 2006 -@@ -0,0 +1,162 @@ + #endif +diff -urN -x CVS linux-2.6.21/include/asm-arm/arch-at91/ics1523.h linux-2.6-stable/include/asm-arm/arch-at91/ics1523.h +--- linux-2.6.21/include/asm-arm/arch-at91/ics1523.h Thu Jan 1 02:00:00 1970 ++++ linux-2.6-stable/include/asm-arm/arch-at91/ics1523.h Tue May 8 12:13:31 2007 +@@ -0,0 +1,154 @@ +//*---------------------------------------------------------------------------- +//* ATMEL Microcontroller Software Support - ROUSSET - +//*---------------------------------------------------------------------------- @@ -18674,9 +9753,6 @@ diff -urN -x CVS linux-2.6.19-final/include/asm-arm/arch-at91rm9200/ics1523.h li +#ifndef ics1523_h +#define ics1523_h + -+/* Standard configurations definitions */ -+#define Clock_Conf 0x0 -+ +/*-------------------------------------------*/ +/* ICS1523 TWI Serial Clock Definition */ +/*-------------------------------------------*/ @@ -18699,7 +9775,7 @@ diff -urN -x CVS linux-2.6.19-final/include/asm-arm/arch-at91rm9200/ics1523.h li +/* ICS1523 Device Addresses Definition */ +/*-------------------------------------------*/ + -+#define ICS_ADD 0x26 /* Device Address */ ++#define ICS_ADDR 0x26 /* Device Address */ + +/*--------------------------------------------------*/ +/* ICS1523 Registers Internal Addresses Definition */ @@ -18809,29 +9885,49 @@ diff -urN -x CVS linux-2.6.19-final/include/asm-arm/arch-at91rm9200/ics1523.h li +#define ICS_DPALOCK 0x1 /* DPA Lock Status */ +#define ICS_PLLLOCK 0x2 /* PLL Lock Status */ + -+/* Time constants definition */ -+#define TIMEOUT_OF_300us 3 // (10*100)us -+#define TIMEOUT_OF_1000us 10 // (10*100)us -+ -+/* Function Prototyping ics1523.c */ -+int AT91F_ICS1523_clockinit(void); ++int at91_ics1523_init(void); + +#endif /* ics1523_h */ -diff -urN -x CVS linux-2.6.19-final/include/asm-arm/arch-at91rm9200/irqs.h linux-2.6.19/include/asm-arm/arch-at91rm9200/irqs.h ---- linux-2.6.19-final/include/asm-arm/arch-at91rm9200/irqs.h Mon Dec 4 16:41:04 2006 -+++ linux-2.6.19/include/asm-arm/arch-at91rm9200/irqs.h Tue Oct 24 16:15:59 2006 -@@ -21,6 +21,8 @@ - #ifndef __ASM_ARCH_IRQS_H - #define __ASM_ARCH_IRQS_H +diff -urN -x CVS linux-2.6.21/include/asm-arm/arch-at91/io.h linux-2.6-stable/include/asm-arm/arch-at91/io.h +--- linux-2.6.21/include/asm-arm/arch-at91/io.h Thu Apr 26 05:08:32 2007 ++++ linux-2.6-stable/include/asm-arm/arch-at91/io.h Fri May 11 14:45:12 2007 +@@ -29,4 +29,22 @@ + #define __mem_pci(a) (a) + -+#include <asm/arch/at91_aic.h> ++#ifndef __ASSEMBLY__ + - #define NR_AIC_IRQS 32 ++static inline unsigned int at91_sys_read(unsigned int reg_offset) ++{ ++ void __iomem *addr = (void __iomem *)AT91_VA_BASE_SYS; ++ ++ return __raw_readl(addr + reg_offset); ++} ++ ++static inline void at91_sys_write(unsigned int reg_offset, unsigned long value) ++{ ++ void __iomem *addr = (void __iomem *)AT91_VA_BASE_SYS; ++ ++ __raw_writel(value, addr + reg_offset); ++} ++ ++#endif ++ + #endif +diff -urN -x CVS linux-2.6.21/include/asm-arm/arch-at91/irqs.h linux-2.6-stable/include/asm-arm/arch-at91/irqs.h +--- linux-2.6.21/include/asm-arm/arch-at91/irqs.h Thu Apr 26 05:08:32 2007 ++++ linux-2.6-stable/include/asm-arm/arch-at91/irqs.h Fri May 11 14:45:12 2007 +@@ -21,6 +21,7 @@ + #ifndef __ASM_ARCH_IRQS_H + #define __ASM_ARCH_IRQS_H ++#include <asm/io.h> + #include <asm/arch/at91_aic.h> -diff -urN -x CVS linux-2.6.19-final/include/asm-arm/arch-at91rm9200/spi.h linux-2.6.19/include/asm-arm/arch-at91rm9200/spi.h ---- linux-2.6.19-final/include/asm-arm/arch-at91rm9200/spi.h Thu Jan 1 02:00:00 1970 -+++ linux-2.6.19/include/asm-arm/arch-at91rm9200/spi.h Tue Oct 24 14:26:47 2006 + #define NR_AIC_IRQS 32 +diff -urN -x CVS linux-2.6.21/include/asm-arm/arch-at91/spi.h linux-2.6-stable/include/asm-arm/arch-at91/spi.h +--- linux-2.6.21/include/asm-arm/arch-at91/spi.h Thu Jan 1 02:00:00 1970 ++++ linux-2.6-stable/include/asm-arm/arch-at91/spi.h Tue May 8 14:31:24 2007 @@ -0,0 +1,54 @@ +/* + * Serial Peripheral Interface (SPI) driver for the Atmel AT91RM9200 @@ -18887,180 +9983,330 @@ diff -urN -x CVS linux-2.6.19-final/include/asm-arm/arch-at91rm9200/spi.h linux- +extern int spi_transfer(struct spi_transfer_list* list); + +#endif -diff -urN -x CVS linux-2.6.19-final/include/asm-arm/arch-at91rm9200/system.h linux-2.6.19/include/asm-arm/arch-at91rm9200/system.h ---- linux-2.6.19-final/include/asm-arm/arch-at91rm9200/system.h Mon Dec 4 16:34:19 2006 -+++ linux-2.6.19/include/asm-arm/arch-at91rm9200/system.h Mon Dec 4 16:00:33 2006 -@@ -22,6 +22,8 @@ - #define __ASM_ARCH_SYSTEM_H - - #include <asm/hardware.h> -+#include <asm/arch/at91_st.h> -+#include <asm/arch/at91_dbgu.h> - - static inline void arch_idle(void) - { -@@ -39,21 +41,13 @@ - cpu_do_idle(); - } - --static inline void arch_reset(char mode) --{ -- /* -- * Perform a hardware reset with the use of the Watchdog timer. -- */ -- at91_sys_write(AT91_ST_WDMR, AT91_ST_RSTEN | AT91_ST_EXTEN | 1); -- at91_sys_write(AT91_ST_CR, AT91_ST_WDRST); --} -- --#define ARCH_ID_AT91RM9200 0x09200080 --#define ARCH_ID_AT91SAM9261 0x019000a0 -+void (*at91_arch_reset)(void); - --static inline unsigned long arch_identify(void) -+static inline void arch_reset(char mode) - { -- return at91_sys_read(AT91_DBGU_CIDR) & (AT91_CIDR_EPROC | AT91_CIDR_ARCH); -+ /* call the CPU-specific reset function */ -+ if (at91_arch_reset) -+ (at91_arch_reset)(); - } - - #endif -diff -urN -x CVS linux-2.6.19-final/include/asm-arm/arch-at91rm9200/timex.h linux-2.6.19/include/asm-arm/arch-at91rm9200/timex.h ---- linux-2.6.19-final/include/asm-arm/arch-at91rm9200/timex.h Mon Dec 4 16:34:19 2006 -+++ linux-2.6.19/include/asm-arm/arch-at91rm9200/timex.h Wed Nov 15 08:55:07 2006 -@@ -23,6 +23,15 @@ - - #include <asm/hardware.h> +diff -urN -x CVS linux-2.6.21/include/asm-arm/arch-at91/timex.h linux-2.6-stable/include/asm-arm/arch-at91/timex.h +--- linux-2.6.21/include/asm-arm/arch-at91/timex.h Thu Apr 26 05:08:32 2007 ++++ linux-2.6-stable/include/asm-arm/arch-at91/timex.h Wed May 9 10:20:53 2007 +@@ -37,6 +37,11 @@ + #define AT91SAM9_MASTER_CLOCK 99959500 + #define CLOCK_TICK_RATE (AT91SAM9_MASTER_CLOCK/16) -+#if defined(CONFIG_ARCH_AT91RM9200) ++#elif defined(CONFIG_ARCH_AT91SAM9RL) + - #define CLOCK_TICK_RATE (AT91_SLOW_CLOCK) - -+#elif defined(CONFIG_ARCH_AT91SAM9260) || defined(CONFIG_ARCH_AT91SAM9261) -+ -+#define AT91SAM9_MASTER_CLOCK 99300000 ++#define AT91SAM9_MASTER_CLOCK 100000000 +#define CLOCK_TICK_RATE (AT91SAM9_MASTER_CLOCK/16) + -+#endif -+ #endif -diff -urN -x CVS linux-2.6.19-final/include/asm-arm/arch-at91rm9200/uncompress.h linux-2.6.19/include/asm-arm/arch-at91rm9200/uncompress.h ---- linux-2.6.19-final/include/asm-arm/arch-at91rm9200/uncompress.h Mon Dec 4 16:34:19 2006 -+++ linux-2.6.19/include/asm-arm/arch-at91rm9200/uncompress.h Tue Oct 24 16:11:39 2006 -@@ -22,11 +22,11 @@ + + #endif +diff -urN -x CVS linux-2.6.21/include/asm-arm/arch-at91/uncompress.h linux-2.6-stable/include/asm-arm/arch-at91/uncompress.h +--- linux-2.6.21/include/asm-arm/arch-at91/uncompress.h Thu Apr 26 05:08:32 2007 ++++ linux-2.6-stable/include/asm-arm/arch-at91/uncompress.h Fri May 11 14:45:12 2007 +@@ -21,7 +21,7 @@ + #ifndef __ASM_ARCH_UNCOMPRESS_H #define __ASM_ARCH_UNCOMPRESS_H - #include <asm/hardware.h> -+#include <asm/arch/at91_dbgu.h> +-#include <asm/hardware.h> ++#include <asm/io.h> + #include <asm/arch/at91_dbgu.h> /* - * The following code assumes the serial port has already been -- * initialized by the bootloader. We search for the first enabled -- * port in the most probable order. If you didn't setup a port in -+ * initialized by the bootloader. If you didn't setup a port in - * your bootloader then nothing will appear (which might be desired). - * - * This does not append a newline -diff -urN -x CVS linux-2.6.19-final/include/asm-arm/arch-at91rm9200/vmalloc.h linux-2.6.19/include/asm-arm/arch-at91rm9200/vmalloc.h ---- linux-2.6.19-final/include/asm-arm/arch-at91rm9200/vmalloc.h Mon Dec 4 16:34:19 2006 -+++ linux-2.6.19/include/asm-arm/arch-at91rm9200/vmalloc.h Wed Nov 1 15:26:48 2006 -@@ -21,6 +21,6 @@ - #ifndef __ASM_ARCH_VMALLOC_H - #define __ASM_ARCH_VMALLOC_H - --#define VMALLOC_END (AT91_SRAM_VIRT_BASE & PGDIR_MASK) -+#define VMALLOC_END (AT91_VIRT_BASE & PGDIR_MASK) +diff -urN -x CVS linux-2.6.21/include/linux/clk.h linux-2.6-stable/include/linux/clk.h +--- linux-2.6.21/include/linux/clk.h Thu Apr 26 05:08:32 2007 ++++ linux-2.6-stable/include/linux/clk.h Tue May 8 12:13:31 2007 +@@ -121,4 +121,24 @@ + */ + struct clk *clk_get_parent(struct clk *clk); ++/** ++ * clk_must_disable - report whether a clock's users must disable it ++ * @clk: one node in the clock tree ++ * ++ * This routine returns true only if the upcoming system state requires ++ * disabling the specified clock. ++ * ++ * It's common for platform power states to constrain certain clocks (and ++ * their descendants) to be unavailable, while other states allow that ++ * clock to be active. A platform's power states often include an "all on" ++ * mode; system wide sleep states like "standby" or "suspend-to-RAM"; and ++ * operating states which sacrifice functionality for lower power usage. ++ * ++ * The constraint value is commonly tested in device driver suspend(), to ++ * leave clocks active if they are needed for features like wakeup events. ++ * On platforms that support reduced functionality operating states, the ++ * constraint may also need to be tested during resume() and probe() calls. ++ */ ++int clk_must_disable(struct clk *clk); ++ #endif -diff -urN -x CVS linux-2.6.19-final/include/asm-avr32/arch-at32ap/at91_pdc.h linux-2.6.19/include/asm-avr32/arch-at32ap/at91_pdc.h ---- linux-2.6.19-final/include/asm-avr32/arch-at32ap/at91_pdc.h Thu Jan 1 02:00:00 1970 -+++ linux-2.6.19/include/asm-avr32/arch-at32ap/at91_pdc.h Tue Oct 24 15:32:59 2006 -@@ -0,0 +1,36 @@ +diff -urN -x CVS linux-2.6.21/include/linux/i2c-id.h linux-2.6-stable/include/linux/i2c-id.h +--- linux-2.6.21/include/linux/i2c-id.h Thu Apr 26 05:08:32 2007 ++++ linux-2.6-stable/include/linux/i2c-id.h Tue May 8 12:13:31 2007 +@@ -202,6 +202,7 @@ + + /* --- PCA 9564 based algorithms */ + #define I2C_HW_A_ISA 0x1a0000 /* generic ISA Bus interface card */ ++#define I2C_HW_A_PLAT 0x1a0001 /* generic platform_bus interface */ + + /* --- ACPI Embedded controller algorithms */ + #define I2C_HW_ACPI_EC 0x1f0000 +diff -urN -x CVS linux-2.6.21/include/video/atmel_lcdc.h linux-2.6-stable/include/video/atmel_lcdc.h +--- linux-2.6.21/include/video/atmel_lcdc.h Thu Jan 1 02:00:00 1970 ++++ linux-2.6-stable/include/video/atmel_lcdc.h Thu May 10 12:34:01 2007 +@@ -0,0 +1,196 @@ +/* -+ * include/asm-arm/arch-at91rm9200/at91_pdc.h ++ * Header file for AT91/AT32 LCD Controller + * -+ * Copyright (C) 2005 Ivan Kokshaysky -+ * Copyright (C) SAN People ++ * Data structure and register user interface + * -+ * Peripheral Data Controller (PDC) registers. -+ * Based on AT91RM9200 datasheet revision E. ++ * Copyright (C) 2007 Atmel Corporation + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ ++#ifndef __ATMEL_LCDC_H__ ++#define __ATMEL_LCDC_H__ + -+#ifndef AT91_PDC_H -+#define AT91_PDC_H -+ -+#define AT91_PDC_RPR 0x100 /* Receive Pointer Register */ -+#define AT91_PDC_RCR 0x104 /* Receive Counter Register */ -+#define AT91_PDC_TPR 0x108 /* Transmit Pointer Register */ -+#define AT91_PDC_TCR 0x10c /* Transmit Counter Register */ -+#define AT91_PDC_RNPR 0x110 /* Receive Next Pointer Register */ -+#define AT91_PDC_RNCR 0x114 /* Receive Next Counter Register */ -+#define AT91_PDC_TNPR 0x118 /* Transmit Next Pointer Register */ -+#define AT91_PDC_TNCR 0x11c /* Transmit Next Counter Register */ -+ -+#define AT91_PDC_PTCR 0x120 /* Transfer Control Register */ -+#define AT91_PDC_RXTEN (1 << 0) /* Receiver Transfer Enable */ -+#define AT91_PDC_RXTDIS (1 << 1) /* Receiver Transfer Disable */ -+#define AT91_PDC_TXTEN (1 << 8) /* Transmitter Transfer Enable */ -+#define AT91_PDC_TXTDIS (1 << 9) /* Transmitter Transfer Disable */ -+ -+#define AT91_PDC_PTSR 0x124 /* Transfer Status Register */ ++ /* LCD Controller info data structure */ ++struct atmel_lcdfb_info { ++ spinlock_t lock; ++ struct fb_info *info; ++ void __iomem *mmio; ++ unsigned long irq_base; + -+#endif -diff -urN -x CVS linux-2.6.19-final/include/asm-avr32/arch-at32ap/at91rm9200_pdc.h linux-2.6.19/include/asm-avr32/arch-at32ap/at91rm9200_pdc.h ---- linux-2.6.19-final/include/asm-avr32/arch-at32ap/at91rm9200_pdc.h Mon Dec 4 16:41:06 2006 -+++ linux-2.6.19/include/asm-avr32/arch-at32ap/at91rm9200_pdc.h Thu Jan 1 02:00:00 1970 -@@ -1,36 +0,0 @@ --/* -- * include/asm-arm/arch-at91rm9200/at91rm9200_pdc.h -- * -- * Copyright (C) 2005 Ivan Kokshaysky -- * Copyright (C) SAN People -- * -- * Peripheral Data Controller (PDC) registers. -- * Based on AT91RM9200 datasheet revision E. -- * -- * This program is free software; you can redistribute it and/or modify -- * it under the terms of the GNU General Public License as published by -- * the Free Software Foundation; either version 2 of the License, or -- * (at your option) any later version. -- */ -- --#ifndef AT91RM9200_PDC_H --#define AT91RM9200_PDC_H -- --#define AT91_PDC_RPR 0x100 /* Receive Pointer Register */ --#define AT91_PDC_RCR 0x104 /* Receive Counter Register */ --#define AT91_PDC_TPR 0x108 /* Transmit Pointer Register */ --#define AT91_PDC_TCR 0x10c /* Transmit Counter Register */ --#define AT91_PDC_RNPR 0x110 /* Receive Next Pointer Register */ --#define AT91_PDC_RNCR 0x114 /* Receive Next Counter Register */ --#define AT91_PDC_TNPR 0x118 /* Transmit Next Pointer Register */ --#define AT91_PDC_TNCR 0x11c /* Transmit Next Counter Register */ -- --#define AT91_PDC_PTCR 0x120 /* Transfer Control Register */ --#define AT91_PDC_RXTEN (1 << 0) /* Receiver Transfer Enable */ --#define AT91_PDC_RXTDIS (1 << 1) /* Receiver Transfer Disable */ --#define AT91_PDC_TXTEN (1 << 8) /* Transmitter Transfer Enable */ --#define AT91_PDC_TXTDIS (1 << 9) /* Transmitter Transfer Disable */ -- --#define AT91_PDC_PTSR 0x124 /* Transfer Status Register */ ++ unsigned int guard_time; ++ struct platform_device *pdev; ++ struct clk *bus_clk; ++ struct clk *lcdc_clk; ++ unsigned int default_bpp; ++ unsigned int default_lcdcon2; ++ unsigned int default_dmacon; ++ void (*atmel_lcdfb_power_control)(int on); ++ struct fb_monspecs *default_monspecs; ++ u32 pseudo_palette[16]; ++}; ++ ++#define ATMEL_LCDC_DMABADDR1 0x00 ++#define ATMEL_LCDC_DMABADDR2 0x04 ++#define ATMEL_LCDC_DMAFRMPT1 0x08 ++#define ATMEL_LCDC_DMAFRMPT2 0x0c ++#define ATMEL_LCDC_DMAFRMADD1 0x10 ++#define ATMEL_LCDC_DMAFRMADD2 0x14 ++ ++#define ATMEL_LCDC_DMAFRMCFG 0x18 ++#define ATMEL_LCDC_FRSIZE (0x7fffff << 0) ++#define ATMEL_LCDC_BLENGTH_OFFSET 24 ++#define ATMEL_LCDC_BLENGTH (0x7f << ATMEL_LCDC_BLENGTH_OFFSET) ++ ++#define ATMEL_LCDC_DMACON 0x1c ++#define ATMEL_LCDC_DMAEN (0x1 << 0) ++#define ATMEL_LCDC_DMARST (0x1 << 1) ++#define ATMEL_LCDC_DMABUSY (0x1 << 2) ++#define ATMEL_LCDC_DMAUPDT (0x1 << 3) ++#define ATMEL_LCDC_DMA2DEN (0x1 << 4) ++ ++#define ATMEL_LCDC_DMA2DCFG 0x20 ++#define ATMEL_LCDC_ADDRINC_OFFSET 0 ++#define ATMEL_LCDC_ADDRINC (0xffff) ++#define ATMEL_LCDC_PIXELOFF_OFFSET 24 ++#define ATMEL_LCDC_PIXELOFF (0x1f << 24) ++ ++#define ATMEL_LCDC_LCDCON1 0x0800 ++#define ATMEL_LCDC_BYPASS (1 << 0) ++#define ATMEL_LCDC_CLKVAL_OFFSET 12 ++#define ATMEL_LCDC_CLKVAL (0x1ff << ATMEL_LCDC_CLKVAL_OFFSET) ++#define ATMEL_LCDC_LINCNT (0x7ff << 21) ++ ++#define ATMEL_LCDC_LCDCON2 0x0804 ++#define ATMEL_LCDC_DISTYPE (3 << 0) ++#define ATMEL_LCDC_DISTYPE_STNMONO (0 << 0) ++#define ATMEL_LCDC_DISTYPE_STNCOLOR (1 << 0) ++#define ATMEL_LCDC_DISTYPE_TFT (2 << 0) ++#define ATMEL_LCDC_SCANMOD (1 << 2) ++#define ATMEL_LCDC_SCANMOD_SINGLE (0 << 2) ++#define ATMEL_LCDC_SCANMOD_DUAL (1 << 2) ++#define ATMEL_LCDC_IFWIDTH (3 << 3) ++#define ATMEL_LCDC_IFWIDTH_4 (0 << 3) ++#define ATMEL_LCDC_IFWIDTH_8 (1 << 3) ++#define ATMEL_LCDC_IFWIDTH_16 (2 << 3) ++#define ATMEL_LCDC_PIXELSIZE (7 << 5) ++#define ATMEL_LCDC_PIXELSIZE_1 (0 << 5) ++#define ATMEL_LCDC_PIXELSIZE_2 (1 << 5) ++#define ATMEL_LCDC_PIXELSIZE_4 (2 << 5) ++#define ATMEL_LCDC_PIXELSIZE_8 (3 << 5) ++#define ATMEL_LCDC_PIXELSIZE_16 (4 << 5) ++#define ATMEL_LCDC_PIXELSIZE_24 (5 << 5) ++#define ATMEL_LCDC_PIXELSIZE_32 (6 << 5) ++#define ATMEL_LCDC_INVVD (1 << 8) ++#define ATMEL_LCDC_INVVD_NORMAL (0 << 8) ++#define ATMEL_LCDC_INVVD_INVERTED (1 << 8) ++#define ATMEL_LCDC_INVFRAME (1 << 9 ) ++#define ATMEL_LCDC_INVFRAME_NORMAL (0 << 9) ++#define ATMEL_LCDC_INVFRAME_INVERTED (1 << 9) ++#define ATMEL_LCDC_INVLINE (1 << 10) ++#define ATMEL_LCDC_INVLINE_NORMAL (0 << 10) ++#define ATMEL_LCDC_INVLINE_INVERTED (1 << 10) ++#define ATMEL_LCDC_INVCLK (1 << 11) ++#define ATMEL_LCDC_INVCLK_NORMAL (0 << 11) ++#define ATMEL_LCDC_INVCLK_INVERTED (1 << 11) ++#define ATMEL_LCDC_INVDVAL (1 << 12) ++#define ATMEL_LCDC_INVDVAL_NORMAL (0 << 12) ++#define ATMEL_LCDC_INVDVAL_INVERTED (1 << 12) ++#define ATMEL_LCDC_CLKMOD (1 << 15) ++#define ATMEL_LCDC_CLKMOD_ACTIVEDISPLAY (0 << 15) ++#define ATMEL_LCDC_CLKMOD_ALWAYSACTIVE (1 << 15) ++#define ATMEL_LCDC_MEMOR (1 << 31) ++#define ATMEL_LCDC_MEMOR_BIG (0 << 31) ++#define ATMEL_LCDC_MEMOR_LITTLE (1 << 31) ++ ++#define ATMEL_LCDC_TIM1 0x0808 ++#define ATMEL_LCDC_VFP (0xff << 0) ++#define ATMEL_LCDC_VBP_OFFSET 8 ++#define ATMEL_LCDC_VBP (0xff << ATMEL_LCDC_VBP_OFFSET) ++#define ATMEL_LCDC_VPW_OFFSET 16 ++#define ATMEL_LCDC_VPW (0x3f << ATMEL_LCDC_VPW_OFFSET) ++#define ATMEL_LCDC_VHDLY_OFFSET 24 ++#define ATMEL_LCDC_VHDLY (0xf << ATMEL_LCDC_VHDLY_OFFSET) ++ ++#define ATMEL_LCDC_TIM2 0x080c ++#define ATMEL_LCDC_HBP (0xff << 0) ++#define ATMEL_LCDC_HPW_OFFSET 8 ++#define ATMEL_LCDC_HPW (0x3f << ATMEL_LCDC_HPW_OFFSET) ++#define ATMEL_LCDC_HFP_OFFSET 21 ++#define ATMEL_LCDC_HFP (0x7ff << ATMEL_LCDC_HFP_OFFSET) ++ ++#define ATMEL_LCDC_LCDFRMCFG 0x0810 ++#define ATMEL_LCDC_LINEVAL (0x7ff << 0) ++#define ATMEL_LCDC_HOZVAL_OFFSET 21 ++#define ATMEL_LCDC_HOZVAL (0x7ff << ATMEL_LCDC_HOZVAL_OFFSET) ++ ++#define ATMEL_LCDC_FIFO 0x0814 ++#define ATMEL_LCDC_FIFOTH (0xffff) ++ ++#define ATMEL_LCDC_MVAL 0x0818 ++ ++#define ATMEL_LCDC_DP1_2 0x081c ++#define ATMEL_LCDC_DP4_7 0x0820 ++#define ATMEL_LCDC_DP3_5 0x0824 ++#define ATMEL_LCDC_DP2_3 0x0828 ++#define ATMEL_LCDC_DP5_7 0x082c ++#define ATMEL_LCDC_DP3_4 0x0830 ++#define ATMEL_LCDC_DP4_5 0x0834 ++#define ATMEL_LCDC_DP6_7 0x0838 ++#define ATMEL_LCDC_DP1_2_VAL (0xff) ++#define ATMEL_LCDC_DP4_7_VAL (0xfffffff) ++#define ATMEL_LCDC_DP3_5_VAL (0xfffff) ++#define ATMEL_LCDC_DP2_3_VAL (0xfff) ++#define ATMEL_LCDC_DP5_7_VAL (0xfffffff) ++#define ATMEL_LCDC_DP3_4_VAL (0xffff) ++#define ATMEL_LCDC_DP4_5_VAL (0xfffff) ++#define ATMEL_LCDC_DP6_7_VAL (0xfffffff) ++ ++#define ATMEL_LCDC_PWRCON 0x083c ++#define ATMEL_LCDC_PWR (1 << 0) ++#define ATMEL_LCDC_GUARDT_OFFSET 1 ++#define ATMEL_LCDC_GUARDT (0x7f << ATMEL_LCDC_GUARDT_OFFSET) ++#define ATMEL_LCDC_BUSY (1 << 31) ++ ++#define ATMEL_LCDC_CONTRAST_CTR 0x0840 ++#define ATMEL_LCDC_PS (3 << 0) ++#define ATMEL_LCDC_PS_DIV1 (0 << 0) ++#define ATMEL_LCDC_PS_DIV2 (1 << 0) ++#define ATMEL_LCDC_PS_DIV4 (2 << 0) ++#define ATMEL_LCDC_PS_DIV8 (3 << 0) ++#define ATMEL_LCDC_POL (1 << 2) ++#define ATMEL_LCDC_POL_NEGATIVE (0 << 2) ++#define ATMEL_LCDC_POL_POSITIVE (1 << 2) ++#define ATMEL_LCDC_ENA (1 << 3) ++#define ATMEL_LCDC_ENA_PWMDISABLE (0 << 3) ++#define ATMEL_LCDC_ENA_PWMENABLE (1 << 3) ++ ++#define ATMEL_LCDC_CONTRAST_VAL 0x0844 ++#define ATMEL_LCDC_CVAL (0xff) ++ ++#define ATMEL_LCDC_IER 0x0848 ++#define ATMEL_LCDC_IDR 0x084c ++#define ATMEL_LCDC_IMR 0x0850 ++#define ATMEL_LCDC_ISR 0x0854 ++#define ATMEL_LCDC_ICR 0x0858 ++#define ATMEL_LCDC_LNI (1 << 0) ++#define ATMEL_LCDC_LSTLNI (1 << 1) ++#define ATMEL_LCDC_EOFI (1 << 2) ++#define ATMEL_LCDC_UFLWI (1 << 4) ++#define ATMEL_LCDC_OWRI (1 << 5) ++#define ATMEL_LCDC_MERI (1 << 6) ++ ++#define ATMEL_LCDC_LUT(n) (0x0c00 + ((n)*4)) ++ ++#endif /* __ATMEL_LCDC_H__ */ +diff -urN -x CVS linux-2.6.21/sound/soc/at91/eti_b1_wm8731.c linux-2.6-stable/sound/soc/at91/eti_b1_wm8731.c +--- linux-2.6.21/sound/soc/at91/eti_b1_wm8731.c Thu Apr 26 05:08:32 2007 ++++ linux-2.6-stable/sound/soc/at91/eti_b1_wm8731.c Tue May 8 12:13:58 2007 +@@ -34,8 +34,7 @@ + #include <sound/soc.h> + #include <sound/soc-dapm.h> + +-#include <asm/arch/hardware.h> +-#include <asm/arch/at91_pio.h> ++#include <asm/hardware.h> + #include <asm/arch/gpio.h> + + #include "../codecs/wm8731.h" +@@ -48,13 +47,6 @@ + #define DBG(x...) + #endif + +-#define AT91_PIO_TF1 (1 << (AT91_PIN_PB6 - PIN_BASE) % 32) +-#define AT91_PIO_TK1 (1 << (AT91_PIN_PB7 - PIN_BASE) % 32) +-#define AT91_PIO_TD1 (1 << (AT91_PIN_PB8 - PIN_BASE) % 32) +-#define AT91_PIO_RD1 (1 << (AT91_PIN_PB9 - PIN_BASE) % 32) +-#define AT91_PIO_RK1 (1 << (AT91_PIN_PB10 - PIN_BASE) % 32) +-#define AT91_PIO_RF1 (1 << (AT91_PIN_PB11 - PIN_BASE) % 32) - --#endif -diff -urN -x CVS linux-2.6.19-final/include/linux/i2c-id.h linux-2.6.19/include/linux/i2c-id.h ---- linux-2.6.19-final/include/linux/i2c-id.h Mon Dec 4 16:41:13 2006 -+++ linux-2.6.19/include/linux/i2c-id.h Thu Oct 12 17:07:39 2006 -@@ -202,6 +202,7 @@ + static struct clk *pck1_clk; + static struct clk *pllb_clk; - /* --- PCA 9564 based algorithms */ - #define I2C_HW_A_ISA 0x1a0000 /* generic ISA Bus interface card */ -+#define I2C_HW_A_PLAT 0x1a0001 /* generic platform_bus interface */ +@@ -277,7 +269,6 @@ + static int __init eti_b1_init(void) + { + int ret; +- u32 ssc_pio_lines; + struct at91_ssc_periph *ssc = eti_b1_dai.cpu_dai->private_data; - /* --- ACPI Embedded controller algorithms */ - #define I2C_HW_ACPI_EC 0x1f0000 + if (!request_mem_region(AT91RM9200_BASE_SSC1, SZ_16K, "soc-audio")) { +@@ -311,19 +302,12 @@ + goto fail_io_unmap; + } + +- ssc_pio_lines = AT91_PIO_TF1 | AT91_PIO_TK1 | AT91_PIO_TD1 +- | AT91_PIO_RD1 /* | AT91_PIO_RK1 */ | AT91_PIO_RF1; +- +- /* Reset all PIO registers and assign lines to peripheral A */ +- at91_sys_write(AT91_PIOB + PIO_PDR, ssc_pio_lines); +- at91_sys_write(AT91_PIOB + PIO_ODR, ssc_pio_lines); +- at91_sys_write(AT91_PIOB + PIO_IFDR, ssc_pio_lines); +- at91_sys_write(AT91_PIOB + PIO_CODR, ssc_pio_lines); +- at91_sys_write(AT91_PIOB + PIO_IDR, ssc_pio_lines); +- at91_sys_write(AT91_PIOB + PIO_MDDR, ssc_pio_lines); +- at91_sys_write(AT91_PIOB + PIO_PUDR, ssc_pio_lines); +- at91_sys_write(AT91_PIOB + PIO_ASR, ssc_pio_lines); +- at91_sys_write(AT91_PIOB + PIO_OWDR, ssc_pio_lines); ++ at91_set_A_periph(AT91_PIN_PB6, 0); /* TF1 */ ++ at91_set_A_periph(AT91_PIN_PB7, 0); /* TK1 */ ++ at91_set_A_periph(AT91_PIN_PB8, 0); /* TD1 */ ++ at91_set_A_periph(AT91_PIN_PB9, 0); /* RD1 */ ++/* at91_set_A_periph(AT91_PIN_PB10, 0);*/ /* RK1 */ ++ at91_set_A_periph(AT91_PIN_PB11, 0); /* RF1 */ + + /* + * Set PCK1 parent to PLLB and its rate to 12 Mhz. diff --git a/target/linux/at91-2.6/patches/001-vlink-machine.patch b/target/linux/at91-2.6/patches/001-vlink-machine.patch index 2c602bf8e9..1c12db3553 100644 --- a/target/linux/at91-2.6/patches/001-vlink-machine.patch +++ b/target/linux/at91-2.6/patches/001-vlink-machine.patch @@ -1,28 +1,27 @@ -diff -Naur linux-2.6.19.1/arch/arm/boot/compressed/head-at91rm9200.S linux/arch/arm/boot/compressed/head-at91rm9200.S ---- linux-2.6.19.1/arch/arm/boot/compressed/head-at91rm9200.S 2006-12-11 20:32:53.000000000 +0100 -+++ linux/arch/arm/boot/compressed/head-at91rm9200.S 2007-01-20 10:26:21.000000000 +0100 +--- linux-2.6.21.1.orig/arch/arm/boot/compressed/head-at91rm9200.S 2007-05-28 12:22:29.000000000 +0200 ++++ linux-2.6.21.1/arch/arm/boot/compressed/head-at91rm9200.S 2007-05-28 12:52:16.000000000 +0200 @@ -61,6 +61,12 @@ cmp r7, r3 beq 99f -+ @ FDL Versalink : 1053 -+ mov r3, #(MACH_TYPE_VLINK & 0xff) -+ orr r3, r3, #(MACH_TYPE_VLINK & 0xff00) -+ cmp r7, r3 -+ beq 99f -+ ++ @ FDL Versalink : 1053 ++ mov r3, #(MACH_TYPE_VLINK & 0xff) ++ orr r3, r3, #(MACH_TYPE_VLINK & 0xff00) ++ cmp r7, r3 ++ beq 99f ++ @ Ajeco 1ARM : 1075 mov r3, #(MACH_TYPE_ONEARM & 0xff) orr r3, r3, #(MACH_TYPE_ONEARM & 0xff00) -diff -Naur linux-2.6.19.1/arch/arm/mach-at91rm9200/board-vlink.c linux/arch/arm/mach-at91rm9200/board-vlink.c ---- linux-2.6.19.1/arch/arm/mach-at91rm9200/board-vlink.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux/arch/arm/mach-at91rm9200/board-vlink.c 2007-01-19 21:18:00.000000000 +0100 -@@ -0,0 +1,144 @@ +--- linux-2.6.21.1.orig/arch/arm/mach-at91/board-vlink.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.21.1/arch/arm/mach-at91/board-vlink.c 2007-05-28 13:09:54.000000000 +0200 +@@ -0,0 +1,160 @@ +/* -+ * linux/arch/arm/mach-at91rm9200/board-ek.c ++ * linux/arch/arm/mach-at91/board-vlink.c ++ * ++ * Copyright (C) 2005 SAN People ++ * Copyright (C) 2006,2007 Guthrie Consulting + * -+ * Copyright (C) 2006,2007 Hamish Guthrie -+ * Guthrie Consulting. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by @@ -45,6 +44,7 @@ diff -Naur linux-2.6.19.1/arch/arm/mach-at91rm9200/board-vlink.c linux/arch/arm/ +#include <linux/module.h> +#include <linux/platform_device.h> +#include <linux/spi/spi.h> ++#include <linux/mtd/physmap.h> + +#include <asm/hardware.h> +#include <asm/setup.h> @@ -57,6 +57,7 @@ diff -Naur linux-2.6.19.1/arch/arm/mach-at91rm9200/board-vlink.c linux/arch/arm/ + +#include <asm/arch/board.h> +#include <asm/arch/gpio.h> ++#include <asm/arch/at91rm9200_mc.h> + +#include "generic.h" + @@ -89,7 +90,7 @@ diff -Naur linux-2.6.19.1/arch/arm/mach-at91rm9200/board-vlink.c linux/arch/arm/ + at91rm9200_init_interrupts(NULL); +} + -+static struct eth_platform_data __initdata vlink_eth_data = { ++static struct at91_eth_data __initdata vlink_eth_data = { + .phy_irq_pin = AT91_PIN_PC4, + .is_rmii = 1, +}; @@ -103,13 +104,12 @@ diff -Naur linux-2.6.19.1/arch/arm/mach-at91rm9200/board-vlink.c linux/arch/arm/ + .pullup_pin = AT91_PIN_PD5, +}; + -+/*static struct at91_mmc_data __initdata ek_mmc_data = { -+ .det_pin = AT91_PIN_PB27, -+ .is_b = 0, ++static struct at91_mmc_data __initdata vlink_mmc_data = { ++// .det_pin = AT91_PIN_PB27, ++ .slot_b = 0, + .wire4 = 1, -+ .wp_pin = AT91_PIN_PA17, ++// .wp_pin = AT91_PIN_PA17, +}; -+*/ + +static struct spi_board_info vlink_spi_devices[] = { + { /* DataFlash chip */ @@ -126,6 +126,19 @@ diff -Naur linux-2.6.19.1/arch/arm/mach-at91rm9200/board-vlink.c linux/arch/arm/ +#endif +}; + ++static struct at91_gpio_led vlink_leds[] = { ++ { ++ .name = "led0", ++ .gpio = AT91_PIN_PB1, ++ .trigger = "heartbeat", ++ }, ++ { ++ .name = "led1", ++ .gpio = AT91_PIN_PB2, ++ .trigger = "timer", ++ } ++}; ++ +static void __init vlink_board_init(void) +{ + /* Serial */ @@ -147,9 +160,10 @@ diff -Naur linux-2.6.19.1/arch/arm/mach-at91rm9200/board-vlink.c linux/arch/arm/ +#else + /* MMC */ +// at91_set_gpio_output(AT91_PIN_PB22, 1); /* this MMC card slot can optionally use SPI signaling (CS3). */ -+// at91_add_device_mmc(&vlink_mmc_data); ++ at91_add_device_mmc(0, &vlink_mmc_data); +#endif -+ /* VGA */ ++ /* LEDs */ ++ at91_gpio_leds(vlink_leds, ARRAY_SIZE(vlink_leds)); +} + +MACHINE_START(VLINK, "FDL VersaLink") @@ -162,12 +176,11 @@ diff -Naur linux-2.6.19.1/arch/arm/mach-at91rm9200/board-vlink.c linux/arch/arm/ + .init_irq = vlink_init_irq, + .init_machine = vlink_board_init, +MACHINE_END -diff -Naur linux-2.6.19.1/arch/arm/mach-at91rm9200/Kconfig linux/arch/arm/mach-at91rm9200/Kconfig ---- linux-2.6.19.1/arch/arm/mach-at91rm9200/Kconfig 2006-12-11 20:32:53.000000000 +0100 -+++ linux/arch/arm/mach-at91rm9200/Kconfig 2007-01-19 21:17:49.000000000 +0100 -@@ -82,6 +82,12 @@ +--- linux-2.6.21.1.orig/arch/arm/mach-at91/Kconfig 2007-05-28 12:22:29.000000000 +0200 ++++ linux-2.6.21.1/arch/arm/mach-at91/Kconfig 2007-05-28 13:11:45.000000000 +0200 +@@ -96,6 +96,12 @@ help - Select this if you are using Sperry-Sun's KAFA board. + Select this if you are using Promwad's Chub board. +config MACH_VLINK + bool "Figment Design Labs VersaLink" @@ -178,14 +191,21 @@ diff -Naur linux-2.6.19.1/arch/arm/mach-at91rm9200/Kconfig linux/arch/arm/mach-a endif # ---------------------------------------------------------- -diff -Naur linux-2.6.19.1/arch/arm/mach-at91rm9200/Makefile linux/arch/arm/mach-at91rm9200/Makefile ---- linux-2.6.19.1/arch/arm/mach-at91rm9200/Makefile 2006-12-11 20:32:53.000000000 +0100 -+++ linux/arch/arm/mach-at91rm9200/Makefile 2007-01-19 21:17:42.000000000 +0100 -@@ -24,6 +24,7 @@ - obj-$(CONFIG_MACH_KB9200) += board-kb9202.o +--- linux-2.6.21.1.orig/arch/arm/mach-at91/Makefile 2007-05-28 12:22:29.000000000 +0200 ++++ linux-2.6.21.1/arch/arm/mach-at91/Makefile 2007-05-28 13:13:15.000000000 +0200 +@@ -29,6 +29,7 @@ obj-$(CONFIG_MACH_ATEB9200) += board-eb9200.o obj-$(CONFIG_MACH_KAFA) += board-kafa.o -+obj-$(CONFIG_MACH_VLINK) += board-vlink.o + obj-$(CONFIG_MACH_CHUB) += board-chub.o ++obj-$(CONFIG_MACH_VLINK) += board-vlink.o # AT91SAM9260 board-specific support + obj-$(CONFIG_MACH_AT91SAM9260EK) += board-sam9260ek.o +@@ -51,6 +52,7 @@ + led-$(CONFIG_MACH_CSB637) += leds.o + led-$(CONFIG_MACH_KB9200) += leds.o + led-$(CONFIG_MACH_KAFA) += leds.o ++led-$(CONFIG_MACH_VLINK) += leds.o + obj-$(CONFIG_LEDS) += $(led-y) + # VGA support diff --git a/target/linux/at91-2.6/patches/002-led-driver.patch b/target/linux/at91-2.6/patches/002-led-driver.patch index 51877d0682..e78ed443c0 100644 --- a/target/linux/at91-2.6/patches/002-led-driver.patch +++ b/target/linux/at91-2.6/patches/002-led-driver.patch @@ -1,24 +1,92 @@ -diff -urN linux-2.6.19.2.old/arch/arm/mach-at91rm9200/Makefile linux-2.6.19.2/arch/arm/mach-at91rm9200/Makefile ---- linux-2.6.19.2.old/arch/arm/mach-at91rm9200/Makefile 2007-03-06 11:29:37.000000000 +0100 -+++ linux-2.6.19.2/arch/arm/mach-at91rm9200/Makefile 2007-03-06 20:52:28.000000000 +0100 -@@ -40,6 +40,7 @@ +diff -urN linux-2.6.21.1.orig/arch/arm/mach-at91/board-vlink.c linux-2.6.21.1/arch/arm/mach-at91/board-vlink.c +--- linux-2.6.21.1.orig/arch/arm/mach-at91/board-vlink.c 2007-05-28 13:33:41.000000000 +0200 ++++ linux-2.6.21.1/arch/arm/mach-at91/board-vlink.c 2007-05-28 14:43:28.000000000 +0200 +@@ -61,7 +61,7 @@ + at91rm9200_initialize(18432000, AT91RM9200_PQFP); + + /* Setup the LEDs */ +-// at91_init_leds(AT91_PIN_PB1, AT91_PIN_PB2); ++ at91_init_leds(AT91_PIN_PC14, AT91_PIN_PC15); + + /* Setup the serial ports and console */ + at91_init_serial(&vlink_uart_config); +@@ -81,10 +81,12 @@ + .ports = 1, + }; + ++/* + static struct at91_udc_data __initdata vlink_udc_data = { + .vbus_pin = AT91_PIN_PD4, + .pullup_pin = AT91_PIN_PD5, + }; ++*/ + + static struct at91_mmc_data __initdata vlink_mmc_data = { + // .det_pin = AT91_PIN_PB27, +@@ -108,18 +110,19 @@ + #endif + }; + +-static struct at91_gpio_led vlink_leds[] = { ++/*static struct at91_gpio_led vlink_leds[] = { + { + .name = "led0", +- .gpio = AT91_PIN_PB1, ++ .gpio = AT91_PIN_PC14, + .trigger = "heartbeat", + }, + { + .name = "led1", +- .gpio = AT91_PIN_PB2, ++ .gpio = AT91_PIN_PC15, + .trigger = "timer", + } + }; ++*/ + + static void __init vlink_board_init(void) + { +@@ -130,8 +133,8 @@ + /* USB Host */ + at91_add_device_usbh(&vlink_usbh_data); + /* USB Device */ +- at91_add_device_udc(&vlink_udc_data); +- at91_set_multi_drive(vlink_udc_data.pullup_pin, 1); /* pullup_pin is connected to reset */ ++// at91_add_device_udc(&vlink_udc_data); ++// at91_set_multi_drive(vlink_udc_data.pullup_pin, 1); /* pullup_pin is connected to reset */ + /* I2C */ + at91_add_device_i2c(); + /* SPI */ +@@ -145,7 +148,7 @@ + at91_add_device_mmc(0, &vlink_mmc_data); + #endif + /* LEDs */ +- at91_gpio_leds(vlink_leds, ARRAY_SIZE(vlink_leds)); ++// at91_gpio_leds(vlink_leds, ARRAY_SIZE(vlink_leds)); + } + + MACHINE_START(VLINK, "FDL VersaLink") +diff -urN linux-2.6.21.1.orig/arch/arm/mach-at91/Makefile linux-2.6.21.1/arch/arm/mach-at91/Makefile +--- linux-2.6.21.1.orig/arch/arm/mach-at91/Makefile 2007-05-28 13:13:15.000000000 +0200 ++++ linux-2.6.21.1/arch/arm/mach-at91/Makefile 2007-05-28 14:19:06.000000000 +0200 +@@ -52,7 +52,7 @@ led-$(CONFIG_MACH_CSB637) += leds.o led-$(CONFIG_MACH_KB9200) += leds.o led-$(CONFIG_MACH_KAFA) += leds.o -+led-$(CONFIG_MACH_VLINK) += vlink_leds.o +-led-$(CONFIG_MACH_VLINK) += leds.o ++led-$(CONFIG_MACH_VLINK) += vlink_leds.o obj-$(CONFIG_LEDS) += $(led-y) # VGA support -diff -urN linux-2.6.19.2.old/arch/arm/mach-at91rm9200/vlink_leds.c linux-2.6.19.2/arch/arm/mach-at91rm9200/vlink_leds.c ---- linux-2.6.19.2.old/arch/arm/mach-at91rm9200/vlink_leds.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.19.2/arch/arm/mach-at91rm9200/vlink_leds.c 2007-03-06 21:11:16.000000000 +0100 -@@ -0,0 +1,151 @@ +diff -urN linux-2.6.21.1.orig/arch/arm/mach-at91/vlink_leds.c linux-2.6.21.1/arch/arm/mach-at91/vlink_leds.c +--- linux-2.6.21.1.orig/arch/arm/mach-at91/vlink_leds.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.21.1/arch/arm/mach-at91/vlink_leds.c 2007-05-28 14:41:03.000000000 +0200 +@@ -0,0 +1,105 @@ +/* + * LED driver for Atmel AT91-based boards. + * + * Copyright (C) SAN People (Pty) Ltd -+ * -+ * Modified for FDL Versalink board (c) Guthrie Consulting ++ * Modified for FDL VersaLink Copyright (C) Guthrie Consulting + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License @@ -35,10 +103,6 @@ diff -urN linux-2.6.19.2.old/arch/arm/mach-at91rm9200/vlink_leds.c linux-2.6.19. +#include <asm/arch/board.h> +#include <asm/arch/gpio.h> + -+#define LED_CPU 0 -+#define LED_TIMER 1 -+#define LED_COM1 2 -+#define LED_COM2 3 + +static inline void at91_led_on(unsigned int led) +{ @@ -52,20 +116,26 @@ diff -urN linux-2.6.19.2.old/arch/arm/mach-at91rm9200/vlink_leds.c linux-2.6.19. + +static inline void at91_led_toggle(unsigned int led) +{ -+ unsigned long is_off = at91_get_gpio_value(AT91_PIN_PC7); ++ unsigned long is_off = at91_get_gpio_value(led); + if (is_off) { -+ at91_set_gpio_value(AT91_PIN_PC7, 0); -+ at91_set_gpio_value(AT91_PIN_PC8, 1); -+ } else { -+ at91_set_gpio_value(AT91_PIN_PC7, 1); -+ at91_set_gpio_value(AT91_PIN_PC8, 0); -+ } ++ at91_led_on(led); ++ at91_led_off(at91_leds_cpu); ++ } ++ else { ++ at91_led_on(at91_leds_cpu); ++ at91_led_off(led); ++ } +} + + +/* + * Handle LED events. + */ ++ ++/* ++ * VersaLink has a single bi-coloured LED which changes colour when the ++ * polarity is reversed ++ */ +static void at91_leds_event(led_event_t evt) +{ + unsigned long flags; @@ -74,20 +144,11 @@ diff -urN linux-2.6.19.2.old/arch/arm/mach-at91rm9200/vlink_leds.c linux-2.6.19. + + switch(evt) { + case led_start: /* System startup */ -+// at91_led_on(at91_leds_cpu); + at91_led_toggle(at91_leds_timer); -+/* -+ at91_set_gpio_value(AT91_PIN_PC7, 0); -+ at91_set_gpio_value(AT91_PIN_PC8, 1); -+*/ + break; + + case led_stop: /* System stop / suspend */ + at91_led_toggle(at91_leds_timer); -+/* -+ at91_set_gpio_value(AT91_PIN_PC7, 1); -+ at91_set_gpio_value(AT91_PIN_PC8, 0); -+*/ + break; + +#ifdef CONFIG_LEDS_TIMER @@ -99,18 +160,10 @@ diff -urN linux-2.6.19.2.old/arch/arm/mach-at91rm9200/vlink_leds.c linux-2.6.19. +#ifdef CONFIG_LEDS_CPU + case led_idle_start: /* Entering idle state */ + at91_led_toggle(at91_leds_timer); -+/* -+ at91_set_gpio_value(AT91_PIN_PC7, 1); -+ at91_set_gpio_value(AT91_PIN_PC8, 0); -+*/ + break; + + case led_idle_end: /* Exit idle state */ + at91_led_toggle(at91_leds_timer); -+/* -+ at91_set_gpio_value(AT91_PIN_PC7, 0); -+ at91_set_gpio_value(AT91_PIN_PC8, 1); -+*/ + break; +#endif + @@ -124,38 +177,8 @@ diff -urN linux-2.6.19.2.old/arch/arm/mach-at91rm9200/vlink_leds.c linux-2.6.19. + +static int __init leds_init(void) +{ -+/* if (!at91_leds_timer || !at91_leds_cpu) ++ if (!at91_leds_timer || !at91_leds_cpu) + return -ENODEV; -+*/ -+// printk("leds_init()\n"); -+ -+ /* Enable PIO to access the LEDs */ -+ at91_set_gpio_output(AT91_PIN_PC7, 1); -+ at91_set_gpio_output(AT91_PIN_PC8, 1); -+ at91_set_gpio_output(AT91_PIN_PC14, 1); -+ at91_set_gpio_output(AT91_PIN_PC15, 1); -+ at91_set_gpio_output(AT91_PIN_PB14, 1); -+ at91_set_gpio_output(AT91_PIN_PB15, 1); -+ at91_set_gpio_output(AT91_PIN_PB16, 1); -+ at91_set_gpio_output(AT91_PIN_PB17, 1); -+ -+ at91_set_gpio_output(AT91_PIN_PB9, 1); -+ at91_set_gpio_output(AT91_PIN_PB10, 1); -+ at91_set_gpio_output(AT91_PIN_PB11, 1); -+ at91_set_gpio_output(AT91_PIN_PB12, 1); -+ -+ at91_set_gpio_input(AT91_PIN_PB8, 1); -+ at91_set_gpio_input(AT91_PIN_PB22, 1); -+ at91_set_gpio_input(AT91_PIN_PA19, 1); -+ at91_set_gpio_input(AT91_PIN_PA24, 1); -+ at91_set_gpio_output(AT91_PIN_PA29, 1); -+ at91_set_gpio_output(AT91_PIN_PB2, 1); -+ at91_set_gpio_output(AT91_PIN_PB3, 1); -+ at91_set_gpio_output(AT91_PIN_PB4, 1); -+ -+ at91_set_gpio_input(AT91_PIN_PB27, 1); -+ at91_set_gpio_input(AT91_PIN_PB28, 1); -+ at91_set_gpio_input(AT91_PIN_PB29, 1); + + leds_event = at91_leds_event; + |