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| author | Martin Blumenstingl <martin.blumenstingl@googlemail.com> | 2019-07-08 12:10:12 +0200 |
|---|---|---|
| committer | Adrian Schmutzler <freifunk@adrianschmutzler.de> | 2019-12-22 01:24:23 +0100 |
| commit | 7298c25f744a042f021da7a5e0fa81268bb454ce (patch) | |
| tree | 1da164eb45f51720b7a32b36710d3997c4c6e93c /target/linux/archs38/generic/profiles | |
| parent | edb0a936f0af134ed2fb01c05e5d31b9944d2454 (diff) | |
| download | upstream-7298c25f744a042f021da7a5e0fa81268bb454ce.tar.gz upstream-7298c25f744a042f021da7a5e0fa81268bb454ce.tar.bz2 upstream-7298c25f744a042f021da7a5e0fa81268bb454ce.zip | |
lantiq: dts: assign the NAND pins to the nand-controller node
Assign the NAND pins to the NAND controller node instead of using pin
hogging (where pins are assigned to the pin controller).
This is the preferred way of assigning pins upstream.
While here, define all NAND pins (CLE, ALE, read/RD, ready busy/RDY and
CE/CS1). This means that the pinctrl subsystem knows that these pins are
in use and cannot be re-assigned as GPIOs for example.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Diffstat (limited to 'target/linux/archs38/generic/profiles')
0 files changed, 0 insertions, 0 deletions