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authorFelix Fietkau <nbd@openwrt.org>2015-12-20 14:25:45 +0000
committerFelix Fietkau <nbd@openwrt.org>2015-12-20 14:25:45 +0000
commit814d70b2fdabec79c75b41460c10b5a63cc20b59 (patch)
treed48e98f6aec115745d7e6881e59a3d2f17f05152 /target/linux/ar71xx
parentde50527a3804810213134cc19fcd9e0b8f3f8709 (diff)
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ar8216: rework/fix AR8337 MAC swap handling
In r45970 the MAC swap handling was made opt-in, however some boards have been forgotten during the conversion. Since the reference design uses this MAC swapping, and pretty much all known boards using this chip seem to do so too, enabling the swapping is a more reasonable default than leaving it disabled. Change the code to still allow boards to opt-out of this. Signed-off-by: Felix Fietkau <nbd@openwrt.org> SVN-Revision: 47956
Diffstat (limited to 'target/linux/ar71xx')
-rw-r--r--target/linux/ar71xx/files/arch/mips/ath79/mach-epg5000.c1
-rw-r--r--target/linux/ar71xx/files/arch/mips/ath79/mach-esr1750.c1
-rw-r--r--target/linux/ar71xx/files/arch/mips/ath79/mach-f9k1115v2.c1
-rw-r--r--target/linux/ar71xx/files/arch/mips/ath79/mach-nbg6716.c1
-rw-r--r--target/linux/ar71xx/files/arch/mips/ath79/mach-wlr8100.c1
5 files changed, 0 insertions, 5 deletions
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-epg5000.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-epg5000.c
index b049f5d692..3d60afc408 100644
--- a/target/linux/ar71xx/files/arch/mips/ath79/mach-epg5000.c
+++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-epg5000.c
@@ -98,7 +98,6 @@ static struct ar8327_pad_cfg epg5000_ar8327_pad0_cfg = {
.rxclk_delay_en = true,
.txclk_delay_sel = AR8327_CLK_DELAY_SEL2,
.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
- .mac06_exchange_en = true,
};
static struct ar8327_platform_data epg5000_ar8327_data = {
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-esr1750.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-esr1750.c
index d2bc177d73..2a34b3a2e9 100644
--- a/target/linux/ar71xx/files/arch/mips/ath79/mach-esr1750.c
+++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-esr1750.c
@@ -97,7 +97,6 @@ static struct ar8327_pad_cfg esr1750_ar8327_pad0_cfg = {
.rxclk_delay_en = true,
.txclk_delay_sel = AR8327_CLK_DELAY_SEL2,
.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
- .mac06_exchange_en = true,
};
static struct ar8327_platform_data esr1750_ar8327_data = {
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-f9k1115v2.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-f9k1115v2.c
index 9e86e9ab3b..69d005d795 100644
--- a/target/linux/ar71xx/files/arch/mips/ath79/mach-f9k1115v2.c
+++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-f9k1115v2.c
@@ -98,7 +98,6 @@ static struct ar8327_pad_cfg f9k1115v2_ar8327_pad0_cfg = {
.rxclk_delay_en = true,
.txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
- .mac06_exchange_en = true,
};
static struct ar8327_pad_cfg f9k1115v2_ar8327_pad6_cfg = {
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-nbg6716.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-nbg6716.c
index 73e11f1945..c28a8a5118 100644
--- a/target/linux/ar71xx/files/arch/mips/ath79/mach-nbg6716.c
+++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-nbg6716.c
@@ -320,7 +320,6 @@ static void __init nbg6716_010_setup(void)
nbg6716_ar8327_pad0_cfg.rxclk_delay_en = true;
nbg6716_ar8327_pad0_cfg.txclk_delay_sel = AR8327_CLK_DELAY_SEL1;
nbg6716_ar8327_pad0_cfg.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2;
- nbg6716_ar8327_pad0_cfg.mac06_exchange_en = true;
/* GMAC6 of the AR8337 switch is connected to GMAC1 via SGMII */
nbg6716_ar8327_pad6_cfg.mode = AR8327_PAD_MAC_SGMII;
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-wlr8100.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-wlr8100.c
index 6a90c6ecb3..88022e7533 100644
--- a/target/linux/ar71xx/files/arch/mips/ath79/mach-wlr8100.c
+++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-wlr8100.c
@@ -186,7 +186,6 @@ static void __init wlr8100_010_setup(void)
wlr8100_ar8327_pad0_cfg.rxclk_delay_en = true;
wlr8100_ar8327_pad0_cfg.txclk_delay_sel = AR8327_CLK_DELAY_SEL1;
wlr8100_ar8327_pad0_cfg.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2;
- wlr8100_ar8327_pad0_cfg.mac06_exchange_en = true;
/* GMAC6 of the AR8337 switch is connected to GMAC1 via SGMII */
wlr8100_ar8327_pad6_cfg.mode = AR8327_PAD_MAC_SGMII;