kernel: update to 3.10.49 Signed-off-by: John Crispin <blogic@openwrt.org>

SVN-Revision: 41776

2 files changed, 1 insertions, 49 deletions

diff --git a/target/linux/ar71xx/Makefile b/target/linux/ar71xx/Makefile
index b2a16f9125..1b400745d1 100644
--- a/target/linux/ar71xx/Makefile
+++ b/target/linux/ar71xx/Makefile
@@ -13,7 +13,7 @@ FEATURES:=mips16
 CPU_TYPE=34kc
 SUBTARGETS:=generic nand mikrotik
 
-LINUX_VERSION:=3.10.44
+LINUX_VERSION:=3.10.49
 
 include $(INCLUDE_DIR)/target.mk
 
diff --git a/target/linux/ar71xx/patches-3.10/104-watchdog-ath79-wdt-avoid-spurious-restarts-on-AR934x.patch b/target/linux/ar71xx/patches-3.10/104-watchdog-ath79-wdt-avoid-spurious-restarts-on-AR934x.patch
deleted file mode 100644
index c7bf06656e..0000000000
--- a/target/linux/ar71xx/patches-3.10/104-watchdog-ath79-wdt-avoid-spurious-restarts-on-AR934x.patch
+++ /dev/null
@@ -1,48 +0,0 @@
-From 2ff030d44672d745c5327b72463af43f5103e99b Mon Sep 17 00:00:00 2001
-From: Gabor Juhos <juhosg@openwrt.org>
-Date: Tue, 25 Mar 2014 17:07:46 +0100
-Subject: [PATCH] watchdog: ath79-wdt: avoid spurious restarts on AR934x
-
-On some AR934x based systems, where the frequency of
-the AHB bus is relatively high, the built-in watchdog
-causes a spurious restart when it gets enabled.
-
-The possible cause of these restarts is that the timeout
-value written into the TIMER register does not reaches
-the hardware in time.
-
-Add an explicit delay into the ath79_wdt_enable function
-to avoid the spurious restarts.
-
-Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
-Cc: <stable@vger.kernel.org>
----
- drivers/watchdog/ath79_wdt.c |   10 ++++++++++
- 1 file changed, 10 insertions(+)
-
---- a/drivers/watchdog/ath79_wdt.c
-+++ b/drivers/watchdog/ath79_wdt.c
-@@ -20,6 +20,7 @@
- #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
- 
- #include <linux/bitops.h>
-+#include <linux/delay.h>
- #include <linux/errno.h>
- #include <linux/fs.h>
- #include <linux/init.h>
-@@ -91,6 +92,15 @@ static inline void ath79_wdt_keepalive(v
- static inline void ath79_wdt_enable(void)
- {
- 	ath79_wdt_keepalive();
-+
-+	/*
-+	 * Updating the TIMER register requires a few microseconds
-+	 * on the AR934x SoCs at least. Use a small delay to ensure
-+	 * that the TIMER register is updated within the hardware
-+	 * before enabling the watchdog.
-+	 */
-+	udelay(2);
-+
- 	ath79_wdt_wr(WDOG_REG_CTRL, WDOG_CTRL_ACTION_FCR);
- 	/* flush write */
- 	ath79_wdt_rr(WDOG_REG_CTRL);