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authorGabor Juhos <juhosg@openwrt.org>2011-06-29 08:57:29 +0000
committerGabor Juhos <juhosg@openwrt.org>2011-06-29 08:57:29 +0000
commit055e317ed81b55bcc181b1a6b5ce2baac81e5c49 (patch)
treefb5de364c86c47a6f26a6af6bee4c4def45397e0 /target/linux/ar71xx
parent59bff8bf180e32e8c3813b028e4f5b34ca104dc0 (diff)
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ar71xx: add separate handlers for IP3 interrupts
SVN-Revision: 27308
Diffstat (limited to 'target/linux/ar71xx')
-rw-r--r--target/linux/ar71xx/files/arch/mips/ar71xx/irq.c44
1 files changed, 39 insertions, 5 deletions
diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/irq.c b/target/linux/ar71xx/files/arch/mips/ar71xx/irq.c
index 9758f63f30..585e8d85bb 100644
--- a/target/linux/ar71xx/files/arch/mips/ar71xx/irq.c
+++ b/target/linux/ar71xx/files/arch/mips/ar71xx/irq.c
@@ -248,10 +248,9 @@ static void __init ar71xx_misc_irq_init(void)
}
/*
- * The IP2 line is tied to a PCI/WMAC device. Drivers for these
- * devices typically allocate coherent DMA memory for the descriptor
- * ring, however the DMA controller may still have some unsynchronized
- * data in the FIFO.
+ * The IP2/IP3 lines are tied to a PCI/WMAC/USB device. Drivers for
+ * these devices typically allocate coherent DMA memory, however the
+ * DMA controller may still have some unsynchronized data in the FIFO.
* Issue a flush in the handlers to ensure that the driver sees
* the update.
*/
@@ -285,7 +284,37 @@ static void ar934x_ip2_handler(void)
do_IRQ(AR71XX_CPU_IRQ_IP2);
}
+static void ar71xx_ip3_handler(void)
+{
+ ar71xx_ddr_flush(AR71XX_DDR_REG_FLUSH_USB);
+ do_IRQ(AR71XX_CPU_IRQ_USB);
+}
+
+static void ar724x_ip3_handler(void)
+{
+ ar71xx_ddr_flush(AR724X_DDR_REG_FLUSH_USB);
+ do_IRQ(AR71XX_CPU_IRQ_USB);
+}
+
+static void ar913x_ip3_handler(void)
+{
+ ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_USB);
+ do_IRQ(AR71XX_CPU_IRQ_USB);
+}
+
+static void ar933x_ip3_handler(void)
+{
+ ar71xx_ddr_flush(AR933X_DDR_REG_FLUSH_USB);
+ do_IRQ(AR71XX_CPU_IRQ_USB);
+}
+
+static void ar934x_ip3_handler(void)
+{
+ do_IRQ(AR71XX_CPU_IRQ_USB);
+}
+
static void (*ip2_handler)(void);
+static void (*ip3_handler)(void);
asmlinkage void plat_irq_dispatch(void)
{
@@ -306,7 +335,7 @@ asmlinkage void plat_irq_dispatch(void)
do_IRQ(AR71XX_CPU_IRQ_GE1);
else if (pending & STATUSF_IP3)
- do_IRQ(AR71XX_CPU_IRQ_USB);
+ ip3_handler();
else if (pending & STATUSF_IP6)
ar71xx_misc_irq_dispatch();
@@ -321,28 +350,33 @@ void __init arch_init_irq(void)
case AR71XX_SOC_AR7141:
case AR71XX_SOC_AR7161:
ip2_handler = ar71xx_ip2_handler;
+ ip3_handler = ar71xx_ip3_handler;
break;
case AR71XX_SOC_AR7240:
case AR71XX_SOC_AR7241:
case AR71XX_SOC_AR7242:
ip2_handler = ar724x_ip2_handler;
+ ip3_handler = ar724x_ip3_handler;
break;
case AR71XX_SOC_AR9130:
case AR71XX_SOC_AR9132:
ip2_handler = ar913x_ip2_handler;
+ ip3_handler = ar913x_ip3_handler;
break;
case AR71XX_SOC_AR9330:
case AR71XX_SOC_AR9331:
ip2_handler = ar933x_ip2_handler;
+ ip3_handler = ar933x_ip3_handler;
break;
case AR71XX_SOC_AR9341:
case AR71XX_SOC_AR9342:
case AR71XX_SOC_AR9344:
ip2_handler = ar934x_ip2_handler;
+ ip3_handler = ar934x_ip3_handler;
break;
default: