diff options
| author | Koen Vandeputte <koen.vandeputte@ncentric.com> | 2019-09-18 15:05:34 +0200 |
|---|---|---|
| committer | Koen Vandeputte <koen.vandeputte@ncentric.com> | 2019-09-20 13:17:20 +0200 |
| commit | 745292ba1003639e9adff89f8cbf841d59c9d2dd (patch) | |
| tree | 069fa5fda504d2e5330612ad8ee9fbfb3a3bd3d6 /target/linux/ar71xx | |
| parent | 5880dd48d58ec18c0d82bf2a18718639fd8c8d32 (diff) | |
| download | upstream-745292ba1003639e9adff89f8cbf841d59c9d2dd.tar.gz upstream-745292ba1003639e9adff89f8cbf841d59c9d2dd.tar.bz2 upstream-745292ba1003639e9adff89f8cbf841d59c9d2dd.zip | |
kernel: bump 4.9 to 4.9.193
Refreshed all patches.
Fixes:
- CVE-2019-15030
Compile-tested on: ar71xx
Runtime-tested on: ar71xx
Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
Diffstat (limited to 'target/linux/ar71xx')
3 files changed, 12 insertions, 12 deletions
diff --git a/target/linux/ar71xx/patches-4.9/620-MIPS-ath79-add-support-for-QCA953x-SoC.patch b/target/linux/ar71xx/patches-4.9/620-MIPS-ath79-add-support-for-QCA953x-SoC.patch index ed887cc500..e3b5d48d74 100644 --- a/target/linux/ar71xx/patches-4.9/620-MIPS-ath79-add-support-for-QCA953x-SoC.patch +++ b/target/linux/ar71xx/patches-4.9/620-MIPS-ath79-add-support-for-QCA953x-SoC.patch @@ -307,7 +307,7 @@ meaning of the bits CPUCLK_FROM_CPUPLL and DDRCLK_FROM_DDRPLL is reversed. return; --- a/arch/mips/ath79/irq.c +++ b/arch/mips/ath79/irq.c -@@ -56,6 +56,34 @@ static void ar934x_ip2_irq_init(void) +@@ -62,6 +62,34 @@ static void ar934x_ip2_irq_init(void) irq_set_chained_handler(ATH79_CPU_IRQ(2), ar934x_ip2_irq_dispatch); } @@ -342,7 +342,7 @@ meaning of the bits CPUCLK_FROM_CPUPLL and DDRCLK_FROM_DDRPLL is reversed. static void qca955x_ip2_irq_dispatch(struct irq_desc *desc) { u32 status; -@@ -143,7 +171,7 @@ void __init arch_init_irq(void) +@@ -149,7 +177,7 @@ void __init arch_init_irq(void) soc_is_ar913x() || soc_is_ar933x()) { irq_wb_chan2 = 3; irq_wb_chan3 = 2; @@ -351,7 +351,7 @@ meaning of the bits CPUCLK_FROM_CPUPLL and DDRCLK_FROM_DDRPLL is reversed. irq_wb_chan3 = 2; } -@@ -154,6 +182,7 @@ void __init arch_init_irq(void) +@@ -160,6 +188,7 @@ void __init arch_init_irq(void) else if (soc_is_ar724x() || soc_is_ar933x() || soc_is_ar934x() || @@ -359,7 +359,7 @@ meaning of the bits CPUCLK_FROM_CPUPLL and DDRCLK_FROM_DDRPLL is reversed. soc_is_qca955x()) misc_is_ar71xx = false; else -@@ -164,6 +193,8 @@ void __init arch_init_irq(void) +@@ -170,6 +199,8 @@ void __init arch_init_irq(void) if (soc_is_ar934x()) ar934x_ip2_irq_init(); diff --git a/target/linux/ar71xx/patches-4.9/621-MIPS-ath79-add-support-for-QCA956x-SoC.patch b/target/linux/ar71xx/patches-4.9/621-MIPS-ath79-add-support-for-QCA956x-SoC.patch index 03bb9c31f6..20aa7ea27e 100644 --- a/target/linux/ar71xx/patches-4.9/621-MIPS-ath79-add-support-for-QCA956x-SoC.patch +++ b/target/linux/ar71xx/patches-4.9/621-MIPS-ath79-add-support-for-QCA956x-SoC.patch @@ -291,7 +291,7 @@ return; --- a/arch/mips/ath79/irq.c +++ b/arch/mips/ath79/irq.c -@@ -156,6 +156,87 @@ static void qca955x_irq_init(void) +@@ -162,6 +162,87 @@ static void qca955x_irq_init(void) irq_set_chained_handler(ATH79_CPU_IRQ(3), qca955x_ip3_irq_dispatch); } @@ -379,7 +379,7 @@ void __init arch_init_irq(void) { unsigned irq_wb_chan2 = -1; -@@ -183,7 +264,9 @@ void __init arch_init_irq(void) +@@ -189,7 +270,9 @@ void __init arch_init_irq(void) soc_is_ar933x() || soc_is_ar934x() || soc_is_qca953x() || @@ -390,7 +390,7 @@ misc_is_ar71xx = false; else BUG(); -@@ -197,4 +280,6 @@ void __init arch_init_irq(void) +@@ -203,4 +286,6 @@ void __init arch_init_irq(void) qca953x_irq_init(); else if (soc_is_qca955x()) qca955x_irq_init(); diff --git a/target/linux/ar71xx/patches-4.9/630-MIPS-ath79-fix-chained-irq-disable.patch b/target/linux/ar71xx/patches-4.9/630-MIPS-ath79-fix-chained-irq-disable.patch index 2b92b88d03..a74eb4f43e 100644 --- a/target/linux/ar71xx/patches-4.9/630-MIPS-ath79-fix-chained-irq-disable.patch +++ b/target/linux/ar71xx/patches-4.9/630-MIPS-ath79-fix-chained-irq-disable.patch @@ -10,7 +10,7 @@ static void ar934x_ip2_irq_dispatch(struct irq_desc *desc) { u32 status; -@@ -50,8 +53,7 @@ static void ar934x_ip2_irq_init(void) +@@ -56,8 +59,7 @@ static void ar934x_ip2_irq_init(void) for (i = ATH79_IP2_IRQ_BASE; i < ATH79_IP2_IRQ_BASE + ATH79_IP2_IRQ_COUNT; i++) @@ -20,7 +20,7 @@ irq_set_chained_handler(ATH79_CPU_IRQ(2), ar934x_ip2_irq_dispatch); } -@@ -79,7 +81,7 @@ static void qca953x_irq_init(void) +@@ -85,7 +87,7 @@ static void qca953x_irq_init(void) for (i = ATH79_IP2_IRQ_BASE; i < ATH79_IP2_IRQ_BASE + ATH79_IP2_IRQ_COUNT; i++) @@ -29,7 +29,7 @@ irq_set_chained_handler(ATH79_CPU_IRQ(2), qca953x_ip2_irq_dispatch); } -@@ -143,15 +145,13 @@ static void qca955x_irq_init(void) +@@ -149,15 +151,13 @@ static void qca955x_irq_init(void) for (i = ATH79_IP2_IRQ_BASE; i < ATH79_IP2_IRQ_BASE + ATH79_IP2_IRQ_COUNT; i++) @@ -47,7 +47,7 @@ irq_set_chained_handler(ATH79_CPU_IRQ(3), qca955x_ip3_irq_dispatch); } -@@ -222,13 +222,13 @@ static void qca956x_irq_init(void) +@@ -228,13 +228,13 @@ static void qca956x_irq_init(void) for (i = ATH79_IP2_IRQ_BASE; i < ATH79_IP2_IRQ_BASE + ATH79_IP2_IRQ_COUNT; i++) @@ -63,7 +63,7 @@ irq_set_chained_handler(ATH79_CPU_IRQ(3), qca956x_ip3_irq_dispatch); -@@ -237,12 +237,40 @@ static void qca956x_irq_init(void) +@@ -243,12 +243,40 @@ static void qca956x_irq_init(void) late_time_init = &qca956x_enable_timer_cb; } |