diff options
| author | Felix Fietkau <nbd@openwrt.org> | 2015-04-20 15:00:52 +0000 |
|---|---|---|
| committer | Felix Fietkau <nbd@openwrt.org> | 2015-04-20 15:00:52 +0000 |
| commit | f4e6418a32237f734429c03fc2f8e092cec09ae8 (patch) | |
| tree | 416283422d7640b27746bf472765ec571f693281 /target/linux/ar71xx | |
| parent | c75a0e86b13ec1cd35b0fa56cd5c222172a1407d (diff) | |
| download | upstream-f4e6418a32237f734429c03fc2f8e092cec09ae8.tar.gz upstream-f4e6418a32237f734429c03fc2f8e092cec09ae8.tar.bz2 upstream-f4e6418a32237f734429c03fc2f8e092cec09ae8.zip | |
ar71xx: add a helper function to set RXDV/RXD of ETH_CFG on AR934x
The ETH_RXDV_DELAY (17:16) and ETH_RXD_DELAY (15:14) are currently not cleared
by the function ath79_setup_ar934x_eth_cfg. Clearing these in the
ath79_setup_ar934x_eth_cfg may cause problems on some hardware because they
rely on the preset value by the bootloader.
Instead another function is introduced which also works on ETH_CFG on AR934x.
It can be used to safely clear and set ETH_RXDV_DELAY and ETH_RXD_DELAY on
machines which require special settings.
Signed-off-by: Sven Eckelmann <sven@open-mesh.com>
SVN-Revision: 45523
Diffstat (limited to 'target/linux/ar71xx')
| -rw-r--r-- | target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c | 26 | ||||
| -rw-r--r-- | target/linux/ar71xx/files/arch/mips/ath79/dev-eth.h | 1 |
2 files changed, 27 insertions, 0 deletions
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c b/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c index c6842aad38..ae3db4c3ef 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c @@ -769,6 +769,32 @@ void __init ath79_setup_ar934x_eth_cfg(u32 mask) iounmap(base); } +void __init ath79_setup_ar934x_eth_rx_delay(unsigned int rxd, + unsigned int rxdv) +{ + void __iomem *base; + u32 t; + + rxd &= AR934X_ETH_CFG_RXD_DELAY_MASK; + rxdv &= AR934X_ETH_CFG_RDV_DELAY_MASK; + + base = ioremap(AR934X_GMAC_BASE, AR934X_GMAC_SIZE); + + t = __raw_readl(base + AR934X_GMAC_REG_ETH_CFG); + + t &= ~(AR934X_ETH_CFG_RXD_DELAY_MASK << AR934X_ETH_CFG_RXD_DELAY_SHIFT | + AR934X_ETH_CFG_RDV_DELAY_MASK << AR934X_ETH_CFG_RDV_DELAY_SHIFT); + + t |= (rxd << AR934X_ETH_CFG_RXD_DELAY_SHIFT | + rxdv << AR934X_ETH_CFG_RDV_DELAY_SHIFT); + + __raw_writel(t, base + AR934X_GMAC_REG_ETH_CFG); + /* flush write */ + __raw_readl(base + AR934X_GMAC_REG_ETH_CFG); + + iounmap(base); +} + void __init ath79_setup_qca955x_eth_cfg(u32 mask) { void __iomem *base; diff --git a/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.h b/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.h index e1517b7a29..5a226e4028 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.h +++ b/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.h @@ -47,6 +47,7 @@ void ath79_register_mdio(unsigned int id, u32 phy_mask); void ath79_setup_ar933x_phy4_switch(bool mac, bool mdio); void ath79_setup_ar934x_eth_cfg(u32 mask); +void ath79_setup_ar934x_eth_rx_delay(unsigned int rxd, unsigned int rxdv); void ath79_setup_qca955x_eth_cfg(u32 mask); #endif /* _ATH79_DEV_ETH_H */ |