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authorGabor Juhos <juhosg@openwrt.org>2009-07-07 13:57:57 +0000
committerGabor Juhos <juhosg@openwrt.org>2009-07-07 13:57:57 +0000
commit3b47053fb34e5f5f19b4c690894cba543bc33b78 (patch)
tree762147d64d71e5b53db8d31c3dc1b1a9f823af82 /target/linux/ar71xx
parentdaaf02e41627ed98062865af2220a9e84c430dbf (diff)
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AR7240 requires different IRQ unmasking code
SVN-Revision: 16734
Diffstat (limited to 'target/linux/ar71xx')
-rw-r--r--target/linux/ar71xx/files/arch/mips/ar71xx/irq.c19
1 files changed, 19 insertions, 0 deletions
diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/irq.c b/target/linux/ar71xx/files/arch/mips/ar71xx/irq.c
index a912f38920..6bc1c6d5c4 100644
--- a/target/linux/ar71xx/files/arch/mips/ar71xx/irq.c
+++ b/target/linux/ar71xx/files/arch/mips/ar71xx/irq.c
@@ -297,6 +297,22 @@ static void ar71xx_misc_irq_unmask(unsigned int irq)
ar71xx_reset_rr(AR71XX_RESET_REG_MISC_INT_ENABLE);
}
+static void ar724x_misc_irq_unmask(unsigned int irq)
+{
+ irq -= AR71XX_MISC_IRQ_BASE;
+ ar71xx_reset_wr(AR71XX_RESET_REG_MISC_INT_ENABLE,
+ ar71xx_reset_rr(AR71XX_RESET_REG_MISC_INT_ENABLE) | (1 << irq));
+
+ /* flush write */
+ ar71xx_reset_rr(AR71XX_RESET_REG_MISC_INT_ENABLE);
+
+ ar71xx_reset_wr(AR71XX_RESET_REG_MISC_INT_STATUS,
+ ar71xx_reset_rr(AR71XX_RESET_REG_MISC_INT_STATUS) & ~(1 << irq));
+
+ /* flush write */
+ ar71xx_reset_rr(AR71XX_RESET_REG_MISC_INT_STATUS);
+}
+
static void ar71xx_misc_irq_mask(unsigned int irq)
{
irq -= AR71XX_MISC_IRQ_BASE;
@@ -326,6 +342,9 @@ static void __init ar71xx_misc_irq_init(void)
ar71xx_reset_wr(AR71XX_RESET_REG_MISC_INT_ENABLE, 0);
ar71xx_reset_wr(AR71XX_RESET_REG_MISC_INT_STATUS, 0);
+ if (ar71xx_soc == AR71XX_SOC_AR7240)
+ ar71xx_misc_irq_chip.unmask = ar724x_misc_irq_unmask;
+
for (i = AR71XX_MISC_IRQ_BASE;
i < AR71XX_MISC_IRQ_BASE + AR71XX_MISC_IRQ_COUNT; i++) {
irq_desc[i].status = IRQ_DISABLED;